Xu Ziyuan | 1c62d99 | 2016-08-01 08:46:19 +0800 | [diff] [blame] | 1 | CONFIG_ARM=y |
2 | CONFIG_ARCH_ROCKCHIP=y | ||||
Kever Yang | d79036c | 2019-07-01 11:49:13 +0800 | [diff] [blame] | 3 | CONFIG_SYS_TEXT_BASE=0x01000000 |
Tom Rini | 665c35a | 2019-09-23 11:47:37 -0400 | [diff] [blame] | 4 | CONFIG_SPL_GPIO_SUPPORT=y |
Tom Rini | 052170c | 2020-01-22 13:38:00 -0500 | [diff] [blame^] | 5 | CONFIG_ENV_OFFSET=0x3F8000 |
Xu Ziyuan | 1c62d99 | 2016-08-01 08:46:19 +0800 | [diff] [blame] | 6 | CONFIG_ROCKCHIP_RK3288=y |
Eddie Cai | 6f27976 | 2017-01-18 11:03:54 +0800 | [diff] [blame] | 7 | CONFIG_TARGET_TINKER_RK3288=y |
Tom Rini | 59e5d1e | 2019-11-11 20:04:24 -0500 | [diff] [blame] | 8 | CONFIG_SPL_STACK_R_ADDR=0x80000 |
Tom Rini | d168bcb | 2019-04-29 15:54:04 -0400 | [diff] [blame] | 9 | CONFIG_NR_DRAM_BANKS=1 |
Simon Glass | b51882d | 2019-09-25 08:56:28 -0600 | [diff] [blame] | 10 | CONFIG_SPL_SIZE_LIMIT=0x4b000 |
Tom Rini | 358b6a2 | 2018-06-04 11:57:37 -0400 | [diff] [blame] | 11 | CONFIG_DEBUG_UART_BASE=0xff690000 |
12 | CONFIG_DEBUG_UART_CLOCK=24000000 | ||||
Tom Rini | fb82fe3 | 2017-06-19 09:47:40 -0400 | [diff] [blame] | 13 | CONFIG_DEBUG_UART=y |
Tom Rini | 48f6232 | 2017-08-25 17:50:27 -0400 | [diff] [blame] | 14 | # CONFIG_ANDROID_BOOT_IMAGE is not set |
Simon Glass | 37304aa | 2019-07-20 20:51:14 -0600 | [diff] [blame] | 15 | CONFIG_USE_PREBOOT=y |
Simon Glass | 98af879 | 2016-10-17 20:12:35 -0600 | [diff] [blame] | 16 | CONFIG_SILENT_CONSOLE=y |
Simon Glass | ef26d60 | 2016-10-17 20:12:37 -0600 | [diff] [blame] | 17 | CONFIG_CONSOLE_MUX=y |
Klaus Goger | a2a5053 | 2018-05-25 23:45:05 +0200 | [diff] [blame] | 18 | CONFIG_DEFAULT_FDT_FILE="rk3288-tinker.dtb" |
Simon Glass | ef26d60 | 2016-10-17 20:12:37 -0600 | [diff] [blame] | 19 | # CONFIG_DISPLAY_CPUINFO is not set |
Mario Six | 78eba69 | 2018-03-28 14:38:17 +0200 | [diff] [blame] | 20 | CONFIG_DISPLAY_BOARDINFO_LATE=y |
Jagan Teki | 4bd143b | 2019-09-17 11:40:41 +0530 | [diff] [blame] | 21 | CONFIG_SPL_STACK_R=y |
22 | CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 | ||||
Tom Rini | 665c35a | 2019-09-23 11:47:37 -0400 | [diff] [blame] | 23 | CONFIG_SPL_I2C_SUPPORT=y |
24 | CONFIG_SPL_POWER_SUPPORT=y | ||||
Tom Rini | 8866312 | 2017-08-14 19:58:53 -0400 | [diff] [blame] | 25 | CONFIG_CMD_GPIO=y |
Patrick Delaunay | b331cd6 | 2017-01-27 11:00:42 +0100 | [diff] [blame] | 26 | CONFIG_CMD_GPT=y |
Tom Rini | 8866312 | 2017-08-14 19:58:53 -0400 | [diff] [blame] | 27 | CONFIG_CMD_I2C=y |
Xu Ziyuan | 1c62d99 | 2016-08-01 08:46:19 +0800 | [diff] [blame] | 28 | CONFIG_CMD_MMC=y |
Xu Ziyuan | 1c62d99 | 2016-08-01 08:46:19 +0800 | [diff] [blame] | 29 | CONFIG_CMD_SPI=y |
Eddie Cai | c00d165 | 2017-03-07 12:47:07 +0800 | [diff] [blame] | 30 | CONFIG_CMD_USB=y |
Urja Rannikko | a186e8a | 2019-05-13 13:51:04 +0000 | [diff] [blame] | 31 | CONFIG_CMD_USB_MASS_STORAGE=y |
Xu Ziyuan | 1c62d99 | 2016-08-01 08:46:19 +0800 | [diff] [blame] | 32 | # CONFIG_CMD_SETEXPR is not set |
Xu Ziyuan | 1c62d99 | 2016-08-01 08:46:19 +0800 | [diff] [blame] | 33 | CONFIG_CMD_CACHE=y |
34 | CONFIG_CMD_TIME=y | ||||
35 | CONFIG_CMD_PMIC=y | ||||
36 | CONFIG_CMD_REGULATOR=y | ||||
Patrick Delaunay | b0cf733 | 2017-01-27 11:00:37 +0100 | [diff] [blame] | 37 | # CONFIG_SPL_DOS_PARTITION is not set |
Patrick Delaunay | bd42a94 | 2017-01-27 11:00:41 +0100 | [diff] [blame] | 38 | # CONFIG_SPL_EFI_PARTITION is not set |
Patrick Delaunay | b331cd6 | 2017-01-27 11:00:42 +0100 | [diff] [blame] | 39 | CONFIG_SPL_PARTITION_UUIDS=y |
Xu Ziyuan | 1c62d99 | 2016-08-01 08:46:19 +0800 | [diff] [blame] | 40 | CONFIG_SPL_OF_CONTROL=y |
Tom Rini | 8c5cad0 | 2018-09-03 15:26:12 -0400 | [diff] [blame] | 41 | CONFIG_DEFAULT_DEVICE_TREE="rk3288-tinker" |
Kever Yang | d79036c | 2019-07-01 11:49:13 +0800 | [diff] [blame] | 42 | CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" |
Tom Rini | 5dc4dfd | 2017-08-28 07:16:32 -0400 | [diff] [blame] | 43 | CONFIG_ENV_IS_IN_MMC=y |
Tom Rini | 8d8ee47 | 2019-11-12 22:46:36 -0500 | [diff] [blame] | 44 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
Xu Ziyuan | 1c62d99 | 2016-08-01 08:46:19 +0800 | [diff] [blame] | 45 | CONFIG_REGMAP=y |
46 | CONFIG_SPL_REGMAP=y | ||||
47 | CONFIG_SYSCON=y | ||||
48 | CONFIG_SPL_SYSCON=y | ||||
49 | # CONFIG_SPL_SIMPLE_BUS is not set | ||||
50 | CONFIG_CLK=y | ||||
51 | CONFIG_SPL_CLK=y | ||||
Alex Kiernan | 65c9675 | 2018-05-29 15:30:55 +0000 | [diff] [blame] | 52 | CONFIG_FASTBOOT_CMD_OEM_FORMAT=y |
Xu Ziyuan | 1c62d99 | 2016-08-01 08:46:19 +0800 | [diff] [blame] | 53 | CONFIG_ROCKCHIP_GPIO=y |
54 | CONFIG_SYS_I2C_ROCKCHIP=y | ||||
Jonas Karlman | ecc3bd7 | 2017-04-22 08:57:54 +0000 | [diff] [blame] | 55 | CONFIG_MISC=y |
56 | CONFIG_I2C_EEPROM=y | ||||
Masahiro Yamada | 55ed3b4 | 2017-01-10 13:32:04 +0900 | [diff] [blame] | 57 | CONFIG_MMC_DW=y |
Masahiro Yamada | fed4408 | 2017-01-10 13:32:03 +0900 | [diff] [blame] | 58 | CONFIG_MMC_DW_ROCKCHIP=y |
Miquel Raynal | 888f184 | 2019-10-03 19:50:05 +0200 | [diff] [blame] | 59 | CONFIG_MTD=y |
Patrick Delaunay | 14453fb | 2019-02-27 15:20:36 +0100 | [diff] [blame] | 60 | CONFIG_SF_DEFAULT_SPEED=20000000 |
Jacob Chen | 5c0206c | 2017-02-23 14:20:17 +0800 | [diff] [blame] | 61 | CONFIG_DM_ETH=y |
Jacob Chen | 5c0206c | 2017-02-23 14:20:17 +0800 | [diff] [blame] | 62 | CONFIG_ETH_DESIGNWARE=y |
63 | CONFIG_GMAC_ROCKCHIP=y | ||||
Xu Ziyuan | 1c62d99 | 2016-08-01 08:46:19 +0800 | [diff] [blame] | 64 | CONFIG_PINCTRL=y |
65 | CONFIG_SPL_PINCTRL=y | ||||
Xu Ziyuan | 1c62d99 | 2016-08-01 08:46:19 +0800 | [diff] [blame] | 66 | CONFIG_DM_PMIC=y |
Jacob Chen | 453c5a9 | 2017-05-02 14:54:52 +0800 | [diff] [blame] | 67 | CONFIG_PMIC_RK8XX=y |
Michael Trimarchi | f810ea6 | 2019-09-17 11:40:42 +0530 | [diff] [blame] | 68 | CONFIG_SPL_DM_REGULATOR=y |
Tom Rini | 665c35a | 2019-09-23 11:47:37 -0400 | [diff] [blame] | 69 | CONFIG_DM_REGULATOR_FIXED=y |
Michael Trimarchi | f810ea6 | 2019-09-17 11:40:42 +0530 | [diff] [blame] | 70 | CONFIG_SPL_DM_REGULATOR_FIXED=y |
Tom Rini | 665c35a | 2019-09-23 11:47:37 -0400 | [diff] [blame] | 71 | CONFIG_REGULATOR_RK8XX=y |
Xu Ziyuan | 1c62d99 | 2016-08-01 08:46:19 +0800 | [diff] [blame] | 72 | CONFIG_PWM_ROCKCHIP=y |
73 | CONFIG_RAM=y | ||||
74 | CONFIG_SPL_RAM=y | ||||
Xu Ziyuan | 1c62d99 | 2016-08-01 08:46:19 +0800 | [diff] [blame] | 75 | CONFIG_DEBUG_UART_SHIFT=2 |
Tom Rini | aca5cd2 | 2016-09-08 16:11:59 -0400 | [diff] [blame] | 76 | CONFIG_SYSRESET=y |
Eddie Cai | c00d165 | 2017-03-07 12:47:07 +0800 | [diff] [blame] | 77 | CONFIG_USB=y |
Philipp Tomsich | 4ac72f5 | 2017-07-03 18:30:06 +0200 | [diff] [blame] | 78 | CONFIG_USB_DWC2=y |
Adam Ford | 6574864 | 2018-01-02 10:39:52 -0600 | [diff] [blame] | 79 | CONFIG_ROCKCHIP_USB2_PHY=y |
Tom Rini | ecad705 | 2017-08-25 17:50:26 -0400 | [diff] [blame] | 80 | CONFIG_USB_GADGET=y |
81 | CONFIG_USB_GADGET_DWC2_OTG=y | ||||
Chris Packham | ae35844 | 2017-08-28 20:50:45 +1200 | [diff] [blame] | 82 | CONFIG_USB_HOST_ETHER=y |
Chris Packham | f58ad98 | 2017-08-28 20:50:46 +1200 | [diff] [blame] | 83 | CONFIG_USB_ETHER_ASIX=y |
84 | CONFIG_USB_ETHER_SMSC95XX=y | ||||
Xu Ziyuan | 1c62d99 | 2016-08-01 08:46:19 +0800 | [diff] [blame] | 85 | CONFIG_CMD_DHRYSTONE=y |
86 | CONFIG_ERRNO_STR=y |