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wdenkc6097192002-11-03 00:24:07 +00001/*
2 * Simple serial driver for Cogent motherboard serial ports
3 * for use during boot
4 */
5
6#include <common.h>
Masahiro Yamada02987932013-11-11 10:30:20 +09007#include "serial.h"
Marek Vasutd25c39d2012-09-13 12:29:31 +02008#include <serial.h>
9#include <linux/compiler.h>
wdenkc6097192002-11-03 00:24:07 +000010
Wolfgang Denkd87080b2006-03-31 18:32:53 +020011DECLARE_GLOBAL_DATA_PTR;
12
wdenkc6097192002-11-03 00:24:07 +000013#if (CMA_MB_CAPS & CMA_MB_CAP_SERPAR)
14
15#if (defined(CONFIG_8xx) && defined(CONFIG_8xx_CONS_NONE)) || \
Masahiro Yamada58dac322014-03-05 17:40:10 +090016 (defined(CONFIG_MPC8260) && defined(CONFIG_CONS_NONE))
wdenkc6097192002-11-03 00:24:07 +000017
18#if CONFIG_CONS_INDEX == 1
19#define CMA_MB_SERIAL_BASE CMA_MB_SERIALA_BASE
20#elif CONFIG_CONS_INDEX == 2
21#define CMA_MB_SERIAL_BASE CMA_MB_SERIALB_BASE
22#elif CONFIG_CONS_INDEX == 3 && (CMA_MB_CAPS & CMA_MB_CAP_SER2)
23#define CMA_MB_SERIAL_BASE CMA_MB_SER2A_BASE
24#elif CONFIG_CONS_INDEX == 4 && (CMA_MB_CAPS & CMA_MB_CAP_SER2)
25#define CMA_MB_SERIAL_BASE CMA_MB_SER2B_BASE
26#else
27#error CONFIG_CONS_INDEX must be configured for Cogent motherboard serial
28#endif
29
Marek Vasutd25c39d2012-09-13 12:29:31 +020030static int cogent_serial_init(void)
wdenkc6097192002-11-03 00:24:07 +000031{
Wolfgang Denkd87080b2006-03-31 18:32:53 +020032 cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE;
wdenkc6097192002-11-03 00:24:07 +000033
Wolfgang Denkd87080b2006-03-31 18:32:53 +020034 cma_mb_reg_write (&mbsp->ser_ier, 0x00); /* turn off interrupts */
35 serial_setbrg ();
36 cma_mb_reg_write (&mbsp->ser_lcr, 0x03); /* 8 data, 1 stop, no parity */
37 cma_mb_reg_write (&mbsp->ser_mcr, 0x03); /* RTS/DTR */
38 cma_mb_reg_write (&mbsp->ser_fcr, 0x07); /* Clear & enable FIFOs */
wdenkc6097192002-11-03 00:24:07 +000039
Wolfgang Denkd87080b2006-03-31 18:32:53 +020040 return (0);
wdenkc6097192002-11-03 00:24:07 +000041}
42
Marek Vasutd25c39d2012-09-13 12:29:31 +020043static void cogent_serial_setbrg(void)
wdenkc6097192002-11-03 00:24:07 +000044{
Wolfgang Denkd87080b2006-03-31 18:32:53 +020045 cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE;
46 unsigned int divisor;
47 unsigned char lcr;
wdenkc6097192002-11-03 00:24:07 +000048
Wolfgang Denkd87080b2006-03-31 18:32:53 +020049 if ((divisor = br_to_div (gd->baudrate)) == 0)
50 divisor = DEFDIV;
wdenkc6097192002-11-03 00:24:07 +000051
Wolfgang Denkd87080b2006-03-31 18:32:53 +020052 lcr = cma_mb_reg_read (&mbsp->ser_lcr);
53 cma_mb_reg_write (&mbsp->ser_lcr, lcr | 0x80); /* Access baud rate(set DLAB) */
54 cma_mb_reg_write (&mbsp->ser_brl, divisor & 0xff);
55 cma_mb_reg_write (&mbsp->ser_brh, (divisor >> 8) & 0xff);
56 cma_mb_reg_write (&mbsp->ser_lcr, lcr); /* unset DLAB */
wdenkc6097192002-11-03 00:24:07 +000057}
58
Marek Vasutd25c39d2012-09-13 12:29:31 +020059static void cogent_serial_putc(const char c)
wdenkc6097192002-11-03 00:24:07 +000060{
Wolfgang Denkd87080b2006-03-31 18:32:53 +020061 cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE;
wdenkc6097192002-11-03 00:24:07 +000062
Wolfgang Denkd87080b2006-03-31 18:32:53 +020063 if (c == '\n')
64 serial_putc ('\r');
wdenkc6097192002-11-03 00:24:07 +000065
Wolfgang Denkd87080b2006-03-31 18:32:53 +020066 while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_THRE) == 0);
wdenkc6097192002-11-03 00:24:07 +000067
Wolfgang Denkd87080b2006-03-31 18:32:53 +020068 cma_mb_reg_write (&mbsp->ser_thr, c);
wdenkc6097192002-11-03 00:24:07 +000069}
70
Marek Vasutd25c39d2012-09-13 12:29:31 +020071static int cogent_serial_getc(void)
wdenkc6097192002-11-03 00:24:07 +000072{
Wolfgang Denkd87080b2006-03-31 18:32:53 +020073 cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE;
wdenkc6097192002-11-03 00:24:07 +000074
Wolfgang Denkd87080b2006-03-31 18:32:53 +020075 while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_DR) == 0);
wdenkc6097192002-11-03 00:24:07 +000076
Wolfgang Denkd87080b2006-03-31 18:32:53 +020077 return ((int) cma_mb_reg_read (&mbsp->ser_rhr) & 0x7f);
wdenkc6097192002-11-03 00:24:07 +000078}
79
Marek Vasutd25c39d2012-09-13 12:29:31 +020080static int cogent_serial_tstc(void)
wdenkc6097192002-11-03 00:24:07 +000081{
Wolfgang Denkd87080b2006-03-31 18:32:53 +020082 cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE;
wdenkc6097192002-11-03 00:24:07 +000083
Wolfgang Denkd87080b2006-03-31 18:32:53 +020084 return ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_DR) != 0);
wdenkc6097192002-11-03 00:24:07 +000085}
86
Marek Vasutd25c39d2012-09-13 12:29:31 +020087static struct serial_device cogent_serial_drv = {
88 .name = "cogent_serial",
89 .start = cogent_serial_init,
90 .stop = NULL,
91 .setbrg = cogent_serial_setbrg,
92 .putc = cogent_serial_putc,
Marek Vasutec3fd682012-10-06 14:07:02 +000093 .puts = default_serial_puts,
Marek Vasutd25c39d2012-09-13 12:29:31 +020094 .getc = cogent_serial_getc,
95 .tstc = cogent_serial_tstc,
96};
97
98void cogent_serial_initialize(void)
99{
100 serial_register(&cogent_serial_drv);
101}
102
103__weak struct serial_device *default_serial_console(void)
104{
105 return &cogent_serial_drv;
106}
wdenkc6097192002-11-03 00:24:07 +0000107#endif /* CONS_NONE */
108
Jon Loeligerfcec2eb2007-07-09 18:19:09 -0500109#if defined(CONFIG_CMD_KGDB) && \
wdenkc6097192002-11-03 00:24:07 +0000110 defined(CONFIG_KGDB_NONE)
111
112#if CONFIG_KGDB_INDEX == CONFIG_CONS_INDEX
113#error Console and kgdb are on the same serial port - this is not supported
114#endif
115
116#if CONFIG_KGDB_INDEX == 1
117#define CMA_MB_KGDB_SER_BASE CMA_MB_SERIALA_BASE
118#elif CONFIG_KGDB_INDEX == 2
119#define CMA_MB_KGDB_SER_BASE CMA_MB_SERIALB_BASE
120#elif CONFIG_KGDB_INDEX == 3 && (CMA_MB_CAPS & CMA_MB_CAP_SER2)
121#define CMA_MB_KGDB_SER_BASE CMA_MB_SER2A_BASE
122#elif CONFIG_KGDB_INDEX == 4 && (CMA_MB_CAPS & CMA_MB_CAP_SER2)
123#define CMA_MB_KGDB_SER_BASE CMA_MB_SER2B_BASE
124#else
125#error CONFIG_KGDB_INDEX must be configured for Cogent motherboard serial
126#endif
127
Wolfgang Denkd87080b2006-03-31 18:32:53 +0200128void kgdb_serial_init (void)
wdenkc6097192002-11-03 00:24:07 +0000129{
Wolfgang Denkd87080b2006-03-31 18:32:53 +0200130 cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE;
131 unsigned int divisor;
wdenkc6097192002-11-03 00:24:07 +0000132
Wolfgang Denkd87080b2006-03-31 18:32:53 +0200133 if ((divisor = br_to_div (CONFIG_KGDB_BAUDRATE)) == 0)
134 divisor = DEFDIV;
wdenkc6097192002-11-03 00:24:07 +0000135
Wolfgang Denkd87080b2006-03-31 18:32:53 +0200136 cma_mb_reg_write (&mbsp->ser_ier, 0x00); /* turn off interrupts */
137 cma_mb_reg_write (&mbsp->ser_lcr, 0x80); /* Access baud rate(set DLAB) */
138 cma_mb_reg_write (&mbsp->ser_brl, divisor & 0xff);
139 cma_mb_reg_write (&mbsp->ser_brh, (divisor >> 8) & 0xff);
140 cma_mb_reg_write (&mbsp->ser_lcr, 0x03); /* 8 data, 1 stop, no parity */
141 cma_mb_reg_write (&mbsp->ser_mcr, 0x03); /* RTS/DTR */
142 cma_mb_reg_write (&mbsp->ser_fcr, 0x07); /* Clear & enable FIFOs */
wdenkc6097192002-11-03 00:24:07 +0000143
Wolfgang Denkd87080b2006-03-31 18:32:53 +0200144 printf ("[on cma10x serial port B] ");
wdenkc6097192002-11-03 00:24:07 +0000145}
146
Wolfgang Denkd87080b2006-03-31 18:32:53 +0200147void putDebugChar (int c)
wdenkc6097192002-11-03 00:24:07 +0000148{
Wolfgang Denkd87080b2006-03-31 18:32:53 +0200149 cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE;
wdenkc6097192002-11-03 00:24:07 +0000150
Wolfgang Denkd87080b2006-03-31 18:32:53 +0200151 while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_THRE) == 0);
wdenkc6097192002-11-03 00:24:07 +0000152
Wolfgang Denkd87080b2006-03-31 18:32:53 +0200153 cma_mb_reg_write (&mbsp->ser_thr, c & 0xff);
wdenkc6097192002-11-03 00:24:07 +0000154}
155
Wolfgang Denkd87080b2006-03-31 18:32:53 +0200156void putDebugStr (const char *str)
wdenkc6097192002-11-03 00:24:07 +0000157{
Wolfgang Denkd87080b2006-03-31 18:32:53 +0200158 while (*str != '\0') {
159 if (*str == '\n')
160 putDebugChar ('\r');
161 putDebugChar (*str++);
162 }
wdenkc6097192002-11-03 00:24:07 +0000163}
164
Wolfgang Denkd87080b2006-03-31 18:32:53 +0200165int getDebugChar (void)
wdenkc6097192002-11-03 00:24:07 +0000166{
Wolfgang Denkd87080b2006-03-31 18:32:53 +0200167 cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE;
wdenkc6097192002-11-03 00:24:07 +0000168
Wolfgang Denkd87080b2006-03-31 18:32:53 +0200169 while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_DR) == 0);
wdenkc6097192002-11-03 00:24:07 +0000170
Wolfgang Denkd87080b2006-03-31 18:32:53 +0200171 return ((int) cma_mb_reg_read (&mbsp->ser_rhr) & 0x7f);
wdenkc6097192002-11-03 00:24:07 +0000172}
173
Wolfgang Denkd87080b2006-03-31 18:32:53 +0200174void kgdb_interruptible (int yes)
wdenkc6097192002-11-03 00:24:07 +0000175{
Wolfgang Denkd87080b2006-03-31 18:32:53 +0200176 cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE;
wdenkc6097192002-11-03 00:24:07 +0000177
Wolfgang Denkd87080b2006-03-31 18:32:53 +0200178 if (yes == 1) {
179 printf ("kgdb: turning serial ints on\n");
180 cma_mb_reg_write (&mbsp->ser_ier, 0xf);
181 } else {
182 printf ("kgdb: turning serial ints off\n");
183 cma_mb_reg_write (&mbsp->ser_ier, 0x0);
184 }
wdenkc6097192002-11-03 00:24:07 +0000185}
186
187#endif /* KGDB && KGDB_NONE */
188
189#endif /* CAPS & SERPAR */