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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Minkyu Kangc474a8e2010-05-31 22:02:42 +09002/*
3 * Copyright (C) 2009 Samsung Electronics
4 * Minkyu Kang <mk7.kang@samsung.com>
5 * Kyungmin Park <kyungmin.park@samsung.com>
6 *
7 * Configuation settings for the SAMSUNG Universal (s5pc100) board.
Minkyu Kangc474a8e2010-05-31 22:02:42 +09008 */
9
10#ifndef __CONFIG_H
11#define __CONFIG_H
12
Mateusz Zalegaa45ddf72014-04-28 21:13:29 +020013#include <linux/sizes.h>
Minkyu Kangc474a8e2010-05-31 22:02:42 +090014#include <asm/arch/cpu.h> /* get chip and board defs */
15
Minkyu Kangc474a8e2010-05-31 22:02:42 +090016/* DRAM Base */
Tom Riniaa6e94d2022-11-16 13:10:37 -050017#define CFG_SYS_SDRAM_BASE 0x30000000
Minkyu Kangc474a8e2010-05-31 22:02:42 +090018
Minkyu Kang35bea612013-08-06 20:57:53 +090019/* Text Base */
Minkyu Kang35bea612013-08-06 20:57:53 +090020
Minkyu Kang87f314e2010-07-06 20:58:41 +090021/* MMC */
Simon Glass311757b2014-10-07 22:01:50 -060022#define SDHCI_MAX_HOSTS 4
Minkyu Kang87f314e2010-07-06 20:58:41 +090023
Mateusz Zalega2d281b32014-04-28 21:13:30 +020024/* USB Composite download gadget - g_dnl */
Ɓukasz Majewski0fabb6a2014-06-09 14:02:16 +020025#define DFU_DEFAULT_POLL_TIMEOUT 300
26
Minkyu Kangc474a8e2010-05-31 22:02:42 +090027/* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */
Minkyu Kangc474a8e2010-05-31 22:02:42 +090028
Mateusz Zalega2d281b32014-04-28 21:13:30 +020029/* partitions definitions */
30#define PARTS_CSA "csa-mmc"
31#define PARTS_BOOTLOADER "u-boot"
32#define PARTS_BOOT "boot"
33#define PARTS_ROOT "platform"
34#define PARTS_DATA "data"
35#define PARTS_CSC "csc"
36#define PARTS_UMS "ums"
37
Tom Rinib8089c62022-12-04 10:03:38 -050038#define CFG_DFU_ALT \
Mateusz Zalega2d281b32014-04-28 21:13:30 +020039 "u-boot raw 0x80 0x400;" \
40 "uImage ext4 0 2;" \
41 "exynos3-goni.dtb ext4 0 2;" \
42 ""PARTS_ROOT" part 0 5\0"
43
44#define PARTS_DEFAULT \
45 "uuid_disk=${uuid_gpt_disk};" \
46 "name="PARTS_CSA",size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
47 "name="PARTS_BOOTLOADER",size=60MiB," \
48 "uuid=${uuid_gpt_"PARTS_BOOTLOADER"};" \
49 "name="PARTS_BOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
50 "name="PARTS_ROOT",size=1GiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
51 "name="PARTS_DATA",size=3GiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
52 "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
53 "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
Minkyu Kangc474a8e2010-05-31 22:02:42 +090054
Tom Rini428eb2e2022-03-30 18:07:16 -040055#define COMMON_BOOT "${console} ${meminfo} ${mtdparts}"
Minkyu Kangc474a8e2010-05-31 22:02:42 +090056
Tom Rini0613c362022-12-04 10:03:50 -050057#define CFG_EXTRA_ENV_SETTINGS \
Tom Rini428eb2e2022-03-30 18:07:16 -040058 "updateb=" \
59 "onenand erase 0x0 0x100000;" \
60 "onenand write 0x32008000 0x0 0x100000\0" \
Minkyu Kangc474a8e2010-05-31 22:02:42 +090061 "updatek=" \
62 "onenand erase 0xc00000 0x600000;" \
63 "onenand write 0x31008000 0xc00000 0x600000\0" \
64 "updateu=" \
65 "onenand erase 0x01560000 0x1eaa0000;" \
66 "onenand write 0x32000000 0x1260000 0x8C0000\0" \
67 "bootk=" \
Mateusz Zalegaa45ddf72014-04-28 21:13:29 +020068 "run loaduimage;" \
Minkyu Kangc474a8e2010-05-31 22:02:42 +090069 "bootm 0x30007FC0\0" \
70 "flashboot=" \
71 "set bootargs root=/dev/mtdblock${bootblock} " \
Mateusz Zalegaa45ddf72014-04-28 21:13:29 +020072 "rootfstype=${rootfstype} ${opts} " \
Tom Rini428eb2e2022-03-30 18:07:16 -040073 "${lcdinfo} " COMMON_BOOT "; run bootk\0" \
Minkyu Kangc474a8e2010-05-31 22:02:42 +090074 "ubifsboot=" \
75 "set bootargs root=ubi0!rootfs rootfstype=ubifs " \
Mateusz Zalegaa45ddf72014-04-28 21:13:29 +020076 "${opts} ${lcdinfo} " \
Tom Rini428eb2e2022-03-30 18:07:16 -040077 COMMON_BOOT "; run bootk\0" \
Minkyu Kangc474a8e2010-05-31 22:02:42 +090078 "tftpboot=" \
79 "set bootargs root=ubi0!rootfs rootfstype=ubifs " \
Tom Rini428eb2e2022-03-30 18:07:16 -040080 "${opts} ${lcdinfo} " COMMON_BOOT \
Mateusz Zalegaa45ddf72014-04-28 21:13:29 +020081 "; tftp 0x30007FC0 uImage; bootm 0x30007FC0\0" \
Minkyu Kangc474a8e2010-05-31 22:02:42 +090082 "ramboot=" \
Tom Rini428eb2e2022-03-30 18:07:16 -040083 "set bootargs root=/dev/ram0 rw rootfstype=ext4" \
84 " ${console} ${meminfo} " \
Mateusz Zalegaa45ddf72014-04-28 21:13:29 +020085 "initrd=0x33000000,8M ramdisk=8192\0" \
Minkyu Kangc474a8e2010-05-31 22:02:42 +090086 "mmcboot=" \
Mateusz Zalegaa45ddf72014-04-28 21:13:29 +020087 "set bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
88 "rootfstype=${rootfstype} ${opts} ${lcdinfo} " \
Tom Rini428eb2e2022-03-30 18:07:16 -040089 COMMON_BOOT "; run bootk\0" \
Minkyu Kangc474a8e2010-05-31 22:02:42 +090090 "boottrace=setenv opts initcall_debug; run bootcmd\0" \
91 "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
92 "verify=n\0" \
Mateusz Zalegaa45ddf72014-04-28 21:13:29 +020093 "rootfstype=ext4\0" \
Andre Heider9c042652020-09-17 08:52:01 +020094 "console=console=ttySAC2,115200n8\0" \
Minkyu Kangc474a8e2010-05-31 22:02:42 +090095 "meminfo=mem=80M mem=256M@0x40000000 mem=128M@0x50000000\0" \
Mateusz Zalega2d281b32014-04-28 21:13:30 +020096 "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x30007FC0 uImage\0" \
Mateusz Zalegaa45ddf72014-04-28 21:13:29 +020097 "mmcdev=0\0" \
98 "mmcbootpart=2\0" \
99 "mmcrootpart=5\0" \
Mateusz Zalega2d281b32014-04-28 21:13:30 +0200100 "partitions=" PARTS_DEFAULT \
Minkyu Kangc474a8e2010-05-31 22:02:42 +0900101 "bootblock=9\0" \
102 "ubiblock=8\0" \
103 "ubi=enabled\0" \
Mateusz Zalega2d281b32014-04-28 21:13:30 +0200104 "opts=always_resume=1\0" \
Tom Rinib8089c62022-12-04 10:03:38 -0500105 "dfu_alt_info=" CFG_DFU_ALT "\0"
Minkyu Kangc474a8e2010-05-31 22:02:42 +0900106
Minkyu Kangc474a8e2010-05-31 22:02:42 +0900107/* Goni has 3 banks of DRAM, but swap the bank */
Tom Riniaa6e94d2022-11-16 13:10:37 -0500108#define PHYS_SDRAM_1 CFG_SYS_SDRAM_BASE /* OneDRAM Bank #0 */
Minkyu Kangc474a8e2010-05-31 22:02:42 +0900109#define PHYS_SDRAM_1_SIZE (80 << 20) /* 80 MB in Bank #0 */
110#define PHYS_SDRAM_2 0x40000000 /* mDDR DMC1 Bank #1 */
111#define PHYS_SDRAM_2_SIZE (256 << 20) /* 256 MB in Bank #1 */
112#define PHYS_SDRAM_3 0x50000000 /* mDDR DMC2 Bank #2 */
113#define PHYS_SDRAM_3_SIZE (128 << 20) /* 128 MB in Bank #2 */
114
Tom Rini65cc0e22022-11-16 13:10:41 -0500115#define CFG_SYS_ONENAND_BASE 0xB0000000
Minkyu Kangc474a8e2010-05-31 22:02:42 +0900116
Minkyu Kangc474a8e2010-05-31 22:02:42 +0900117#endif /* __CONFIG_H */