blob: dcd06976773fa644a8bada8265c86789824f8b53 [file] [log] [blame]
Patrice Chotardc0cdd5a2017-12-12 09:49:44 +01001CONFIG_ARM=y
2CONFIG_STM32=y
Tom Rini278b90c2018-02-03 12:10:38 -05003CONFIG_SYS_TEXT_BASE=0x08000000
Patrice Chotardc0cdd5a2017-12-12 09:49:44 +01004CONFIG_SYS_MALLOC_F_LEN=0xF00
Tom Rinid168bcb2019-04-29 15:54:04 -04005CONFIG_NR_DRAM_BANKS=1
Patrice Chotardc0cdd5a2017-12-12 09:49:44 +01006CONFIG_STM32F4=y
7CONFIG_TARGET_STM32F469_DISCOVERY=y
Patrice Chotard82ec63a2018-08-03 11:46:20 +02008CONFIG_DISTRO_DEFAULTS=y
Patrice Chotardc0cdd5a2017-12-12 09:49:44 +01009CONFIG_BOOTDELAY=3
Patrice Chotard82ec63a2018-08-03 11:46:20 +020010# CONFIG_USE_BOOTCOMMAND is not set
Adam Ford8ccf98b2018-07-29 13:13:29 -050011CONFIG_MISC_INIT_R=y
Patrice Chotardc0cdd5a2017-12-12 09:49:44 +010012# CONFIG_DISPLAY_CPUINFO is not set
13CONFIG_BOARD_EARLY_INIT_F=y
Patrice Chotardc0cdd5a2017-12-12 09:49:44 +010014CONFIG_SYS_PROMPT="U-Boot > "
Patrice Chotardc0cdd5a2017-12-12 09:49:44 +010015CONFIG_CMD_IMLS=y
16CONFIG_CMD_GPT=y
17# CONFIG_RANDOM_UUID is not set
18CONFIG_CMD_MMC=y
Patrice Chotard0d55c782019-04-30 16:55:56 +020019CONFIG_CMD_SF=y
Patrice Chotardc0cdd5a2017-12-12 09:49:44 +010020# CONFIG_CMD_SETEXPR is not set
Patrice Chotard82ec63a2018-08-03 11:46:20 +020021# CONFIG_CMD_MII is not set
Patrice Chotardc0cdd5a2017-12-12 09:49:44 +010022CONFIG_CMD_CACHE=y
23CONFIG_CMD_TIMER=y
Patrice Chotard82ec63a2018-08-03 11:46:20 +020024# CONFIG_ISO_PARTITION is not set
Patrice Chotardc0cdd5a2017-12-12 09:49:44 +010025CONFIG_OF_CONTROL=y
Tom Rini8c5cad02018-09-03 15:26:12 -040026CONFIG_DEFAULT_DEVICE_TREE="stm32f469-disco"
Patrice Chotardc0cdd5a2017-12-12 09:49:44 +010027CONFIG_DM_MMC=y
28CONFIG_ARM_PL180_MMCI=y
Patrice Chotard0d55c782019-04-30 16:55:56 +020029CONFIG_MTD=y
Patrice Chotardc0cdd5a2017-12-12 09:49:44 +010030CONFIG_MTD_NOR_FLASH=y
Patrice Chotard0d55c782019-04-30 16:55:56 +020031CONFIG_DM_SPI_FLASH=y
32CONFIG_SPI_FLASH=y
33CONFIG_SPI_FLASH_STMICRO=y
Patrice Chotard1aaac8e2019-05-06 11:15:16 +020034# CONFIG_PINCTRL_FULL is not set
Patrice Chotard0d55c782019-04-30 16:55:56 +020035CONFIG_SPI=y
36CONFIG_DM_SPI=y
37CONFIG_STM32_QSPI=y