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Stefan Roese2bae75a2015-04-25 06:29:56 +02001/*
2 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#ifndef _CONFIG_DB_88F6820_GP_H
8#define _CONFIG_DB_88F6820_GP_H
9
10/*
11 * High Level Configuration Options (easy to change)
12 */
Stefan Roese2bae75a2015-04-25 06:29:56 +020013
Stefan Roese2bae75a2015-04-25 06:29:56 +020014#define CONFIG_DISPLAY_BOARDINFO_LATE
15
Stefan Roese2923c2d2015-08-06 14:27:36 +020016/*
17 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
18 * for DDR ECC byte filling in the SPL before loading the main
19 * U-Boot into it.
20 */
21#define CONFIG_SYS_TEXT_BASE 0x00800000
Stefan Roese2bae75a2015-04-25 06:29:56 +020022#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
23
24/*
25 * Commands configuration
26 */
Stefan Roesece2cb1d2015-08-11 12:50:58 +020027#define CONFIG_CMD_PCI
Simon Glassc649e3c2016-05-01 11:36:02 -060028#define CONFIG_SCSI
Stefan Roese2bae75a2015-04-25 06:29:56 +020029
30/* I2C */
31#define CONFIG_SYS_I2C
32#define CONFIG_SYS_I2C_MVTWSI
33#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
34#define CONFIG_SYS_I2C_SLAVE 0x0
35#define CONFIG_SYS_I2C_SPEED 100000
36
37/* SPI NOR flash default params, used by sf commands */
38#define CONFIG_SF_DEFAULT_SPEED 1000000
39#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
Stefan Roese2bae75a2015-04-25 06:29:56 +020040
Stefan Roesee80f1e82015-06-29 14:58:11 +020041/*
42 * SDIO/MMC Card Configuration
43 */
Stefan Roesee80f1e82015-06-29 14:58:11 +020044#define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE
45
Stefan Roese7cbaff92015-06-29 14:58:14 +020046/*
47 * SATA/SCSI/AHCI configuration
48 */
49#define CONFIG_LIBATA
50#define CONFIG_SCSI_AHCI
51#define CONFIG_SCSI_AHCI_PLAT
52#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
53#define CONFIG_SYS_SCSI_MAX_LUN 1
54#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
55 CONFIG_SYS_SCSI_MAX_LUN)
56
Stefan Roesee80f1e82015-06-29 14:58:11 +020057/* Partition support */
Stefan Roesee80f1e82015-06-29 14:58:11 +020058
59/* Additional FS support/configuration */
60#define CONFIG_SUPPORT_VFAT
61
Stefan Roese59565732015-06-29 14:58:16 +020062/* USB/EHCI configuration */
Stefan Roese59565732015-06-29 14:58:16 +020063#define CONFIG_EHCI_IS_TDI
64
Stefan Roese2bae75a2015-04-25 06:29:56 +020065/* Environment in SPI NOR flash */
66#define CONFIG_ENV_IS_IN_SPI_FLASH
67#define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */
68#define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */
69#define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */
70
71#define CONFIG_PHY_MARVELL /* there is a marvell phy */
Stefan Roese2bae75a2015-04-25 06:29:56 +020072#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
73
Stefan Roesece2cb1d2015-08-11 12:50:58 +020074/* PCIe support */
Stefan Roese64512232015-11-25 07:37:00 +010075#ifndef CONFIG_SPL_BUILD
Stefan Roesece2cb1d2015-08-11 12:50:58 +020076#define CONFIG_PCI_MVEBU
Stefan Roesece2cb1d2015-08-11 12:50:58 +020077#define CONFIG_PCI_SCAN_SHOW
Stefan Roese64512232015-11-25 07:37:00 +010078#endif
Stefan Roesece2cb1d2015-08-11 12:50:58 +020079
Stefan Roese2bae75a2015-04-25 06:29:56 +020080#define CONFIG_SYS_ALT_MEMTEST
81
Kevin Smith3fd38af2015-05-18 16:09:46 +000082/* Keep device tree and initrd in lower memory so the kernel can access them */
83#define CONFIG_EXTRA_ENV_SETTINGS \
84 "fdt_high=0x10000000\0" \
85 "initrd_high=0x10000000\0"
86
Stefan Roese9e30b312015-03-25 13:35:15 +010087/* SPL */
Stefan Roese7853c502015-07-20 11:20:40 +020088/*
89 * Select the boot device here
90 *
91 * Currently supported are:
92 * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash
93 * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1)
94 */
95#define SPL_BOOT_SPI_NOR_FLASH 1
96#define SPL_BOOT_SDIO_MMC_CARD 2
97#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH
98
Stefan Roese9e30b312015-03-25 13:35:15 +010099/* Defines for SPL */
100#define CONFIG_SPL_FRAMEWORK
101#define CONFIG_SPL_SIZE (140 << 10)
102#define CONFIG_SPL_TEXT_BASE 0x40000030
103#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030)
104
105#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
106#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
107
Stefan Roese64512232015-11-25 07:37:00 +0100108#ifdef CONFIG_SPL_BUILD
109#define CONFIG_SYS_MALLOC_SIMPLE
110#endif
Stefan Roese9e30b312015-03-25 13:35:15 +0100111
112#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
113#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
114
Stefan Roese7853c502015-07-20 11:20:40 +0200115#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
Stefan Roese9e30b312015-03-25 13:35:15 +0100116/* SPL related SPI defines */
Stefan Roese9e30b312015-03-25 13:35:15 +0100117#define CONFIG_SPL_SPI_LOAD
Stefan Roese09a54c02015-11-20 13:51:57 +0100118#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000
Stefan Roese7853c502015-07-20 11:20:40 +0200119#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
120#endif
121
122#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
123/* SPL related MMC defines */
Stefan Roese7853c502015-07-20 11:20:40 +0200124#define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10)
125#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
Stefan Roese7853c502015-07-20 11:20:40 +0200126#ifdef CONFIG_SPL_BUILD
127#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
128#endif
129#endif
Stefan Roese9e30b312015-03-25 13:35:15 +0100130
Stefan Roese2bae75a2015-04-25 06:29:56 +0200131/*
132 * mv-common.h should be defined after CMD configs since it used them
133 * to enable certain macros
134 */
135#include "mv-common.h"
136
137#endif /* _CONFIG_DB_88F6820_GP_H */