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Tom Warrenf01b6312012-12-11 13:34:18 +00001/*
2 * (C) Copyright 2010-2012
3 * NVIDIA Corporation <www.nvidia.com>
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Tom Warrenf01b6312012-12-11 13:34:18 +00006 */
7
Tom Warrenbfcf46d2013-02-26 12:18:48 +00008#ifndef _TEGRA_COMMON_H_
9#define _TEGRA_COMMON_H_
Alexey Brodkin1ace4022014-02-26 17:47:58 +040010#include <linux/sizes.h>
Tom Warrenf01b6312012-12-11 13:34:18 +000011#include <linux/stringify.h>
12
13/*
14 * High Level Configuration Options
15 */
Tom Warrenf01b6312012-12-11 13:34:18 +000016#define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */
17
Tom Warrenf01b6312012-12-11 13:34:18 +000018#include <asm/arch/tegra.h> /* get chip and board defs */
19
Thierry Redingf41f0a12015-07-28 11:35:54 +020020/* Use the Tegra US timer on ARMv7, but the architected timer on ARMv8. */
21#ifndef CONFIG_ARM64
Rob Herring31df9892013-10-04 10:22:47 -050022#define CONFIG_SYS_TIMER_RATE 1000000
23#define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE
Thierry Redingf41f0a12015-07-28 11:35:54 +020024#endif
Rob Herring31df9892013-10-04 10:22:47 -050025
Tom Warrenf01b6312012-12-11 13:34:18 +000026#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
Tom Warrenf01b6312012-12-11 13:34:18 +000027
28/* Environment */
Tom Warrenf01b6312012-12-11 13:34:18 +000029#define CONFIG_ENV_SIZE 0x2000 /* Total Size Environment */
30
31/*
Tom Warrenbfcf46d2013-02-26 12:18:48 +000032 * NS16550 Configuration
Tom Warrenf01b6312012-12-11 13:34:18 +000033 */
Thomas Chou18746262015-11-19 21:48:11 +080034#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
Tom Warrenf01b6312012-12-11 13:34:18 +000035
36/*
Stephen Warrenf1756032014-04-18 10:56:11 -060037 * Common HW configuration.
38 * If this varies between SoCs later, move to tegraNN-common.h
39 * Note: This is number of devices, not max device ID.
40 */
41#define CONFIG_SYS_MMC_MAX_DEVICE 4
42
43/*
Tom Warrenf01b6312012-12-11 13:34:18 +000044 * select serial console configuration
45 */
Tom Warrenf01b6312012-12-11 13:34:18 +000046
47/* allow to overwrite serial and ethaddr */
48#define CONFIG_ENV_OVERWRITE
Tom Warrenf01b6312012-12-11 13:34:18 +000049
Tom Warrenf01b6312012-12-11 13:34:18 +000050/* turn on command-line edit/hist/auto */
Tom Warrenf01b6312012-12-11 13:34:18 +000051
Tom Warrenf01b6312012-12-11 13:34:18 +000052/*
Tom Warrenf01b6312012-12-11 13:34:18 +000053 * Increasing the size of the IO buffer as default nfsargs size is more
54 * than 256 and so it is not possible to edit it
55 */
Bryan Wu64a4fe72016-09-01 23:49:57 +000056#define CONFIG_SYS_CBSIZE (1024 * 2) /* Console I/O Buffer Size */
Tom Warrenf01b6312012-12-11 13:34:18 +000057/* Print Buffer Size */
Bryan Wu64a4fe72016-09-01 23:49:57 +000058#define CONFIG_SYS_MAXARGS 64 /* max number of command args */
59
Tom Warrenf01b6312012-12-11 13:34:18 +000060/* Boot Argument Buffer Size */
61#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
62
63#define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000)
64#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
65
Tom Warrenf01b6312012-12-11 13:34:18 +000066/*-----------------------------------------------------------------------
67 * Physical Memory Map
68 */
Stephen Warrenbbc1b992015-08-07 16:12:45 -060069#define CONFIG_NR_DRAM_BANKS 2
Tom Warrenf01b6312012-12-11 13:34:18 +000070#define PHYS_SDRAM_1 NV_PA_SDRC_CS0
71#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */
72
73#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
74#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
75
76#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */
77
Stephen Warrenf0975322017-12-19 18:30:37 -070078#ifndef CONFIG_ARM64
Tom Warrenf01b6312012-12-11 13:34:18 +000079#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE
80#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
81#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
82 CONFIG_SYS_INIT_RAM_SIZE - \
83 GENERATED_GBL_DATA_SIZE)
Stephen Warrenf0975322017-12-19 18:30:37 -070084#endif
Tom Warrenf01b6312012-12-11 13:34:18 +000085
Stephen Warren0d1bd152017-12-19 18:30:35 -070086#ifndef CONFIG_ARM64
Tom Warrenf01b6312012-12-11 13:34:18 +000087/* Defines for SPL */
Albert ARIBAUD6ebc3462013-04-12 05:14:30 +000088#define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \
Tom Warrenf01b6312012-12-11 13:34:18 +000089 CONFIG_SPL_TEXT_BASE)
90#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000
Stephen Warren0d1bd152017-12-19 18:30:35 -070091#endif
Tom Warrenf01b6312012-12-11 13:34:18 +000092
Stephen Warrena885f852013-02-28 15:03:45 +000093/* Misc utility code */
94#define CONFIG_BOUNCE_BUFFER
Simon Glassdd7f65f2013-03-05 14:39:56 +000095
Tom Warrenf01b6312012-12-11 13:34:18 +000096#endif /* _TEGRA_COMMON_H_ */