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Heiko Schocherc0dcece2013-08-19 16:39:01 +02001/*
2 * siemens rut
3 * (C) Copyright 2013 Siemens Schweiz AG
4 * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de.
5 *
6 * Based on:
7 * U-Boot file:/include/configs/am335x_evm.h
8 *
9 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
10 *
11 * SPDX-License-Identifier: GPL-2.0+
12 */
13
14#ifndef __CONFIG_RUT_H
15#define __CONFIG_RUT_H
16
17#define CONFIG_SIEMENS_RUT
Heiko Schocherc0dcece2013-08-19 16:39:01 +020018#define CONFIG_SIEMENS_MACH_TYPE MACH_TYPE_RUT
19
20#include "siemens-am33x-common.h"
21
Heiko Schocherc0dcece2013-08-19 16:39:01 +020022#define RUT_IOCTRL_VAL 0x18b
23#define DDR_PLL_FREQ 303
24
25 /* Physical Memory Map */
26#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MiB */
27
28/* I2C Configuration */
29#define CONFIG_SYS_I2C_SPEED 100000
30
31#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
32#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
33#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 byte pages */
34#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* take up to 10 msec */
35
Heiko Schocherc0dcece2013-08-19 16:39:01 +020036#define CONFIG_PHY_NATSEMI
37
38#define CONFIG_FACTORYSET
39
Heiko Schocherc0dcece2013-08-19 16:39:01 +020040/* Watchdog */
41#define WATCHDOG_TRIGGER_GPIO 14
42
43#ifndef CONFIG_SPL_BUILD
44
Heiko Schocher61159b72015-06-16 14:59:34 +020045/* Use common default */
46#define MTDPARTS_DEFAULT MTDPARTS_DEFAULT_V1
47
Heiko Schocherc0dcece2013-08-19 16:39:01 +020048/* Default env settings */
49#define CONFIG_EXTRA_ENV_SETTINGS \
50 "hostname=rut\0" \
Heiko Schocher6b3943f2016-06-07 08:55:45 +020051 "ubi_off=2048\0"\
Samuel Egli56eb3da2013-11-04 14:05:03 +010052 "nand_img_size=0x500000\0" \
53 "splashpos=m,m\0" \
Heiko Schocherc0dcece2013-08-19 16:39:01 +020054 "optargs=fixrtc --no-log consoleblank=0 \0" \
Heiko Schocher61159b72015-06-16 14:59:34 +020055 CONFIG_ENV_SETTINGS_V1 \
56 CONFIG_ENV_SETTINGS_NAND_V1 \
Heiko Schocherc0dcece2013-08-19 16:39:01 +020057 "mmc_dev=0\0" \
58 "mmc_root=/dev/mmcblk0p2 rw\0" \
59 "mmc_root_fs_type=ext4 rootwait\0" \
60 "mmc_load_uimage=" \
61 "mmc rescan; " \
62 "setenv bootfile uImage;" \
63 "fatload mmc ${mmc_dev} ${kloadaddr} ${bootfile}\0" \
64 "loadbootenv=fatload mmc ${mmc_dev} ${loadaddr} ${bootenv}\0" \
65 "importbootenv=echo Importing environment from mmc ...; " \
66 "env import -t $loadaddr $filesize\0" \
67 "mmc_args=run bootargs_defaults;" \
68 "mtdparts default;" \
69 "setenv bootargs ${bootargs} " \
70 "root=${mmc_root} ${mtdparts}" \
71 "rootfstype=${mmc_root_fs_type} ip=${ip_method} " \
72 "eth=${ethaddr} " \
73 "\0" \
74 "mmc_boot=run mmc_args; " \
75 "run mmc_load_uimage; " \
76 "bootm ${kloadaddr}\0" \
77 ""
78
79#ifndef CONFIG_RESTORE_FLASH
80/* set to negative value for no autoboot */
Heiko Schocherc0dcece2013-08-19 16:39:01 +020081
82#define CONFIG_BOOTCOMMAND \
83 "if mmc rescan; then " \
84 "echo SD/MMC found on device ${mmc_dev};" \
85 "if run loadbootenv; then " \
86 "echo Loaded environment from ${bootenv};" \
87 "run importbootenv;" \
88 "fi;" \
89 "if test -n $uenvcmd; then " \
90 "echo Running uenvcmd ...;" \
91 "run uenvcmd;" \
92 "fi;" \
93 "if run mmc_load_uimage; then " \
94 "run mmc_args;" \
95 "bootm ${kloadaddr};" \
96 "fi;" \
97 "fi;" \
98 "run nand_boot;" \
Samuel Egli56eb3da2013-11-04 14:05:03 +010099 "reset;"
Heiko Schocherc0dcece2013-08-19 16:39:01 +0200100
101#else
Heiko Schocherc0dcece2013-08-19 16:39:01 +0200102
103#define CONFIG_BOOTCOMMAND \
104 "setenv autoload no; " \
105 "dhcp; " \
106 "if tftp 80000000 debrick.scr; then " \
107 "source 80000000; " \
108 "fi"
109#endif
110
111#endif /* CONFIG_SPL_BUILD */
112
Heiko Schocherc0dcece2013-08-19 16:39:01 +0200113#if defined(CONFIG_VIDEO)
114#define CONFIG_VIDEO_DA8XX
Heiko Schocherc0dcece2013-08-19 16:39:01 +0200115#define CONFIG_SPLASH_SCREEN
116#define CONFIG_SPLASH_SCREEN_ALIGN
117#define CONFIG_VIDEO_LOGO
118#define CONFIG_VIDEO_BMP_RLE8
119#define CONFIG_VIDEO_BMP_LOGO
Heiko Schocherc0dcece2013-08-19 16:39:01 +0200120#define DA8XX_LCD_CNTL_BASE LCD_CNTL_BASE
121
122#define CONFIG_SPI
123#define CONFIG_OMAP3_SPI
124
125#define BOARD_LCD_RESET 115 /* Bank 3 pin 19 */
Heiko Schocherc0dcece2013-08-19 16:39:01 +0200126#define CONFIG_FORMIKE
Samuel Egli56eb3da2013-11-04 14:05:03 +0100127#define DISPL_PLL_SPREAD_SPECTRUM
Heiko Schocherc0dcece2013-08-19 16:39:01 +0200128#endif
129
Heiko Schocherc0dcece2013-08-19 16:39:01 +0200130#endif /* ! __CONFIG_RUT_H */