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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0
Marek Vasutd21f08b2017-10-09 21:08:10 +02002/*
3 * Device Tree Source for the Eagle board
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 * Copyright (C) 2017 Cogent Embedded, Inc.
Marek Vasutd21f08b2017-10-09 21:08:10 +02007 */
8
9/dts-v1/;
10#include "r8a77970.dtsi"
Marek Vasut6d82ed82018-06-16 02:15:12 +020011#include <dt-bindings/gpio/gpio.h>
Marek Vasutd21f08b2017-10-09 21:08:10 +020012
13/ {
14 model = "Renesas Eagle board based on r8a77970";
15 compatible = "renesas,eagle", "renesas,r8a77970";
16
17 aliases {
18 serial0 = &scif0;
19 ethernet0 = &avb;
Marek Vasut5e7f63d2018-02-13 21:34:03 +010020 spi0 = &rpc;
Marek Vasutd21f08b2017-10-09 21:08:10 +020021 };
22
23 chosen {
24 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
25 stdout-path = "serial0:115200n8";
26 };
27
28 memory@48000000 {
29 device_type = "memory";
30 /* first 128MB is reserved for secure area. */
31 reg = <0x0 0x48000000 0x0 0x38000000>;
32 };
33};
34
Marek Vasut2519a292018-06-06 20:03:30 +020035&avb {
Marek Vasut29904b92018-06-16 01:16:41 +020036 pinctrl-0 = <&avb0_pins>;
37 pinctrl-names = "default";
Marek Vasut2519a292018-06-06 20:03:30 +020038 renesas,no-ether-link;
39 phy-handle = <&phy0>;
40 phy-mode = "rgmii-id";
41 status = "okay";
42
43 phy0: ethernet-phy@0 {
44 rxc-skew-ps = <1500>;
45 reg = <0>;
46 interrupt-parent = <&gpio1>;
47 interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
Marek Vasutea273e82018-06-18 04:09:10 +020048 reset-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
Marek Vasut2519a292018-06-06 20:03:30 +020049 };
50};
51
Marek Vasutd21f08b2017-10-09 21:08:10 +020052&extal_clk {
53 clock-frequency = <16666666>;
54};
55
56&extalr_clk {
57 clock-frequency = <32768>;
58};
59
Marek Vasut2519a292018-06-06 20:03:30 +020060&i2c0 {
61 pinctrl-0 = <&i2c0_pins>;
Marek Vasutd21f08b2017-10-09 21:08:10 +020062 pinctrl-names = "default";
63
Marek Vasut2519a292018-06-06 20:03:30 +020064 status = "okay";
65 clock-frequency = <400000>;
66
67 io_expander: gpio@20 {
68 compatible = "onnn,pca9654";
69 reg = <0x20>;
70 gpio-controller;
71 #gpio-cells = <2>;
72 };
73};
74
75&pfc {
Marek Vasut29904b92018-06-16 01:16:41 +020076 avb0_pins: avb {
77 mux {
78 groups = "avb0_link", "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk";
79 function = "avb0";
80 };
81 };
82
Marek Vasut2519a292018-06-06 20:03:30 +020083 i2c0_pins: i2c0 {
84 groups = "i2c0";
85 function = "i2c0";
86 };
87
Marek Vasutd21f08b2017-10-09 21:08:10 +020088 scif0_pins: scif0 {
89 groups = "scif0_data";
90 function = "scif0";
91 };
Marek Vasutd21f08b2017-10-09 21:08:10 +020092};
93
Marek Vasut5e7f63d2018-02-13 21:34:03 +010094&rpc {
95 num-cs = <1>;
96 status = "okay";
97 spi-max-frequency = <50000000>;
98 #address-cells = <1>;
99 #size-cells = <0>;
100
101 flash0: spi-flash@0 {
102 #address-cells = <1>;
103 #size-cells = <1>;
104 compatible = "s25fs512s", "spi-flash", "jedec,spi-nor";
105 spi-max-frequency = <50000000>;
106 spi-tx-bus-width = <1>;
107 spi-rx-bus-width = <1>;
108 reg = <0>;
109 status = "okay";
110 };
111};
112
Marek Vasut2519a292018-06-06 20:03:30 +0200113&rwdt {
114 timeout-sec = <60>;
115 status = "okay";
116};
117
Marek Vasutd21f08b2017-10-09 21:08:10 +0200118&scif0 {
119 pinctrl-0 = <&scif0_pins>;
120 pinctrl-names = "default";
121
122 status = "okay";
123};