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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Tom Warrenf01b6312012-12-11 13:34:18 +00002/*
3 * (C) Copyright 2010-2012
4 * NVIDIA Corporation <www.nvidia.com>
Tom Warrenf01b6312012-12-11 13:34:18 +00005 */
6
Tom Warrenbfcf46d2013-02-26 12:18:48 +00007#ifndef _TEGRA_COMMON_H_
8#define _TEGRA_COMMON_H_
Alexey Brodkin1ace4022014-02-26 17:47:58 +04009#include <linux/sizes.h>
Tom Warrenf01b6312012-12-11 13:34:18 +000010#include <linux/stringify.h>
11
12/*
13 * High Level Configuration Options
14 */
Tom Warrenf01b6312012-12-11 13:34:18 +000015#define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */
16
Tom Warrenf01b6312012-12-11 13:34:18 +000017#include <asm/arch/tegra.h> /* get chip and board defs */
18
Thierry Redingf41f0a12015-07-28 11:35:54 +020019/* Use the Tegra US timer on ARMv7, but the architected timer on ARMv8. */
20#ifndef CONFIG_ARM64
Rob Herring31df9892013-10-04 10:22:47 -050021#define CONFIG_SYS_TIMER_RATE 1000000
22#define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE
Thierry Redingf41f0a12015-07-28 11:35:54 +020023#endif
Rob Herring31df9892013-10-04 10:22:47 -050024
Tom Warrenf01b6312012-12-11 13:34:18 +000025#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
Tom Warrenf01b6312012-12-11 13:34:18 +000026
27/* Environment */
Tom Warrenf01b6312012-12-11 13:34:18 +000028#define CONFIG_ENV_SIZE 0x2000 /* Total Size Environment */
29
30/*
Tom Warrenbfcf46d2013-02-26 12:18:48 +000031 * NS16550 Configuration
Tom Warrenf01b6312012-12-11 13:34:18 +000032 */
Thomas Chou18746262015-11-19 21:48:11 +080033#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
Tom Warrenf01b6312012-12-11 13:34:18 +000034
35/*
Stephen Warrenf1756032014-04-18 10:56:11 -060036 * Common HW configuration.
37 * If this varies between SoCs later, move to tegraNN-common.h
38 * Note: This is number of devices, not max device ID.
39 */
40#define CONFIG_SYS_MMC_MAX_DEVICE 4
41
42/*
Tom Warrenf01b6312012-12-11 13:34:18 +000043 * select serial console configuration
44 */
Tom Warrenf01b6312012-12-11 13:34:18 +000045
46/* allow to overwrite serial and ethaddr */
47#define CONFIG_ENV_OVERWRITE
Tom Warrenf01b6312012-12-11 13:34:18 +000048
Tom Warrenf01b6312012-12-11 13:34:18 +000049/* turn on command-line edit/hist/auto */
Tom Warrenf01b6312012-12-11 13:34:18 +000050
Tom Warrenf01b6312012-12-11 13:34:18 +000051/*
Tom Warrenf01b6312012-12-11 13:34:18 +000052 * Increasing the size of the IO buffer as default nfsargs size is more
53 * than 256 and so it is not possible to edit it
54 */
Bryan Wu64a4fe72016-09-01 23:49:57 +000055#define CONFIG_SYS_CBSIZE (1024 * 2) /* Console I/O Buffer Size */
Tom Warrenf01b6312012-12-11 13:34:18 +000056/* Print Buffer Size */
Bryan Wu64a4fe72016-09-01 23:49:57 +000057#define CONFIG_SYS_MAXARGS 64 /* max number of command args */
58
Tom Warrenf01b6312012-12-11 13:34:18 +000059/* Boot Argument Buffer Size */
60#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
61
62#define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000)
63#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
64
Tom Warrenf01b6312012-12-11 13:34:18 +000065/*-----------------------------------------------------------------------
66 * Physical Memory Map
67 */
Stephen Warrenbbc1b992015-08-07 16:12:45 -060068#define CONFIG_NR_DRAM_BANKS 2
Tom Warrenf01b6312012-12-11 13:34:18 +000069#define PHYS_SDRAM_1 NV_PA_SDRC_CS0
70#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */
71
72#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
73#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
74
75#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */
76
Stephen Warrenf0975322017-12-19 18:30:37 -070077#ifndef CONFIG_ARM64
Tom Warrenf01b6312012-12-11 13:34:18 +000078#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE
79#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
80#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
81 CONFIG_SYS_INIT_RAM_SIZE - \
82 GENERATED_GBL_DATA_SIZE)
Stephen Warrenf0975322017-12-19 18:30:37 -070083#endif
Tom Warrenf01b6312012-12-11 13:34:18 +000084
Stephen Warren0d1bd152017-12-19 18:30:35 -070085#ifndef CONFIG_ARM64
Tom Warrenf01b6312012-12-11 13:34:18 +000086/* Defines for SPL */
Albert ARIBAUD6ebc3462013-04-12 05:14:30 +000087#define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \
Tom Warrenf01b6312012-12-11 13:34:18 +000088 CONFIG_SPL_TEXT_BASE)
89#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000
Stephen Warren0d1bd152017-12-19 18:30:35 -070090#endif
Tom Warrenf01b6312012-12-11 13:34:18 +000091
Stephen Warrena885f852013-02-28 15:03:45 +000092/* Misc utility code */
93#define CONFIG_BOUNCE_BUFFER
Simon Glassdd7f65f2013-03-05 14:39:56 +000094
Tom Warrenf01b6312012-12-11 13:34:18 +000095#endif /* _TEGRA_COMMON_H_ */