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wdenkba56f622004-02-06 23:19:44 +00001/*
2 * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
3 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +02004 * SPDX-License-Identifier: GPL-2.0+
wdenkba56f622004-02-06 23:19:44 +00005 */
6
Peter Tysere0299072009-07-17 19:01:07 -05007/*
wdenkba56f622004-02-06 23:19:44 +00008 * config for XPedite1000 from XES Inc.
9 * Ported from EBONY config by Travis B. Sawyer <tsawyer@sandburst.com>
10 * (C) Copyright 2003 Sandburst Corporation
Wolfgang Denk0c8721a2005-09-23 11:05:55 +020011 * board/config_EBONY.h - configuration for AMCC 440GP Ref (Ebony)
Peter Tysere0299072009-07-17 19:01:07 -050012 */
wdenkba56f622004-02-06 23:19:44 +000013
14#ifndef __CONFIG_H
15#define __CONFIG_H
16
Peter Tysere0299072009-07-17 19:01:07 -050017/* High Level Configuration Options */
Peter Tyser10c1b212009-07-17 19:01:16 -050018#define CONFIG_XPEDITE1000 1
Peter Tyser54381b72009-07-17 19:01:15 -050019#define CONFIG_SYS_BOARD_NAME "XPedite1000"
John Schmoller92af65492010-10-22 00:20:24 -050020#define CONFIG_SYS_FORM_PMC 1
wdenkba56f622004-02-06 23:19:44 +000021#define CONFIG_440 1
Stefan Roese846b0dd2005-08-08 12:42:22 +020022#define CONFIG_440GX 1 /* 440 GX */
wdenkba56f622004-02-06 23:19:44 +000023#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
24
Wolfgang Denk2ae18242010-10-06 09:05:45 +020025#define CONFIG_SYS_TEXT_BASE 0xFFF80000
26
Peter Tyser4cdad5f2009-07-17 19:01:13 -050027/*
28 * DDR config
29 */
30#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for setup */
31#define SPD_EEPROM_ADDRESS {0x54} /* SPD i2c spd addresses */
32#define CONFIG_VERY_BIG_RAM 1
wdenkba56f622004-02-06 23:19:44 +000033
Peter Tysere0299072009-07-17 19:01:07 -050034/*
wdenkba56f622004-02-06 23:19:44 +000035 * Base addresses -- Note these are effective addresses where the
36 * actual resources get mapped (not physical addresses)
Peter Tysere0299072009-07-17 19:01:07 -050037 */
Peter Tyser4cdad5f2009-07-17 19:01:13 -050038#define CONFIG_SYS_SDRAM_BASE 0x00000000
39#define CONFIG_SYS_FLASH_BASE 0xff000000 /* start of FLASH */
Wolfgang Denk14d0a022010-10-07 21:51:12 +020040#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
Peter Tyser4cdad5f2009-07-17 19:01:13 -050041#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */
Peter Tyser4cdad5f2009-07-17 19:01:13 -050042#define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */
43#define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
Peter Tysere0299072009-07-17 19:01:07 -050044#define CONFIG_SYS_NVRAM_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x08000000)
45#define CONFIG_SYS_GPIO_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000700)
wdenkba56f622004-02-06 23:19:44 +000046
Peter Tyser4cdad5f2009-07-17 19:01:13 -050047/*
48 * Diagnostics
49 */
Peter Tyser9b4ef1f2009-07-17 19:01:14 -050050#define CONFIG_SYS_ALT_MEMTEST
Peter Tyser4cdad5f2009-07-17 19:01:13 -050051#define CONFIG_SYS_MEMTEST_START 0x0400000
52#define CONFIG_SYS_MEMTEST_END 0x0C00000
53
54/* POST support */
55#define CONFIG_POST (CONFIG_SYS_POST_RTC | \
56 CONFIG_SYS_POST_I2C)
57
58/*
59 * LED support
60 */
Peter Tysere0299072009-07-17 19:01:07 -050061#define USR_LED0 0x00000080
62#define USR_LED1 0x00000100
63#define USR_LED2 0x00000200
64#define USR_LED3 0x00000400
wdenkba56f622004-02-06 23:19:44 +000065
66#ifndef __ASSEMBLY__
67extern unsigned long in32(unsigned int);
68extern void out32(unsigned int, unsigned long);
69
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020070#define LED0_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED0))
71#define LED1_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED1))
72#define LED2_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED2))
73#define LED3_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED3))
wdenkba56f622004-02-06 23:19:44 +000074
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020075#define LED0_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED0))
76#define LED1_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED1))
77#define LED2_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED2))
78#define LED3_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED3))
wdenkba56f622004-02-06 23:19:44 +000079#endif
80
Peter Tyser4cdad5f2009-07-17 19:01:13 -050081/*
82 * Use internal SRAM for initial stack
83 */
Peter Tysere0299072009-07-17 19:01:07 -050084#define CONFIG_SYS_TEMP_STACK_OCM 1
85#define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_ISRAM_BASE
86#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_ISRAM_BASE /* Initial RAM address */
Wolfgang Denk553f0982010-10-26 13:32:32 +020087#define CONFIG_SYS_INIT_RAM_SIZE 0x2000 /* Size of used area in RAM */
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +020088#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Michael Zaidman800eb092010-09-20 08:51:53 +020089#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
wdenkba56f622004-02-06 23:19:44 +000090
Peter Tyser9b4ef1f2009-07-17 19:01:14 -050091#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 KB for Mon */
92#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */
wdenkba56f622004-02-06 23:19:44 +000093
Peter Tyser4cdad5f2009-07-17 19:01:13 -050094/*
95 * Serial Port
96 */
Stefan Roese550650d2010-09-20 16:05:31 +020097#define CONFIG_CONS_INDEX 1 /* Use UART0 */
Stefan Roese550650d2010-09-20 16:05:31 +020098#define CONFIG_SYS_NS16550_SERIAL
99#define CONFIG_SYS_NS16550_REG_SIZE 1
100#define CONFIG_SYS_NS16550_CLK get_serial_clock()
101
Peter Tysere0299072009-07-17 19:01:07 -0500102#define CONFIG_SYS_BAUDRATE_TABLE \
103 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400}
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500104#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
105#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
wdenkba56f622004-02-06 23:19:44 +0000106
Peter Tysere0299072009-07-17 19:01:07 -0500107/*
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500108 * NOR flash configuration
Peter Tysere0299072009-07-17 19:01:07 -0500109 */
Peter Tyser42735812009-07-17 19:01:08 -0500110#define CONFIG_SYS_MAX_FLASH_BANKS 3
111#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE, 0xf0000000, 0xf4000000 }
112#define CONFIG_SYS_MAX_FLASH_SECT 512 /* sectors per device */
Peter Tyser11ad3092009-07-17 19:01:03 -0500113#define CONFIG_FLASH_CFI_DRIVER
114#define CONFIG_SYS_FLASH_CFI
115#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Peter Tyser42735812009-07-17 19:01:08 -0500116#define CONFIG_SYS_FLASH_QUIET_TEST /* MirrorBit flashes are optional */
Peter Tysere0299072009-07-17 19:01:07 -0500117#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
118#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
wdenkba56f622004-02-06 23:19:44 +0000119
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500120/*
121 * I2C
122 */
Dirk Eibach880540d2013-04-25 02:40:01 +0000123#define CONFIG_SYS_I2C
124#define CONFIG_SYS_I2C_PPC4XX
125#define CONFIG_SYS_I2C_PPC4XX_CH0
126#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
127#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7f
wdenkba56f622004-02-06 23:19:44 +0000128
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500129/* I2C EEPROM */
130#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
Peter Tysere0299072009-07-17 19:01:07 -0500131#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
132#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
133#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
wdenkba56f622004-02-06 23:19:44 +0000134
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500135/* I2C RTC: STMicro M41T00 */
136#define CONFIG_RTC_M41T11 1
137#define CONFIG_SYS_I2C_RTC_ADDR 0x68
138#define CONFIG_SYS_M41T11_BASE_YEAR 2000
wdenkba56f622004-02-06 23:19:44 +0000139
Peter Tysere0299072009-07-17 19:01:07 -0500140/*
141 * PCI
wdenkba56f622004-02-06 23:19:44 +0000142 */
143/* General PCI */
Gabor Juhos842033e2013-05-30 07:06:12 +0000144#define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */
Peter Tysere0299072009-07-17 19:01:07 -0500145#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
146#define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE */
wdenkba56f622004-02-06 23:19:44 +0000147
148/* Board-specific PCI */
Peter Tysere0299072009-07-17 19:01:07 -0500149#define CONFIG_SYS_PCI_TARGET_INIT /* let board init pci target */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200150#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1014 /* IBM */
151#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */
Peter Tysere0299072009-07-17 19:01:07 -0500152#define CONFIG_SYS_PCI_FORCE_PCI_CONV /* Force PCI Conventional Mode */
153
wdenkba56f622004-02-06 23:19:44 +0000154/*
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500155 * Networking options
156 */
157#define CONFIG_PPC4xx_EMAC
158#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500159#define CONFIG_MII 1 /* MII PHY management */
160#define CONFIG_PHY_RESET 1 /* reset phy upon startup */
161#define CONFIG_SYS_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
162#define CONFIG_ETHPRIME "ppc_4xx_eth2"
163#define CONFIG_PHY_ADDR 4 /* PHY address phy0 not populated */
164#define CONFIG_PHY2_ADDR 4 /* PHY address phy2 */
165#define CONFIG_HAS_ETH2 1 /* add support for "eth2addr" */
166#define CONFIG_PHY3_ADDR 8 /* PHY address phy3 */
167#define CONFIG_HAS_ETH3 1 /* add support for "eth3addr" */
168
169/* BOOTP options */
170#define CONFIG_BOOTP_BOOTFILESIZE
171#define CONFIG_BOOTP_BOOTPATH
172#define CONFIG_BOOTP_GATEWAY
173#define CONFIG_BOOTP_HOSTNAME
174
175/*
176 * Command configuration
177 */
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500178#define CONFIG_CMD_EEPROM
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500179#define CONFIG_CMD_IRQ
180#define CONFIG_CMD_JFFS2
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500181#define CONFIG_CMD_PCI
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500182
183/*
184 * Miscellaneous configurable options
185 */
186#define CONFIG_SYS_LONGHELP /* undef to save memory */
187#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500188#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500189#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
190#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
191#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Peter Tyser9b4ef1f2009-07-17 19:01:14 -0500192#define CONFIG_CMDLINE_EDITING 1 /* Command-line editing */
Peter Tyser9b4ef1f2009-07-17 19:01:14 -0500193#define CONFIG_PANIC_HANG /* do not reset board on panic */
194#define CONFIG_PREBOOT /* enable preboot variable */
Peter Tyser9b4ef1f2009-07-17 19:01:14 -0500195#define CONFIG_INTEGRITY /* support booting INTEGRITY OS */
196#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500197
198/*
wdenkba56f622004-02-06 23:19:44 +0000199 * For booting Linux, the board info and command line data
200 * have to be in the first 8 MB of memory, since this is
201 * the maximum mapped by the Linux kernel during initialization.
202 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200203#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
wdenkba56f622004-02-06 23:19:44 +0000204
205/*
Peter Tyser4cdad5f2009-07-17 19:01:13 -0500206 * Environment Configuration
207 */
208#define CONFIG_ENV_IS_IN_FLASH 1
209#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128k (one sector) for env */
210#define CONFIG_ENV_SIZE 0x8000
211#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - (256 * 1024))
212
213/*
Peter Tyserc4ae1a02009-07-17 19:01:12 -0500214 * Flash memory map:
215 * fff80000 - ffffffff U-Boot (512 KB)
216 * fff40000 - fff7ffff U-Boot Environment (256 KB)
217 * fff00000 - fff3ffff FDT (256KB)
218 * ffc00000 - ffefffff OS image (3MB)
219 * ff000000 - ffbfffff OS Use/Filesystem (12MB)
220 */
221
Marek Vasut5368c552012-09-23 17:41:24 +0200222#define CONFIG_UBOOT_ENV_ADDR __stringify(CONFIG_SYS_TEXT_BASE)
223#define CONFIG_FDT_ENV_ADDR __stringify(0xfff00000)
224#define CONFIG_OS_ENV_ADDR __stringify(0xffc00000)
Peter Tyserc4ae1a02009-07-17 19:01:12 -0500225
226#define CONFIG_PROG_UBOOT \
227 "$download_cmd $loadaddr $ubootfile; " \
228 "if test $? -eq 0; then " \
229 "protect off "CONFIG_UBOOT_ENV_ADDR" +80000; " \
230 "erase "CONFIG_UBOOT_ENV_ADDR" +80000; " \
231 "cp.w $loadaddr "CONFIG_UBOOT_ENV_ADDR" 40000; " \
232 "protect on "CONFIG_UBOOT_ENV_ADDR" +80000; " \
233 "cmp.b $loadaddr "CONFIG_UBOOT_ENV_ADDR" 80000; " \
234 "if test $? -ne 0; then " \
235 "echo PROGRAM FAILED; " \
236 "else; " \
237 "echo PROGRAM SUCCEEDED; " \
238 "fi; " \
239 "else; " \
240 "echo DOWNLOAD FAILED; " \
241 "fi;"
242
243#define CONFIG_BOOT_OS_NET \
244 "$download_cmd $osaddr $osfile; " \
245 "if test $? -eq 0; then " \
246 "if test -n $fdtaddr; then " \
247 "$download_cmd $fdtaddr $fdtfile; " \
248 "if test $? -eq 0; then " \
249 "bootm $osaddr - $fdtaddr; " \
250 "else; " \
251 "echo FDT DOWNLOAD FAILED; " \
252 "fi; " \
253 "else; " \
254 "bootm $osaddr; " \
255 "fi; " \
256 "else; " \
257 "echo OS DOWNLOAD FAILED; " \
258 "fi;"
259
260#define CONFIG_PROG_OS \
261 "$download_cmd $osaddr $osfile; " \
262 "if test $? -eq 0; then " \
263 "erase "CONFIG_OS_ENV_ADDR" +$filesize; " \
264 "cp.b $osaddr "CONFIG_OS_ENV_ADDR" $filesize; " \
265 "cmp.b $osaddr "CONFIG_OS_ENV_ADDR" $filesize; " \
266 "if test $? -ne 0; then " \
267 "echo OS PROGRAM FAILED; " \
268 "else; " \
269 "echo OS PROGRAM SUCCEEDED; " \
270 "fi; " \
271 "else; " \
272 "echo OS DOWNLOAD FAILED; " \
273 "fi;"
274
275#define CONFIG_PROG_FDT \
276 "$download_cmd $fdtaddr $fdtfile; " \
277 "if test $? -eq 0; then " \
278 "erase "CONFIG_FDT_ENV_ADDR" +$filesize;" \
279 "cp.b $fdtaddr "CONFIG_FDT_ENV_ADDR" $filesize; " \
280 "cmp.b $fdtaddr "CONFIG_FDT_ENV_ADDR" $filesize; " \
281 "if test $? -ne 0; then " \
282 "echo FDT PROGRAM FAILED; " \
283 "else; " \
284 "echo FDT PROGRAM SUCCEEDED; " \
285 "fi; " \
286 "else; " \
287 "echo FDT DOWNLOAD FAILED; " \
288 "fi;"
289
290#define CONFIG_EXTRA_ENV_SETTINGS \
291 "autoload=yes\0" \
292 "download_cmd=tftp\0" \
293 "console_args=console=ttyS0,115200\0" \
294 "root_args=root=/dev/nfs rw\0" \
295 "misc_args=ip=on\0" \
296 "set_bootargs=setenv bootargs ${console_args} ${root_args} ${misc_args}\0" \
297 "bootfile=/home/user/file\0" \
Peter Tyserc00ac252010-10-22 00:20:26 -0500298 "osfile=/home/user/board.uImage\0" \
299 "fdtfile=/home/user/board.dtb\0" \
Peter Tyserc4ae1a02009-07-17 19:01:12 -0500300 "ubootfile=/home/user/u-boot.bin\0" \
Scott Woodb24a4f62016-07-19 17:52:06 -0500301 "fdtaddr=0x1e00000\0" \
Peter Tyserc4ae1a02009-07-17 19:01:12 -0500302 "osaddr=0x1000000\0" \
303 "loadaddr=0x1000000\0" \
304 "prog_uboot="CONFIG_PROG_UBOOT"\0" \
305 "prog_os="CONFIG_PROG_OS"\0" \
306 "prog_fdt="CONFIG_PROG_FDT"\0" \
307 "bootcmd_net=run set_bootargs; "CONFIG_BOOT_OS_NET"\0" \
308 "bootcmd_flash=run set_bootargs; " \
309 "bootm "CONFIG_OS_ENV_ADDR" - "CONFIG_FDT_ENV_ADDR"\0" \
310 "bootcmd=run bootcmd_flash\0"
wdenkba56f622004-02-06 23:19:44 +0000311#endif /* __CONFIG_H */