Hou Zhiqiang | b89e3d9 | 2019-04-24 22:33:02 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ OR X11 |
| 2 | /* |
| 3 | * Copyright 2019 NXP |
| 4 | * |
| 5 | * PCIe Kernel DT fixup of DM U-Boot driver for Freescale PowerPC SoCs |
| 6 | * Author: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
| 7 | */ |
| 8 | |
| 9 | #include <common.h> |
| 10 | #ifdef CONFIG_OF_BOARD_SETUP |
| 11 | #include <dm.h> |
| 12 | #include <fdt_support.h> |
| 13 | #include <asm/fsl_pci.h> |
| 14 | #include <linux/libfdt.h> |
| 15 | #include "pcie_fsl.h" |
| 16 | |
| 17 | static void ft_fsl_pcie_setup(void *blob, struct fsl_pcie *pcie) |
| 18 | { |
| 19 | struct pci_controller *hose = dev_get_uclass_priv(pcie->bus); |
| 20 | fdt_addr_t regs_addr; |
| 21 | int off; |
| 22 | |
| 23 | regs_addr = dev_read_addr(pcie->bus); |
| 24 | off = fdt_node_offset_by_compat_reg(blob, FSL_PCIE_COMPAT, regs_addr); |
| 25 | if (off < 0) { |
| 26 | printf("%s: Fail to find PCIe node@0x%pa\n", |
| 27 | FSL_PCIE_COMPAT, ®s_addr); |
| 28 | return; |
| 29 | } |
| 30 | |
| 31 | if (!hose || !pcie->enabled) |
| 32 | fdt_del_node(blob, off); |
| 33 | else |
| 34 | fdt_pci_dma_ranges(blob, off, hose); |
| 35 | } |
| 36 | |
| 37 | /* Fixup Kernel DT for PCIe */ |
Masahiro Yamada | b75d8dc | 2020-06-26 15:13:33 +0900 | [diff] [blame] | 38 | void pci_of_setup(void *blob, struct bd_info *bd) |
Hou Zhiqiang | b89e3d9 | 2019-04-24 22:33:02 +0800 | [diff] [blame] | 39 | { |
| 40 | struct fsl_pcie *pcie; |
| 41 | |
| 42 | list_for_each_entry(pcie, &fsl_pcie_list, list) |
| 43 | ft_fsl_pcie_setup(blob, pcie); |
| 44 | } |
| 45 | |
| 46 | #else |
Masahiro Yamada | b75d8dc | 2020-06-26 15:13:33 +0900 | [diff] [blame] | 47 | void pci_of_setup(void *blob, struct bd_info *bd) |
Hou Zhiqiang | b89e3d9 | 2019-04-24 22:33:02 +0800 | [diff] [blame] | 48 | { |
| 49 | } |
| 50 | #endif |