Ilko Iliev | 3294923 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2007-2008 |
Stelian Pop | c9e798d | 2011-11-01 00:00:39 +0100 | [diff] [blame] | 3 | * Stelian Pop <stelian@popies.net> |
Ilko Iliev | 3294923 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 4 | * Lead Tech Design <www.leadtechdesign.com> |
| 5 | * Ilko Iliev <www.ronetix.at> |
| 6 | * |
| 7 | * Configuation settings for the RONETIX PM9261 board. |
| 8 | * |
| 9 | * See file CREDITS for list of people who contributed to this |
| 10 | * project. |
| 11 | * |
| 12 | * This program is free software; you can redistribute it and/or |
| 13 | * modify it under the terms of the GNU General Public License as |
| 14 | * published by the Free Software Foundation; either version 2 of |
| 15 | * the License, or (at your option) any later version. |
| 16 | * |
| 17 | * This program is distributed in the hope that it will be useful, |
| 18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 20 | * GNU General Public License for more details. |
| 21 | * |
| 22 | * You should have received a copy of the GNU General Public License |
| 23 | * along with this program; if not, write to the Free Software |
| 24 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 25 | * MA 02111-1307 USA |
| 26 | */ |
| 27 | |
| 28 | #ifndef __CONFIG_H |
| 29 | #define __CONFIG_H |
| 30 | |
Asen Dimov | f47316a | 2011-07-26 04:48:41 +0000 | [diff] [blame] | 31 | /* |
| 32 | * SoC must be defined first, before hardware.h is included. |
| 33 | * In this case SoC is defined in boards.cfg. |
| 34 | */ |
| 35 | |
| 36 | #include <asm/hardware.h> |
Ilko Iliev | 3294923 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 37 | /* ARM asynchronous clock */ |
Ilko Iliev | 3294923 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 38 | |
| 39 | #define CONFIG_DISPLAY_BOARDINFO |
| 40 | |
| 41 | #define MASTER_PLL_DIV 15 |
| 42 | #define MASTER_PLL_MUL 162 |
| 43 | #define MAIN_PLL_DIV 2 |
Asen Dimov | f47316a | 2011-07-26 04:48:41 +0000 | [diff] [blame] | 44 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ |
Achim Ehrlich | 7c966a8 | 2010-02-24 10:29:16 +0100 | [diff] [blame] | 45 | #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 |
Ilko Iliev | 3294923 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 46 | |
| 47 | #define CONFIG_SYS_HZ 1000 |
| 48 | |
Asen Dimov | f47316a | 2011-07-26 04:48:41 +0000 | [diff] [blame] | 49 | #define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9261" |
Ilko Iliev | 3294923 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 50 | #define CONFIG_PM9261 1 /* on a Ronetix PM9261 Board */ |
| 51 | #define CONFIG_ARCH_CPU_INIT |
| 52 | #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ |
Asen Dimov | 4f81bf4 | 2010-12-12 12:41:30 +0200 | [diff] [blame] | 53 | #define CONFIG_SYS_TEXT_BASE 0 |
Ilko Iliev | 3294923 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 54 | |
Asen Dimov | a3e09cc | 2011-10-31 08:54:20 +0000 | [diff] [blame] | 55 | #define MACH_TYPE_PM9261 1187 |
| 56 | #define CONFIG_MACH_TYPE MACH_TYPE_PM9261 |
| 57 | |
Ilko Iliev | 3294923 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 58 | /* clocks */ |
| 59 | /* CKGR_MOR - enable main osc. */ |
| 60 | #define CONFIG_SYS_MOR_VAL \ |
Asen Dimov | e3150c7 | 2010-04-06 16:18:04 +0300 | [diff] [blame] | 61 | (AT91_PMC_MOR_MOSCEN | \ |
Ilko Iliev | 3294923 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 62 | (255 << 8)) /* Main Oscillator Start-up Time */ |
| 63 | #define CONFIG_SYS_PLLAR_VAL \ |
Asen Dimov | e3150c7 | 2010-04-06 16:18:04 +0300 | [diff] [blame] | 64 | (AT91_PMC_PLLAR_29 | /* Bit 29 must be 1 when prog */ \ |
| 65 | AT91_PMC_PLLXR_OUT(3) | \ |
Ilko Iliev | 3294923 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 66 | ((MASTER_PLL_MUL - 1) << 16) | (MASTER_PLL_DIV)) |
| 67 | |
| 68 | /* PCK/2 = MCK Master Clock from PLLA */ |
| 69 | #define CONFIG_SYS_MCKR1_VAL \ |
Asen Dimov | e3150c7 | 2010-04-06 16:18:04 +0300 | [diff] [blame] | 70 | (AT91_PMC_MCKR_CSS_SLOW | \ |
| 71 | AT91_PMC_MCKR_PRES_1 | \ |
| 72 | AT91_PMC_MCKR_MDIV_2 | \ |
| 73 | AT91_PMC_MCKR_PLLADIV_1) |
Ilko Iliev | 3294923 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 74 | |
| 75 | /* PCK/2 = MCK Master Clock from PLLA */ |
| 76 | #define CONFIG_SYS_MCKR2_VAL \ |
Asen Dimov | e3150c7 | 2010-04-06 16:18:04 +0300 | [diff] [blame] | 77 | (AT91_PMC_MCKR_CSS_PLLA | \ |
| 78 | AT91_PMC_MCKR_PRES_1 | \ |
| 79 | AT91_PMC_MCKR_MDIV_2 | \ |
| 80 | AT91_PMC_MCKR_PLLADIV_1) |
Ilko Iliev | 3294923 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 81 | |
| 82 | /* define PDC[31:16] as DATA[31:16] */ |
| 83 | #define CONFIG_SYS_PIOC_PDR_VAL1 0xFFFF0000 |
| 84 | /* no pull-up for D[31:16] */ |
| 85 | #define CONFIG_SYS_PIOC_PPUDR_VAL 0xFFFF0000 |
| 86 | |
| 87 | /* EBI_CSA, no pull-ups for D[15:0], CS1 SDRAM, CS3 NAND Flash */ |
| 88 | #define CONFIG_SYS_MATRIX_EBICSA_VAL \ |
Asen Dimov | e3150c7 | 2010-04-06 16:18:04 +0300 | [diff] [blame] | 89 | (AT91_MATRIX_CSA_DBPUC | AT91_MATRIX_CSA_EBI_CS1A) |
Ilko Iliev | 3294923 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 90 | |
| 91 | /* SDRAM */ |
| 92 | /* SDRAMC_MR Mode register */ |
| 93 | #define CONFIG_SYS_SDRC_MR_VAL1 AT91_SDRAMC_MODE_NORMAL |
| 94 | /* SDRAMC_TR - Refresh Timer register */ |
| 95 | #define CONFIG_SYS_SDRC_TR_VAL1 0x13C |
| 96 | /* SDRAMC_CR - Configuration register*/ |
| 97 | #define CONFIG_SYS_SDRC_CR_VAL \ |
| 98 | (AT91_SDRAMC_NC_9 | \ |
| 99 | AT91_SDRAMC_NR_13 | \ |
| 100 | AT91_SDRAMC_NB_4 | \ |
| 101 | AT91_SDRAMC_CAS_3 | \ |
| 102 | AT91_SDRAMC_DBW_32 | \ |
| 103 | (1 << 8) | /* Write Recovery Delay */ \ |
| 104 | (7 << 12) | /* Row Cycle Delay */ \ |
| 105 | (3 << 16) | /* Row Precharge Delay */ \ |
| 106 | (2 << 20) | /* Row to Column Delay */ \ |
| 107 | (5 << 24) | /* Active to Precharge Delay */ \ |
| 108 | (1 << 28)) /* Exit Self Refresh to Active Delay */ |
| 109 | |
| 110 | /* Memory Device Register -> SDRAM */ |
| 111 | #define CONFIG_SYS_SDRC_MDR_VAL AT91_SDRAMC_MD_SDRAM |
| 112 | #define CONFIG_SYS_SDRC_MR_VAL2 AT91_SDRAMC_MODE_PRECHARGE |
| 113 | #define CONFIG_SYS_SDRAM_VAL1 0 /* SDRAM_BASE */ |
| 114 | #define CONFIG_SYS_SDRC_MR_VAL3 AT91_SDRAMC_MODE_REFRESH |
| 115 | #define CONFIG_SYS_SDRAM_VAL2 0 /* SDRAM_BASE */ |
| 116 | #define CONFIG_SYS_SDRAM_VAL3 0 /* SDRAM_BASE */ |
| 117 | #define CONFIG_SYS_SDRAM_VAL4 0 /* SDRAM_BASE */ |
| 118 | #define CONFIG_SYS_SDRAM_VAL5 0 /* SDRAM_BASE */ |
| 119 | #define CONFIG_SYS_SDRAM_VAL6 0 /* SDRAM_BASE */ |
| 120 | #define CONFIG_SYS_SDRAM_VAL7 0 /* SDRAM_BASE */ |
| 121 | #define CONFIG_SYS_SDRAM_VAL8 0 /* SDRAM_BASE */ |
| 122 | #define CONFIG_SYS_SDRAM_VAL9 0 /* SDRAM_BASE */ |
| 123 | #define CONFIG_SYS_SDRC_MR_VAL4 AT91_SDRAMC_MODE_LMR |
| 124 | #define CONFIG_SYS_SDRAM_VAL10 0 /* SDRAM_BASE */ |
| 125 | #define CONFIG_SYS_SDRC_MR_VAL5 AT91_SDRAMC_MODE_NORMAL |
| 126 | #define CONFIG_SYS_SDRAM_VAL11 0 /* SDRAM_BASE */ |
| 127 | #define CONFIG_SYS_SDRC_TR_VAL2 1200 /* SDRAM_TR */ |
| 128 | #define CONFIG_SYS_SDRAM_VAL12 0 /* SDRAM_BASE */ |
| 129 | |
| 130 | /* setup SMC0, CS0 (NOR Flash) - 16-bit, 15 WS */ |
| 131 | #define CONFIG_SYS_SMC0_SETUP0_VAL \ |
Asen Dimov | e3150c7 | 2010-04-06 16:18:04 +0300 | [diff] [blame] | 132 | (AT91_SMC_SETUP_NWE(10) | AT91_SMC_SETUP_NCS_WR(10) | \ |
| 133 | AT91_SMC_SETUP_NRD(10) | AT91_SMC_SETUP_NCS_RD(10)) |
Ilko Iliev | 3294923 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 134 | #define CONFIG_SYS_SMC0_PULSE0_VAL \ |
Asen Dimov | e3150c7 | 2010-04-06 16:18:04 +0300 | [diff] [blame] | 135 | (AT91_SMC_PULSE_NWE(11) | AT91_SMC_PULSE_NCS_WR(11) | \ |
| 136 | AT91_SMC_PULSE_NRD(11) | AT91_SMC_PULSE_NCS_RD(11)) |
Ilko Iliev | 3294923 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 137 | #define CONFIG_SYS_SMC0_CYCLE0_VAL \ |
Asen Dimov | e3150c7 | 2010-04-06 16:18:04 +0300 | [diff] [blame] | 138 | (AT91_SMC_CYCLE_NWE(22) | AT91_SMC_CYCLE_NRD(22)) |
Ilko Iliev | 3294923 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 139 | #define CONFIG_SYS_SMC0_MODE0_VAL \ |
Asen Dimov | e3150c7 | 2010-04-06 16:18:04 +0300 | [diff] [blame] | 140 | (AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | \ |
| 141 | AT91_SMC_MODE_DBW_16 | \ |
| 142 | AT91_SMC_MODE_TDF | \ |
| 143 | AT91_SMC_MODE_TDF_CYCLE(6)) |
Ilko Iliev | 3294923 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 144 | |
| 145 | /* user reset enable */ |
| 146 | #define CONFIG_SYS_RSTC_RMR_VAL \ |
| 147 | (AT91_RSTC_KEY | \ |
Asen Dimov | e3150c7 | 2010-04-06 16:18:04 +0300 | [diff] [blame] | 148 | AT91_RSTC_CR_PROCRST | \ |
| 149 | AT91_RSTC_MR_ERSTL(1) | \ |
| 150 | AT91_RSTC_MR_ERSTL(2)) |
Ilko Iliev | 3294923 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 151 | |
| 152 | /* Disable Watchdog */ |
| 153 | #define CONFIG_SYS_WDTC_WDMR_VAL \ |
Asen Dimov | e3150c7 | 2010-04-06 16:18:04 +0300 | [diff] [blame] | 154 | (AT91_WDT_MR_WDIDLEHLT | AT91_WDT_MR_WDDBGHLT | \ |
| 155 | AT91_WDT_MR_WDV(0xfff) | \ |
| 156 | AT91_WDT_MR_WDDIS | \ |
| 157 | AT91_WDT_MR_WDD(0xfff)) |
Ilko Iliev | 3294923 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 158 | |
| 159 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
| 160 | #define CONFIG_SETUP_MEMORY_TAGS 1 |
| 161 | #define CONFIG_INITRD_TAG 1 |
| 162 | |
| 163 | #undef CONFIG_SKIP_LOWLEVEL_INIT |
Asen Dimov | 0160c1e | 2011-12-09 10:59:07 +0000 | [diff] [blame] | 164 | #define CONFIG_BOARD_EARLY_INIT_F |
Ilko Iliev | 3294923 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 165 | |
| 166 | /* |
| 167 | * Hardware drivers |
| 168 | */ |
Jens Scharsig | ea8fbba | 2010-02-03 22:46:16 +0100 | [diff] [blame] | 169 | #define CONFIG_AT91_GPIO 1 |
Ilko Iliev | 3294923 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 170 | #define CONFIG_ATMEL_USART 1 |
Asen Dimov | f47316a | 2011-07-26 04:48:41 +0000 | [diff] [blame] | 171 | #define CONFIG_USART_BASE ATMEL_BASE_DBGU |
| 172 | #define CONFIG_USART_ID ATMEL_ID_SYS |
Ilko Iliev | 3294923 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 173 | |
| 174 | /* LCD */ |
| 175 | #define CONFIG_LCD 1 |
| 176 | #define LCD_BPP LCD_COLOR8 |
| 177 | #define CONFIG_LCD_LOGO 1 |
| 178 | #undef LCD_TEST_PATTERN |
| 179 | #define CONFIG_LCD_INFO 1 |
| 180 | #define CONFIG_LCD_INFO_BELOW_LOGO 1 |
| 181 | #define CONFIG_SYS_WHITE_ON_BLACK 1 |
| 182 | #define CONFIG_ATMEL_LCD 1 |
| 183 | #define CONFIG_ATMEL_LCD_BGR555 1 |
| 184 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 |
| 185 | |
| 186 | /* LED */ |
| 187 | #define CONFIG_AT91_LED |
Asen Dimov | e3150c7 | 2010-04-06 16:18:04 +0300 | [diff] [blame] | 188 | #define CONFIG_RED_LED AT91_PIO_PORTC, 12 |
| 189 | #define CONFIG_GREEN_LED AT91_PIO_PORTC, 13 |
| 190 | #define CONFIG_YELLOW_LED AT91_PIO_PORTC, 15 |
Ilko Iliev | 3294923 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 191 | |
| 192 | #define CONFIG_BOOTDELAY 3 |
| 193 | |
| 194 | /* |
| 195 | * BOOTP options |
| 196 | */ |
| 197 | #define CONFIG_BOOTP_BOOTFILESIZE 1 |
| 198 | #define CONFIG_BOOTP_BOOTPATH 1 |
| 199 | #define CONFIG_BOOTP_GATEWAY 1 |
| 200 | #define CONFIG_BOOTP_HOSTNAME 1 |
| 201 | |
| 202 | /* |
| 203 | * Command line configuration. |
| 204 | */ |
| 205 | #include <config_cmd_default.h> |
| 206 | #undef CONFIG_CMD_BDI |
| 207 | #undef CONFIG_CMD_IMI |
Ilko Iliev | 3294923 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 208 | #undef CONFIG_CMD_FPGA |
| 209 | #undef CONFIG_CMD_LOADS |
| 210 | #undef CONFIG_CMD_IMLS |
| 211 | |
Asen Dimov | 6741b53 | 2010-12-12 12:41:36 +0200 | [diff] [blame] | 212 | #define CONFIG_CMD_CACHE |
Ilko Iliev | 3294923 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 213 | #define CONFIG_CMD_PING 1 |
| 214 | #define CONFIG_CMD_DHCP 1 |
| 215 | #define CONFIG_CMD_NAND 1 |
| 216 | #define CONFIG_CMD_USB 1 |
| 217 | |
| 218 | /* SDRAM */ |
| 219 | #define CONFIG_NR_DRAM_BANKS 1 |
| 220 | #define PHYS_SDRAM 0x20000000 |
| 221 | #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ |
| 222 | |
| 223 | /* DataFlash */ |
| 224 | #define CONFIG_ATMEL_DATAFLASH_SPI |
| 225 | #define CONFIG_HAS_DATAFLASH |
| 226 | #define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ) |
| 227 | #define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 |
| 228 | #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ |
| 229 | #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */ |
| 230 | #define AT91_SPI_CLK 15000000 |
| 231 | #define DATAFLASH_TCSS (0x1a << 16) |
| 232 | #define DATAFLASH_TCHS (0x1 << 24) |
| 233 | |
| 234 | /* NAND flash */ |
| 235 | #define CONFIG_NAND_ATMEL |
Ilko Iliev | 3294923 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 236 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| 237 | #define CONFIG_SYS_NAND_BASE 0x40000000 |
| 238 | #define CONFIG_SYS_NAND_DBW_8 1 |
| 239 | /* our ALE is AD22 */ |
| 240 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 22) |
| 241 | /* our CLE is AD21 */ |
| 242 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 21) |
Asen Dimov | e3150c7 | 2010-04-06 16:18:04 +0300 | [diff] [blame] | 243 | #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTC, 14 |
| 244 | #define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTA, 16 |
Ilko Iliev | 3294923 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 245 | |
Ilko Iliev | 3294923 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 246 | /* NOR flash */ |
| 247 | #define CONFIG_SYS_FLASH_CFI 1 |
| 248 | #define CONFIG_FLASH_CFI_DRIVER 1 |
| 249 | #define PHYS_FLASH_1 0x10000000 |
| 250 | #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 |
| 251 | #define CONFIG_SYS_MAX_FLASH_SECT 256 |
| 252 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
| 253 | |
| 254 | /* Ethernet */ |
| 255 | #define CONFIG_DRIVER_DM9000 1 |
| 256 | #define CONFIG_DM9000_BASE 0x30000000 |
| 257 | #define DM9000_IO CONFIG_DM9000_BASE |
| 258 | #define DM9000_DATA (CONFIG_DM9000_BASE + 4) |
| 259 | #define CONFIG_DM9000_USE_16BIT 1 |
| 260 | #define CONFIG_NET_RETRY_COUNT 20 |
| 261 | #define CONFIG_RESET_PHY_R 1 |
Ilko Iliev | 3294923 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 262 | |
| 263 | /* USB */ |
| 264 | #define CONFIG_USB_ATMEL |
| 265 | #define CONFIG_USB_OHCI_NEW 1 |
| 266 | #define CONFIG_DOS_PARTITION 1 |
| 267 | #define CONFIG_SYS_USB_OHCI_CPU_INIT 1 |
| 268 | #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 |
| 269 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261" |
| 270 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 |
| 271 | #define CONFIG_USB_STORAGE 1 |
| 272 | |
| 273 | #define CONFIG_SYS_LOAD_ADDR 0x22000000 |
| 274 | |
| 275 | #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM |
| 276 | #define CONFIG_SYS_MEMTEST_END 0x23e00000 |
| 277 | |
| 278 | #undef CONFIG_SYS_USE_DATAFLASH_CS0 |
| 279 | #undef CONFIG_SYS_USE_NANDFLASH |
| 280 | #define CONFIG_SYS_USE_FLASH 1 |
| 281 | |
| 282 | #ifdef CONFIG_SYS_USE_DATAFLASH_CS0 |
| 283 | |
| 284 | /* bootstrap + u-boot + env + linux in dataflash on CS0 */ |
| 285 | #define CONFIG_ENV_IS_IN_DATAFLASH 1 |
| 286 | #define CONFIG_SYS_MONITOR_BASE \ |
| 287 | (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) |
| 288 | #define CONFIG_ENV_OFFSET 0x4200 |
| 289 | #define CONFIG_ENV_ADDR \ |
| 290 | (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) |
| 291 | #define CONFIG_ENV_SIZE 0x4200 |
| 292 | #define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm" |
| 293 | #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ |
| 294 | "root=/dev/mtdblock0 " \ |
Albin Tonnerre | 918319c | 2009-07-22 18:30:03 +0200 | [diff] [blame] | 295 | "mtdparts=atmel_nand:-(root) " \ |
Ilko Iliev | 3294923 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 296 | "rw rootfstype=jffs2" |
| 297 | |
| 298 | #elif defined(CONFIG_SYS_USE_NANDFLASH) /* CONFIG_SYS_USE_NANDFLASH */ |
| 299 | |
| 300 | /* bootstrap + u-boot + env + linux in nandflash */ |
| 301 | #define CONFIG_ENV_IS_IN_NAND 1 |
| 302 | #define CONFIG_ENV_OFFSET 0x60000 |
| 303 | #define CONFIG_ENV_OFFSET_REDUND 0x80000 |
| 304 | #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ |
| 305 | #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm" |
| 306 | #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ |
| 307 | "root=/dev/mtdblock5 " \ |
Albin Tonnerre | 918319c | 2009-07-22 18:30:03 +0200 | [diff] [blame] | 308 | "mtdparts=atmel_nand:128k(bootstrap)ro," \ |
Ilko Iliev | 3294923 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 309 | "256k(uboot)ro,128k(env1)ro," \ |
| 310 | "128k(env2)ro,2M(linux),-(root) " \ |
| 311 | "rw rootfstype=jffs2" |
| 312 | |
| 313 | #elif defined (CONFIG_SYS_USE_FLASH) |
| 314 | |
| 315 | #define CONFIG_ENV_IS_IN_FLASH 1 |
| 316 | #define CONFIG_ENV_OFFSET 0x40000 |
| 317 | #define CONFIG_ENV_SECT_SIZE 0x10000 |
| 318 | #define CONFIG_ENV_SIZE 0x10000 |
| 319 | #define CONFIG_ENV_OVERWRITE 1 |
| 320 | |
| 321 | /* JFFS Partition offset set */ |
| 322 | #define CONFIG_SYS_JFFS2_FIRST_BANK 0 |
| 323 | #define CONFIG_SYS_JFFS2_NUM_BANKS 1 |
| 324 | |
| 325 | /* 512k reserved for u-boot */ |
| 326 | #define CONFIG_SYS_JFFS2_FIRST_SECTOR 11 |
| 327 | |
| 328 | #define CONFIG_BOOTCOMMAND "run flashboot" |
| 329 | |
| 330 | #define MTDIDS_DEFAULT "nor0=physmap-flash.0,nand0=nand" |
| 331 | #define MTDPARTS_DEFAULT \ |
| 332 | "mtdparts=physmap-flash.0:" \ |
| 333 | "256k(u-boot)ro," \ |
| 334 | "64k(u-boot-env)ro," \ |
| 335 | "1408k(kernel)," \ |
| 336 | "-(rootfs);" \ |
| 337 | "nand:-(nand)" |
| 338 | |
| 339 | #define CONFIG_CON_ROT "fbcon=rotate:3 " |
| 340 | #define CONFIG_BOOTARGS "root=/dev/mtdblock4 rootfstype=jffs2 " CONFIG_CON_ROT |
| 341 | |
| 342 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 343 | "mtdids=" MTDIDS_DEFAULT "\0" \ |
| 344 | "mtdparts=" MTDPARTS_DEFAULT "\0" \ |
| 345 | "partition=nand0,0\0" \ |
| 346 | "ramargs=setenv bootargs $(bootargs) $(mtdparts)\0" \ |
| 347 | "nfsargs=setenv bootargs root=/dev/nfs rw " \ |
| 348 | CONFIG_CON_ROT \ |
| 349 | "nfsroot=$(serverip):$(rootpath) $(mtdparts)\0" \ |
| 350 | "addip=setenv bootargs $(bootargs) " \ |
| 351 | "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)"\ |
| 352 | ":$(hostname):eth0:off\0" \ |
| 353 | "ramboot=tftpboot 0x22000000 vmImage;" \ |
| 354 | "run ramargs;run addip;bootm 22000000\0" \ |
| 355 | "nfsboot=tftpboot 0x22000000 vmImage;" \ |
| 356 | "run nfsargs;run addip;bootm 22000000\0" \ |
| 357 | "flashboot=run ramargs;run addip;bootm 0x10050000\0" \ |
| 358 | "" |
| 359 | #else |
| 360 | #error "Undefined memory device" |
| 361 | #endif |
| 362 | |
| 363 | #define CONFIG_BAUDRATE 115200 |
| 364 | #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } |
| 365 | |
| 366 | #define CONFIG_SYS_PROMPT "pm9261> " |
| 367 | #define CONFIG_SYS_CBSIZE 256 |
| 368 | #define CONFIG_SYS_MAXARGS 16 |
| 369 | #define CONFIG_SYS_PBSIZE \ |
| 370 | (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
| 371 | #define CONFIG_SYS_LONGHELP 1 |
| 372 | #define CONFIG_CMDLINE_EDITING 1 |
| 373 | |
Ilko Iliev | 3294923 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 374 | /* |
| 375 | * Size of malloc() pool |
| 376 | */ |
| 377 | #define CONFIG_SYS_MALLOC_LEN \ |
| 378 | ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000) |
Ilko Iliev | 3294923 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 379 | |
Asen Dimov | 4f81bf4 | 2010-12-12 12:41:30 +0200 | [diff] [blame] | 380 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM |
| 381 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \ |
| 382 | GENERATED_GBL_DATA_SIZE) |
| 383 | |
Ilko Iliev | 3294923 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 384 | #define CONFIG_STACKSIZE (32 * 1024) /* regular stack */ |
| 385 | |
| 386 | #ifdef CONFIG_USE_IRQ |
| 387 | #error CONFIG_USE_IRQ not supported |
| 388 | #endif |
| 389 | |
| 390 | #endif |