| Michal Simek | f6aebdf | 2022-09-19 14:21:02 +0200 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0 |
| 2 | |
| 3 | if ARCH_VERSAL_NET |
| 4 | |
| 5 | config SYS_BOARD |
| 6 | string "Board name" |
| 7 | default "versal-net" |
| 8 | |
| 9 | config SYS_VENDOR |
| 10 | string "Vendor name" |
| 11 | default "xilinx" |
| 12 | |
| 13 | config SYS_SOC |
| 14 | default "versal-net" |
| 15 | |
| 16 | config SYS_CONFIG_NAME |
| 17 | string "Board configuration name" |
| 18 | default "xilinx_versal_net" |
| 19 | help |
| 20 | This option contains information about board configuration name. |
| 21 | Based on this option include/configs/<CONFIG_SYS_CONFIG_NAME>.h header |
| 22 | will be used for board configuration. |
| 23 | |
| Ashok Reddy Soma | 724379d | 2023-01-10 08:44:07 +0100 | [diff] [blame] | 24 | config COUNTER_FREQUENCY |
| 25 | int "Timer clock frequency" |
| 26 | default 0 |
| 27 | help |
| 28 | Setup time clock frequency for certain platform |
| 29 | |
| 30 | config IOU_SWITCH_DIVISOR0 |
| 31 | hex "IOU switch divisor0" |
| 32 | default 0x20 |
| 33 | help |
| 34 | Setup time clock divisor for input clock. |
| 35 | |
| Michal Simek | f6aebdf | 2022-09-19 14:21:02 +0200 | [diff] [blame] | 36 | config SYS_MEM_RSVD_FOR_MMU |
| 37 | bool "Reserve memory for MMU Table" |
| 38 | help |
| 39 | If defined this option is used to setup different space for |
| 40 | MMU table than the one which will be allocated during |
| 41 | relocation. |
| 42 | |
| 43 | config GICV3 |
| 44 | def_bool y |
| 45 | |
| 46 | config SYS_MALLOC_LEN |
| 47 | default 0x2000000 |
| 48 | |
| 49 | config ZYNQ_SDHCI_MAX_FREQ |
| 50 | default 200000000 |
| 51 | |
| 52 | source "board/xilinx/Kconfig" |
| 53 | source "board/xilinx/versal-net/Kconfig" |
| 54 | |
| 55 | endif |