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Bo Shenf7fa2f32012-07-05 17:21:46 +00001/*
2 * Copyright (C) 2012 Atmel Corporation
3 *
4 * Configuation settings for the AT91SAM9X5EK board.
5 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Bo Shenf7fa2f32012-07-05 17:21:46 +00007 */
8
9#ifndef __CONFIG_H__
10#define __CONFIG_H__
11
12#include <asm/hardware.h>
13
Bo Shen77461a62013-08-13 14:50:49 +080014#define CONFIG_SYS_TEXT_BASE 0x26f00000
15
Bo Shenf7fa2f32012-07-05 17:21:46 +000016/* ARM asynchronous clock */
17#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
18#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
Bo Shenf7fa2f32012-07-05 17:21:46 +000019
20#define CONFIG_AT91SAM9X5EK
Bo Shenf7fa2f32012-07-05 17:21:46 +000021
Bo Shenf7fa2f32012-07-05 17:21:46 +000022#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
23#define CONFIG_SETUP_MEMORY_TAGS
24#define CONFIG_INITRD_TAG
25#define CONFIG_SKIP_LOWLEVEL_INIT
Bo Shenf7fa2f32012-07-05 17:21:46 +000026
27/* general purpose I/O */
28#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
29#define CONFIG_AT91_GPIO
30
31/* serial console */
32#define CONFIG_ATMEL_USART
33#define CONFIG_USART_BASE ATMEL_BASE_DBGU
34#define CONFIG_USART_ID ATMEL_ID_SYS
35
36/* LCD */
Bo Shenf7fa2f32012-07-05 17:21:46 +000037#define LCD_BPP LCD_COLOR16
38#define LCD_OUTPUT_BPP 24
39#define CONFIG_LCD_LOGO
Bo Shenf7fa2f32012-07-05 17:21:46 +000040#define CONFIG_LCD_INFO
41#define CONFIG_LCD_INFO_BELOW_LOGO
42#define CONFIG_SYS_WHITE_ON_BLACK
43#define CONFIG_ATMEL_HLCD
44#define CONFIG_ATMEL_LCD_RGB565
Bo Shenf7fa2f32012-07-05 17:21:46 +000045
Bo Shenf7fa2f32012-07-05 17:21:46 +000046
47/*
48 * BOOTP options
49 */
50#define CONFIG_BOOTP_BOOTFILESIZE
51#define CONFIG_BOOTP_BOOTPATH
52#define CONFIG_BOOTP_GATEWAY
53#define CONFIG_BOOTP_HOSTNAME
54
55/*
56 * Command line configuration.
57 */
Bo Shenf7fa2f32012-07-05 17:21:46 +000058#define CONFIG_CMD_NAND
Richard Genoudb030e732012-11-29 23:18:34 +000059
60/*
61 * define CONFIG_USB_EHCI to enable USB Hi-Speed (aka 2.0)
62 * NB: in this case, USB 1.1 devices won't be recognized.
63 */
64
Bo Shenf7fa2f32012-07-05 17:21:46 +000065/* SDRAM */
66#define CONFIG_NR_DRAM_BANKS 1
67#define CONFIG_SYS_SDRAM_BASE 0x20000000
68#define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */
69
70#define CONFIG_SYS_INIT_SP_ADDR \
71 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
72
73/* DataFlash */
Bo Shen1d7442e2012-08-19 20:32:24 +000074#ifdef CONFIG_CMD_SF
75#define CONFIG_ATMEL_SPI
Bo Shen1d7442e2012-08-19 20:32:24 +000076#define CONFIG_SF_DEFAULT_SPEED 30000000
Bo Shenf7fa2f32012-07-05 17:21:46 +000077#endif
78
Bo Shenf7fa2f32012-07-05 17:21:46 +000079/* NAND flash */
80#ifdef CONFIG_CMD_NAND
81#define CONFIG_NAND_ATMEL
82#define CONFIG_SYS_MAX_NAND_DEVICE 1
83#define CONFIG_SYS_NAND_BASE 0x40000000
84#define CONFIG_SYS_NAND_DBW_8 1
85/* our ALE is AD21 */
86#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
87/* our CLE is AD22 */
88#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
89#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4
90#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5
91
Wu, Joshdf953212012-08-23 00:05:38 +000092/* PMECC & PMERRLOC */
93#define CONFIG_ATMEL_NAND_HWECC 1
94#define CONFIG_ATMEL_NAND_HW_PMECC 1
95#define CONFIG_PMECC_CAP 2
96#define CONFIG_PMECC_SECTOR_SIZE 512
Wu, Joshdf953212012-08-23 00:05:38 +000097
Bo Shence76f0a2013-06-26 10:48:53 +080098#define CONFIG_CMD_NAND_TRIMFFS
99
Bo Shenf7fa2f32012-07-05 17:21:46 +0000100#define CONFIG_MTD_DEVICE
101#define CONFIG_CMD_MTDPARTS
102#define CONFIG_MTD_PARTITIONS
103#define CONFIG_RBTREE
104#define CONFIG_LZO
Bo Shenf7fa2f32012-07-05 17:21:46 +0000105#define CONFIG_CMD_UBIFS
106#endif
107
Wu, Josh3a49cd72012-09-13 22:22:05 +0000108/* MMC */
109#ifdef CONFIG_CMD_MMC
Wu, Josh3a49cd72012-09-13 22:22:05 +0000110#define CONFIG_GENERIC_ATMEL_MCI
Richard Genoud419fba02012-11-29 23:18:33 +0000111#endif
112
Bo Shenf7fa2f32012-07-05 17:21:46 +0000113/* Ethernet */
114#define CONFIG_MACB
115#define CONFIG_RMII
116#define CONFIG_NET_RETRY_COUNT 20
117#define CONFIG_MACB_SEARCH_PHY
118
Richard Genoudb030e732012-11-29 23:18:34 +0000119/* USB */
120#ifdef CONFIG_CMD_USB
121#ifdef CONFIG_USB_EHCI
122#define CONFIG_USB_EHCI_ATMEL
123#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
124#else
Bo Shendcd2f1a2013-10-21 16:14:00 +0800125#define CONFIG_USB_ATMEL
126#define CONFIG_USB_ATMEL_CLK_SEL_UPLL
Richard Genoudb030e732012-11-29 23:18:34 +0000127#define CONFIG_USB_OHCI_NEW
128#define CONFIG_SYS_USB_OHCI_CPU_INIT
129#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
130#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9x5"
131#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3
132#endif
Richard Genoudb030e732012-11-29 23:18:34 +0000133#endif
134
Bo Shenf7fa2f32012-07-05 17:21:46 +0000135#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
136
137#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
138#define CONFIG_SYS_MEMTEST_END 0x26e00000
139
140#ifdef CONFIG_SYS_USE_NANDFLASH
141/* bootstrap + u-boot + env + linux in nandflash */
142#define CONFIG_ENV_IS_IN_NAND
143#define CONFIG_ENV_OFFSET 0xc0000
144#define CONFIG_ENV_OFFSET_REDUND 0x100000
145#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
146#define CONFIG_BOOTCOMMAND "nand read " \
147 "0x22000000 0x200000 0x300000; " \
148 "bootm 0x22000000"
Wu, Joshb7e31292012-11-02 00:17:27 +0000149#elif defined(CONFIG_SYS_USE_SPIFLASH)
Bo Shen1d7442e2012-08-19 20:32:24 +0000150/* bootstrap + u-boot + env + linux in spi flash */
151#define CONFIG_ENV_IS_IN_SPI_FLASH
152#define CONFIG_ENV_OFFSET 0x5000
153#define CONFIG_ENV_SIZE 0x3000
154#define CONFIG_ENV_SECT_SIZE 0x1000
155#define CONFIG_ENV_SPI_MAX_HZ 30000000
156#define CONFIG_BOOTCOMMAND "sf probe 0; " \
157 "sf read 0x22000000 0x100000 0x300000; " \
158 "bootm 0x22000000"
Bo Shen961ffc72012-12-06 21:37:04 +0000159#elif defined(CONFIG_SYS_USE_DATAFLASH)
160/* bootstrap + u-boot + env + linux in data flash */
161#define CONFIG_ENV_IS_IN_SPI_FLASH
162#define CONFIG_ENV_OFFSET 0x4200
163#define CONFIG_ENV_SIZE 0x4200
164#define CONFIG_ENV_SECT_SIZE 0x210
165#define CONFIG_ENV_SPI_MAX_HZ 30000000
166#define CONFIG_BOOTCOMMAND "sf probe 0; " \
167 "sf read 0x22000000 0x84000 0x294000; " \
168 "bootm 0x22000000"
Wu, Joshb7e31292012-11-02 00:17:27 +0000169#else /* CONFIG_SYS_USE_MMC */
170/* bootstrap + u-boot + env + linux in mmc */
Wu, Josh26961772015-01-20 10:33:33 +0800171#define CONFIG_ENV_IS_IN_FAT
172#define CONFIG_FAT_WRITE
173#define FAT_ENV_INTERFACE "mmc"
174#define FAT_ENV_FILE "uboot.env"
175#define FAT_ENV_DEVICE_AND_PART "0"
176#define CONFIG_ENV_SIZE 0x4000
Bo Shenf7fa2f32012-07-05 17:21:46 +0000177#endif
178
Wu, Joshb7e31292012-11-02 00:17:27 +0000179#ifdef CONFIG_SYS_USE_MMC
180#define CONFIG_BOOTARGS "mem=128M console=ttyS0,115200 " \
181 "mtdparts=atmel_nand:" \
182 "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
183 "root=/dev/mmcblk0p2 " \
184 "rw rootfstype=ext4 rootwait"
185#else
Bo Shen0c58cfa2013-02-20 00:16:25 +0000186#define CONFIG_BOOTARGS \
187 "console=ttyS0,115200 earlyprintk " \
188 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
189 "256k(env),256k(env_redundant),256k(spare)," \
190 "512k(dtb),6M(kernel)ro,-(rootfs) " \
191 "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw"
Wu, Joshb7e31292012-11-02 00:17:27 +0000192#endif
Bo Shenf7fa2f32012-07-05 17:21:46 +0000193
194#define CONFIG_BAUDRATE 115200
195
Bo Shenf7fa2f32012-07-05 17:21:46 +0000196#define CONFIG_SYS_CBSIZE 256
197#define CONFIG_SYS_MAXARGS 16
Bo Shenf7fa2f32012-07-05 17:21:46 +0000198#define CONFIG_SYS_LONGHELP
199#define CONFIG_CMDLINE_EDITING
200#define CONFIG_AUTO_COMPLETE
Bo Shenf7fa2f32012-07-05 17:21:46 +0000201
202/*
203 * Size of malloc() pool
204 */
205#define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000)
206
Bo Shend85e8912015-03-27 14:23:35 +0800207/* SPL */
208#define CONFIG_SPL_FRAMEWORK
209#define CONFIG_SPL_TEXT_BASE 0x300000
210#define CONFIG_SPL_MAX_SIZE 0x6000
211#define CONFIG_SPL_STACK 0x308000
212
213#define CONFIG_SPL_BSS_START_ADDR 0x20000000
214#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
215#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
216#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
217
Bo Shend85e8912015-03-27 14:23:35 +0800218#define CONFIG_SPL_BOARD_INIT
219#define CONFIG_SYS_MONITOR_LEN (512 << 10)
220
221#define CONFIG_SYS_MASTER_CLOCK 132096000
222#define CONFIG_SYS_AT91_PLLA 0x20c73f03
223#define CONFIG_SYS_MCKR 0x1301
224#define CONFIG_SYS_MCKR_CSS 0x1302
225
Bo Shend85e8912015-03-27 14:23:35 +0800226#ifdef CONFIG_SYS_USE_MMC
227#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
Bo Shend85e8912015-03-27 14:23:35 +0800228#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
229#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
Bo Shend85e8912015-03-27 14:23:35 +0800230
231#elif CONFIG_SYS_USE_NANDFLASH
Bo Shend85e8912015-03-27 14:23:35 +0800232#define CONFIG_SPL_NAND_DRIVERS
233#define CONFIG_SPL_NAND_BASE
234#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
235#define CONFIG_SYS_NAND_5_ADDR_CYCLE
236#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
237#define CONFIG_SYS_NAND_PAGE_COUNT 64
238#define CONFIG_SYS_NAND_OOBSIZE 64
239#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
240#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
241#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
242
243#elif CONFIG_SYS_USE_SPIFLASH
Bo Shend85e8912015-03-27 14:23:35 +0800244#define CONFIG_SPL_SPI_LOAD
245#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400
246
247#endif
248
Bo Shenf7fa2f32012-07-05 17:21:46 +0000249#endif