blob: c71cf33f8a9704ffe0c754f8cf9d5ef79f6a87c0 [file] [log] [blame]
Niel Fouriec1a215b2021-01-21 13:19:18 +01001// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * T1040 Silicon/SoC Device Tree Source (post include)
4 *
5 * Copyright 2013 - 2014 Freescale Semiconductor Inc.
6 */
7
8#include <dt-bindings/thermal/thermal.h>
9
10&bman_fbpr {
11 compatible = "fsl,bman-fbpr";
12 alloc-ranges = <0 0 0x10000 0>;
13};
14
15&qman_fqd {
16 compatible = "fsl,qman-fqd";
17 alloc-ranges = <0 0 0x10000 0>;
18};
19
20&qman_pfdr {
21 compatible = "fsl,qman-pfdr";
22 alloc-ranges = <0 0 0x10000 0>;
23};
24
25&ifc {
26 #address-cells = <2>;
27 #size-cells = <1>;
28 compatible = "fsl,ifc", "simple-bus";
29 interrupts = <25 2 0 0>;
30};
31
32&pci0 {
33 compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
34 device_type = "pci";
35 #size-cells = <2>;
36 #address-cells = <3>;
37 bus-range = <0x0 0xff>;
38 interrupts = <20 2 0 0>;
39 fsl,iommu-parent = <&pamu0>;
40 pcie@0 {
41 reg = <0 0 0 0 0>;
42 #interrupt-cells = <1>;
43 #size-cells = <2>;
44 #address-cells = <3>;
45 device_type = "pci";
46 interrupts = <20 2 0 0>;
47 interrupt-map-mask = <0xf800 0 0 7>;
48 interrupt-map = <
49 /* IDSEL 0x0 */
50 0000 0 0 1 &mpic 40 1 0 0
51 0000 0 0 2 &mpic 1 1 0 0
52 0000 0 0 3 &mpic 2 1 0 0
53 0000 0 0 4 &mpic 3 1 0 0
54 >;
55 };
56};
57
58&pci1 {
59 compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
60 device_type = "pci";
61 #size-cells = <2>;
62 #address-cells = <3>;
63 bus-range = <0 0xff>;
64 interrupts = <21 2 0 0>;
65 fsl,iommu-parent = <&pamu0>;
66 pcie@0 {
67 reg = <0 0 0 0 0>;
68 #interrupt-cells = <1>;
69 #size-cells = <2>;
70 #address-cells = <3>;
71 device_type = "pci";
72 interrupts = <21 2 0 0>;
73 interrupt-map-mask = <0xf800 0 0 7>;
74 interrupt-map = <
75 /* IDSEL 0x0 */
76 0000 0 0 1 &mpic 41 1 0 0
77 0000 0 0 2 &mpic 5 1 0 0
78 0000 0 0 3 &mpic 6 1 0 0
79 0000 0 0 4 &mpic 7 1 0 0
80 >;
81 };
82};
83
84&pci2 {
85 compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
86 device_type = "pci";
87 #size-cells = <2>;
88 #address-cells = <3>;
89 bus-range = <0x0 0xff>;
90 interrupts = <22 2 0 0>;
91 fsl,iommu-parent = <&pamu0>;
92 pcie@0 {
93 reg = <0 0 0 0 0>;
94 #interrupt-cells = <1>;
95 #size-cells = <2>;
96 #address-cells = <3>;
97 device_type = "pci";
98 interrupts = <22 2 0 0>;
99 interrupt-map-mask = <0xf800 0 0 7>;
100 interrupt-map = <
101 /* IDSEL 0x0 */
102 0000 0 0 1 &mpic 42 1 0 0
103 0000 0 0 2 &mpic 9 1 0 0
104 0000 0 0 3 &mpic 10 1 0 0
105 0000 0 0 4 &mpic 11 1 0 0
106 >;
107 };
108};
109
110&pci3 {
111 compatible = "fsl,t1040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
112 device_type = "pci";
113 #size-cells = <2>;
114 #address-cells = <3>;
115 bus-range = <0x0 0xff>;
116 interrupts = <23 2 0 0>;
117 fsl,iommu-parent = <&pamu0>;
118 pcie@0 {
119 reg = <0 0 0 0 0>;
120 #interrupt-cells = <1>;
121 #size-cells = <2>;
122 #address-cells = <3>;
123 device_type = "pci";
124 interrupts = <23 2 0 0>;
125 interrupt-map-mask = <0xf800 0 0 7>;
126 interrupt-map = <
127 /* IDSEL 0x0 */
128 0000 0 0 1 &mpic 43 1 0 0
129 0000 0 0 2 &mpic 0 1 0 0
130 0000 0 0 3 &mpic 4 1 0 0
131 0000 0 0 4 &mpic 8 1 0 0
132 >;
133 };
134};
135
136&dcsr {
137 #address-cells = <1>;
138 #size-cells = <1>;
139 compatible = "fsl,dcsr", "simple-bus";
140
141 dcsr-epu@0 {
142 compatible = "fsl,t1040-dcsr-epu", "fsl,dcsr-epu";
143 interrupts = <52 2 0 0
144 84 2 0 0
145 85 2 0 0>;
146 reg = <0x0 0x1000>;
147 };
148 dcsr-npc {
149 compatible = "fsl,t1040-dcsr-cnpc", "fsl,dcsr-cnpc";
150 reg = <0x1000 0x1000 0x1002000 0x10000>;
151 };
152 dcsr-nxc@2000 {
153 compatible = "fsl,dcsr-nxc";
154 reg = <0x2000 0x1000>;
155 };
156 dcsr-corenet {
157 compatible = "fsl,dcsr-corenet";
158 reg = <0x8000 0x1000 0x1A000 0x1000>;
159 };
160 dcsr-dpaa@9000 {
161 compatible = "fsl,t1040-dcsr-dpaa", "fsl,dcsr-dpaa";
162 reg = <0x9000 0x1000>;
163 };
164 dcsr-ocn@11000 {
165 compatible = "fsl,t1040-dcsr-ocn", "fsl,dcsr-ocn";
166 reg = <0x11000 0x1000>;
167 };
168 dcsr-ddr@12000 {
169 compatible = "fsl,dcsr-ddr";
170 dev-handle = <&ddr1>;
171 reg = <0x12000 0x1000>;
172 };
173 dcsr-nal@18000 {
174 compatible = "fsl,t1040-dcsr-nal", "fsl,dcsr-nal";
175 reg = <0x18000 0x1000>;
176 };
177 dcsr-rcpm@22000 {
178 compatible = "fsl,t1040-dcsr-rcpm", "fsl,dcsr-rcpm";
179 reg = <0x22000 0x1000>;
180 };
181 dcsr-snpc@30000 {
182 compatible = "fsl,t1040-dcsr-snpc", "fsl,dcsr-snpc";
183 reg = <0x30000 0x1000 0x1022000 0x10000>;
184 };
185 dcsr-snpc@31000 {
186 compatible = "fsl,t1040-dcsr-snpc", "fsl,dcsr-snpc";
187 reg = <0x31000 0x1000 0x1042000 0x10000>;
188 };
189 dcsr-cpu-sb-proxy@100000 {
190 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
191 cpu-handle = <&cpu0>;
192 reg = <0x100000 0x1000 0x101000 0x1000>;
193 };
194 dcsr-cpu-sb-proxy@108000 {
195 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
196 cpu-handle = <&cpu1>;
197 reg = <0x108000 0x1000 0x109000 0x1000>;
198 };
199 dcsr-cpu-sb-proxy@110000 {
200 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
201 cpu-handle = <&cpu2>;
202 reg = <0x110000 0x1000 0x111000 0x1000>;
203 };
204 dcsr-cpu-sb-proxy@118000 {
205 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
206 cpu-handle = <&cpu3>;
207 reg = <0x118000 0x1000 0x119000 0x1000>;
208 };
209};
210
211&bportals {
212 #address-cells = <0x1>;
213 #size-cells = <0x1>;
214 compatible = "simple-bus";
215
216 bman-portal@0 {
217 compatible = "fsl,bman-portal";
218 reg = <0x0 0x4000>, <0x1000000 0x1000>;
219 interrupts = <105 2 0 0>;
220 };
221 bman-portal@4000 {
222 compatible = "fsl,bman-portal";
223 reg = <0x4000 0x4000>, <0x1001000 0x1000>;
224 interrupts = <107 2 0 0>;
225 };
226 bman-portal@8000 {
227 compatible = "fsl,bman-portal";
228 reg = <0x8000 0x4000>, <0x1002000 0x1000>;
229 interrupts = <109 2 0 0>;
230 };
231 bman-portal@c000 {
232 compatible = "fsl,bman-portal";
233 reg = <0xc000 0x4000>, <0x1003000 0x1000>;
234 interrupts = <111 2 0 0>;
235 };
236 bman-portal@10000 {
237 compatible = "fsl,bman-portal";
238 reg = <0x10000 0x4000>, <0x1004000 0x1000>;
239 interrupts = <113 2 0 0>;
240 };
241 bman-portal@14000 {
242 compatible = "fsl,bman-portal";
243 reg = <0x14000 0x4000>, <0x1005000 0x1000>;
244 interrupts = <115 2 0 0>;
245 };
246 bman-portal@18000 {
247 compatible = "fsl,bman-portal";
248 reg = <0x18000 0x4000>, <0x1006000 0x1000>;
249 interrupts = <117 2 0 0>;
250 };
251 bman-portal@1c000 {
252 compatible = "fsl,bman-portal";
253 reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
254 interrupts = <119 2 0 0>;
255 };
256 bman-portal@20000 {
257 compatible = "fsl,bman-portal";
258 reg = <0x20000 0x4000>, <0x1008000 0x1000>;
259 interrupts = <121 2 0 0>;
260 };
261 bman-portal@24000 {
262 compatible = "fsl,bman-portal";
263 reg = <0x24000 0x4000>, <0x1009000 0x1000>;
264 interrupts = <123 2 0 0>;
265 };
266};
267
268&qportals {
269 #address-cells = <0x1>;
270 #size-cells = <0x1>;
271 compatible = "simple-bus";
272
273 qportal0: qman-portal@0 {
274 compatible = "fsl,qman-portal";
275 reg = <0x0 0x4000>, <0x1000000 0x1000>;
276 interrupts = <104 0x2 0 0>;
277 cell-index = <0x0>;
278 };
279 qportal1: qman-portal@4000 {
280 compatible = "fsl,qman-portal";
281 reg = <0x4000 0x4000>, <0x1001000 0x1000>;
282 interrupts = <106 0x2 0 0>;
283 cell-index = <0x1>;
284 };
285 qportal2: qman-portal@8000 {
286 compatible = "fsl,qman-portal";
287 reg = <0x8000 0x4000>, <0x1002000 0x1000>;
288 interrupts = <108 0x2 0 0>;
289 cell-index = <0x2>;
290 };
291 qportal3: qman-portal@c000 {
292 compatible = "fsl,qman-portal";
293 reg = <0xc000 0x4000>, <0x1003000 0x1000>;
294 interrupts = <110 0x2 0 0>;
295 cell-index = <0x3>;
296 };
297 qportal4: qman-portal@10000 {
298 compatible = "fsl,qman-portal";
299 reg = <0x10000 0x4000>, <0x1004000 0x1000>;
300 interrupts = <112 0x2 0 0>;
301 cell-index = <0x4>;
302 };
303 qportal5: qman-portal@14000 {
304 compatible = "fsl,qman-portal";
305 reg = <0x14000 0x4000>, <0x1005000 0x1000>;
306 interrupts = <114 0x2 0 0>;
307 cell-index = <0x5>;
308 };
309 qportal6: qman-portal@18000 {
310 compatible = "fsl,qman-portal";
311 reg = <0x18000 0x4000>, <0x1006000 0x1000>;
312 interrupts = <116 0x2 0 0>;
313 cell-index = <0x6>;
314 };
315 qportal7: qman-portal@1c000 {
316 compatible = "fsl,qman-portal";
317 reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
318 interrupts = <118 0x2 0 0>;
319 cell-index = <0x7>;
320 };
321 qportal8: qman-portal@20000 {
322 compatible = "fsl,qman-portal";
323 reg = <0x20000 0x4000>, <0x1008000 0x1000>;
324 interrupts = <120 0x2 0 0>;
325 cell-index = <0x8>;
326 };
327 qportal9: qman-portal@24000 {
328 compatible = "fsl,qman-portal";
329 reg = <0x24000 0x4000>, <0x1009000 0x1000>;
330 interrupts = <122 0x2 0 0>;
331 cell-index = <0x9>;
332 };
333};
334
335&soc {
336 #address-cells = <1>;
337 #size-cells = <1>;
338 device_type = "soc";
339 compatible = "simple-bus";
340
341 soc-sram-error {
342 compatible = "fsl,soc-sram-error";
343 interrupts = <16 2 1 29>;
344 };
345
346 corenet-law@0 {
347 compatible = "fsl,corenet-law";
348 reg = <0x0 0x1000>;
349 fsl,num-laws = <16>;
350 };
351
352 ddr1: memory-controller@8000 {
353 compatible = "fsl,qoriq-memory-controller-v5.0",
354 "fsl,qoriq-memory-controller";
355 reg = <0x8000 0x1000>;
356 interrupts = <16 2 1 23>;
357 };
358
359 cpc: l3-cache-controller@10000 {
360 compatible = "fsl,t1040-l3-cache-controller", "cache";
361 reg = <0x10000 0x1000>;
362 interrupts = <16 2 1 27>;
363 };
364
365 corenet-cf@18000 {
366 compatible = "fsl,corenet2-cf", "fsl,corenet-cf";
367 reg = <0x18000 0x1000>;
368 interrupts = <16 2 1 31>;
369 fsl,ccf-num-csdids = <32>;
370 fsl,ccf-num-snoopids = <32>;
371 };
372
373 iommu@20000 {
374 compatible = "fsl,pamu-v1.0", "fsl,pamu";
375 reg = <0x20000 0x1000>;
376 ranges = <0 0x20000 0x1000>;
377 #address-cells = <1>;
378 #size-cells = <1>;
379 interrupts = <
380 24 2 0 0
381 16 2 1 30>;
382 pamu0: pamu@0 {
383 reg = <0 0x1000>;
384 fsl,primary-cache-geometry = <128 1>;
385 fsl,secondary-cache-geometry = <16 2>;
386 };
387 };
388
389/include/ "qoriq-mpic.dtsi"
390
391 guts: global-utilities@e0000 {
392 compatible = "fsl,t1040-device-config", "fsl,qoriq-device-config-2.0";
393 reg = <0xe0000 0xe00>;
394 fsl,has-rstcr;
395 fsl,liodn-bits = <12>;
396 };
397
398/include/ "qoriq-clockgen2.dtsi"
399 global-utilities@e1000 {
400 compatible = "fsl,t1040-clockgen", "fsl,qoriq-clockgen-2.0";
401 };
402
403 rcpm: global-utilities@e2000 {
404 compatible = "fsl,t1040-rcpm", "fsl,qoriq-rcpm-2.1";
405 reg = <0xe2000 0x1000>;
406 };
407
408 sfp: sfp@e8000 {
409 compatible = "fsl,t1040-sfp";
410 reg = <0xe8000 0x1000>;
411 };
412
413 serdes: serdes@ea000 {
414 compatible = "fsl,t1040-serdes";
415 reg = <0xea000 0x4000>;
416 };
417
418 tmu: tmu@f0000 {
419 compatible = "fsl,qoriq-tmu";
420 reg = <0xf0000 0x1000>;
421 interrupts = <18 2 0 0>;
422 fsl,tmu-range = <0xa0000 0x90026 0x8004a 0x1006a>;
423 fsl,tmu-calibration = <0x00000000 0x00000025
424 0x00000001 0x00000028
425 0x00000002 0x0000002d
426 0x00000003 0x00000031
427 0x00000004 0x00000036
428 0x00000005 0x0000003a
429 0x00000006 0x00000040
430 0x00000007 0x00000044
431 0x00000008 0x0000004a
432 0x00000009 0x0000004f
433 0x0000000a 0x00000054
434
435 0x00010000 0x0000000d
436 0x00010001 0x00000013
437 0x00010002 0x00000019
438 0x00010003 0x0000001f
439 0x00010004 0x00000025
440 0x00010005 0x0000002d
441 0x00010006 0x00000033
442 0x00010007 0x00000043
443 0x00010008 0x0000004b
444 0x00010009 0x00000053
445
446 0x00020000 0x00000010
447 0x00020001 0x00000017
448 0x00020002 0x0000001f
449 0x00020003 0x00000029
450 0x00020004 0x00000031
451 0x00020005 0x0000003c
452 0x00020006 0x00000042
453 0x00020007 0x0000004d
454 0x00020008 0x00000056
455
456 0x00030000 0x00000012
457 0x00030001 0x0000001d>;
458 #thermal-sensor-cells = <1>;
459 };
460
461 thermal-zones {
462 cpu_thermal: cpu-thermal {
463 polling-delay-passive = <1000>;
464 polling-delay = <5000>;
465
466 thermal-sensors = <&tmu 2>;
467
468 trips {
469 cpu_alert: cpu-alert {
470 temperature = <85000>;
471 hysteresis = <2000>;
472 type = "passive";
473 };
474 cpu_crit: cpu-crit {
475 temperature = <95000>;
476 hysteresis = <2000>;
477 type = "critical";
478 };
479 };
480
481 cooling-maps {
482 map0 {
483 trip = <&cpu_alert>;
484 cooling-device =
485 <&cpu0 THERMAL_NO_LIMIT
486 THERMAL_NO_LIMIT>;
487 };
488 map1 {
489 trip = <&cpu_alert>;
490 cooling-device =
491 <&cpu1 THERMAL_NO_LIMIT
492 THERMAL_NO_LIMIT>;
493 };
494 map2 {
495 trip = <&cpu_alert>;
496 cooling-device =
497 <&cpu2 THERMAL_NO_LIMIT
498 THERMAL_NO_LIMIT>;
499 };
500 map3 {
501 trip = <&cpu_alert>;
502 cooling-device =
503 <&cpu3 THERMAL_NO_LIMIT
504 THERMAL_NO_LIMIT>;
505 };
506 };
507 };
508 };
509
510 scfg: global-utilities@fc000 {
511 compatible = "fsl,t1040-scfg";
512 reg = <0xfc000 0x1000>;
513 };
514
515/include/ "elo3-dma-0.dtsi"
516/include/ "elo3-dma-1.dtsi"
517/include/ "qoriq-espi-0.dtsi"
518 spi@110000 {
519 fsl,espi-num-chipselects = <4>;
520 };
521
522/include/ "qoriq-esdhc-0.dtsi"
523 sdhc@114000 {
524 compatible = "fsl,t1040-esdhc", "fsl,esdhc";
525 fsl,iommu-parent = <&pamu0>;
526 fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
527 sdhci,auto-cmd12;
528 };
529/include/ "qoriq-i2c-0.dtsi"
530/include/ "qoriq-i2c-1.dtsi"
531/include/ "qoriq-duart-0.dtsi"
532/include/ "qoriq-duart-1.dtsi"
533/include/ "qoriq-gpio-0.dtsi"
534/include/ "qoriq-gpio-1.dtsi"
535/include/ "qoriq-gpio-2.dtsi"
536/include/ "qoriq-gpio-3.dtsi"
537/include/ "qoriq-usb2-mph-0.dtsi"
538 usb0: usb@210000 {
539 compatible = "fsl-usb2-mph-v2.5", "fsl-usb2-mph";
540 fsl,iommu-parent = <&pamu0>;
541 fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
542 phy_type = "utmi";
543 port0;
544 };
545/include/ "qoriq-usb2-dr-0.dtsi"
546 usb1: usb@211000 {
547 compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
548 fsl,iommu-parent = <&pamu0>;
549 fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */
550 dr_mode = "host";
551 phy_type = "utmi";
552 };
553
554 display@180000 {
555 compatible = "fsl,t1040-diu", "fsl,diu";
556 reg = <0x180000 1000>;
557 interrupts = <74 2 0 0>;
558 };
559
560/include/ "qoriq-sata2-0.dtsi"
561 sata@220000 {
562 fsl,iommu-parent = <&pamu0>;
563 fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */
564 };
565/include/ "qoriq-sata2-1.dtsi"
566 sata@221000 {
567 fsl,iommu-parent = <&pamu0>;
568 fsl,liodn-reg = <&guts 0x554>; /* SATA2LIODNR */
569 };
570/include/ "qoriq-sec5.0-0.dtsi"
571/include/ "qoriq-qman3.dtsi"
572/include/ "qoriq-bman1.dtsi"
573
574/include/ "qoriq-fman3l-0.dtsi"
575/include/ "qoriq-fman3-0-1g-0.dtsi"
576/include/ "qoriq-fman3-0-1g-1.dtsi"
577/include/ "qoriq-fman3-0-1g-2.dtsi"
578/include/ "qoriq-fman3-0-1g-3.dtsi"
579/include/ "qoriq-fman3-0-1g-4.dtsi"
580 fman@400000 {
581 enet0: ethernet@e0000 {
582 };
583
584 enet1: ethernet@e2000 {
585 };
586
587 enet2: ethernet@e4000 {
588 };
589
590 enet3: ethernet@e6000 {
591 };
592
593 enet4: ethernet@e8000 {
594 };
595
596 mdio@fc000 {
597 interrupts = <100 1 0 0>;
598 };
599
600 mdio@fd000 {
601 status = "disabled";
602 };
603 };
604
605 seville_switch: ethernet-switch@800000 {
606 compatible = "mscc,vsc9953-switch";
607 reg = <0x800000 0x290000>;
608 interrupts = <26 2 0 0>;
609 interrupt-names = "xtr";
610 little-endian;
611 #address-cells = <1>;
612 #size-cells = <0>;
613 status = "disabled";
614
615 ports {
616 #address-cells = <1>;
617 #size-cells = <0>;
618
619 seville_port0: port@0 {
620 reg = <0>;
621 status = "disabled";
622 };
623
624 seville_port1: port@1 {
625 reg = <1>;
626 status = "disabled";
627 };
628
629 seville_port2: port@2 {
630 reg = <2>;
631 status = "disabled";
632 };
633
634 seville_port3: port@3 {
635 reg = <3>;
636 status = "disabled";
637 };
638
639 seville_port4: port@4 {
640 reg = <4>;
641 status = "disabled";
642 };
643
644 seville_port5: port@5 {
645 reg = <5>;
646 status = "disabled";
647 };
648
649 seville_port6: port@6 {
650 reg = <6>;
651 status = "disabled";
652 };
653
654 seville_port7: port@7 {
655 reg = <7>;
656 status = "disabled";
657 };
658
659 seville_port8: port@8 {
660 reg = <8>;
661 phy-mode = "internal";
662 status = "disabled";
663
664 fixed-link {
665 speed = <2500>;
666 full-duplex;
667 };
668 };
669
670 seville_port9: port@9 {
671 reg = <9>;
672 phy-mode = "internal";
673 status = "disabled";
674
675 fixed-link {
676 speed = <2500>;
677 full-duplex;
678 };
679 };
680 };
681 };
682};
683
684&qe {
685 #address-cells = <1>;
686 #size-cells = <1>;
687 device_type = "qe";
688 compatible = "fsl,qe";
689 fsl,qe-num-riscs = <1>;
690 fsl,qe-num-snums = <28>;
691
692 qeic: interrupt-controller@80 {
693 interrupt-controller;
694 compatible = "fsl,qe-ic";
695 #address-cells = <0>;
696 #interrupt-cells = <1>;
697 reg = <0x80 0x80>;
698 interrupts = <95 2 0 0 94 2 0 0>; //high:79 low:78
699 };
700
701 ucc@2000 {
702 cell-index = <1>;
703 reg = <0x2000 0x200>;
704 interrupts = <32>;
705 interrupt-parent = <&qeic>;
706 };
707
708 ucc@2200 {
709 cell-index = <3>;
710 reg = <0x2200 0x200>;
711 interrupts = <34>;
712 interrupt-parent = <&qeic>;
713 };
714
715 muram@10000 {
716 #address-cells = <1>;
717 #size-cells = <1>;
718 compatible = "fsl,qe-muram", "fsl,cpm-muram";
719 ranges = <0x0 0x10000 0x6000>;
720
721 data-only@0 {
722 compatible = "fsl,qe-muram-data",
723 "fsl,cpm-muram-data";
724 reg = <0x0 0x6000>;
725 };
726 };
727};