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Sergei Poselenov9531a232010-09-09 23:03:31 +02001/*
2 * (C) Copyright 2003-2005
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * (C) Copyright 2010
6 * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com.
7 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +02008 * SPDX-License-Identifier: GPL-2.0+
Sergei Poselenov9531a232010-09-09 23:03:31 +02009 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
14/*
15 * High Level Configuration Options
16 * (easy to change)
17 */
18
19#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
20#define CONFIG_MPC5200 1 /* (more precisely a MPC5200 CPU) */
21#define CONFIG_A4M072 1 /* ... on A4M072 board */
22#define CONFIG_MPC5200_DDR 1 /* ... use DDR RAM */
23
Wolfgang Denkc8d76ea2010-10-18 23:43:37 +020024#define CONFIG_SYS_TEXT_BASE 0xFE000000
25
Sergei Poselenov9531a232010-09-09 23:03:31 +020026#define CONFIG_MISC_INIT_R
27
28#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
29
Sergei Poselenov9531a232010-09-09 23:03:31 +020030#define CONFIG_HIGH_BATS 1 /* High BATs supported */
31
32/*
33 * Serial console configuration
34 */
35#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
36#define CONFIG_BAUDRATE 9600 /* ... at 9600 bps */
37#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
38/* define to enable silent console */
39#define CONFIG_SILENT_CONSOLE
40#define CONFIG_SYS_DEVICE_NULLDEV 1 /* include nulldev device */
41
42/*
43 * PCI Mapping:
44 * 0x40000000 - 0x4fffffff - PCI Memory
45 * 0x50000000 - 0x50ffffff - PCI IO Space
46 */
47#define CONFIG_PCI
48
49#if defined(CONFIG_PCI)
50#define CONFIG_PCI_PNP 1
51#define CONFIG_PCI_SCAN_SHOW 1
52#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
53
54#define CONFIG_PCI_MEM_BUS 0x40000000
55#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
56#define CONFIG_PCI_MEM_SIZE 0x10000000
57
58#define CONFIG_PCI_IO_BUS 0x50000000
59#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
60#define CONFIG_PCI_IO_SIZE 0x01000000
61#endif
62
63#define CONFIG_SYS_XLB_PIPELINING 1
64
Wolfgang Denk071bc922010-10-27 22:48:30 +020065#undef CONFIG_EEPRO100
Sergei Poselenov9531a232010-09-09 23:03:31 +020066
67/* Partitions */
68#define CONFIG_MAC_PARTITION
69#define CONFIG_DOS_PARTITION
70
71/* USB */
72#define CONFIG_USB_OHCI_NEW
73#define CONFIG_USB_STORAGE
74#define CONFIG_SYS_OHCI_BE_CONTROLLER
75#undef CONFIG_SYS_USB_OHCI_BOARD_INIT
76#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
77#define CONFIG_SYS_USB_OHCI_REGS_BASE MPC5XXX_USB
78#define CONFIG_SYS_USB_OHCI_SLOT_NAME "mpc5200"
79#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
80
81#define CONFIG_TIMESTAMP /* Print image info with timestamp */
82
83/*
84 * BOOTP options
85 */
86#define CONFIG_BOOTP_BOOTFILESIZE
87#define CONFIG_BOOTP_BOOTPATH
88#define CONFIG_BOOTP_GATEWAY
89#define CONFIG_BOOTP_HOSTNAME
90
91
92/*
93 * Command line configuration.
94 */
95#include <config_cmd_default.h>
96
97#define CONFIG_CMD_EEPROM
98#define CONFIG_CMD_FAT
99#define CONFIG_CMD_I2C
100#define CONFIG_CMD_IDE
101#define CONFIG_CMD_NFS
102#define CONFIG_CMD_SNTP
103#define CONFIG_CMD_USB
104#define CONFIG_CMD_MII
105#define CONFIG_CMD_DHCP
106#define CONFIG_CMD_PING
Ilya Yanokcb5639c2010-09-09 23:03:33 +0200107#define CONFIG_CMD_DISPLAY
Sergei Poselenov9531a232010-09-09 23:03:31 +0200108
109#if defined(CONFIG_PCI)
110#define CONFIG_CMD_PCI
111#endif
112
Wolfgang Denkc8d76ea2010-10-18 23:43:37 +0200113#if (CONFIG_SYS_TEXT_BASE == 0xFE000000) /* Boot low with 32 MB Flash */
Sergei Poselenov9531a232010-09-09 23:03:31 +0200114#define CONFIG_SYS_LOWBOOT 1
115#define CONFIG_SYS_LOWBOOT32 1
116#endif
117
118/*
119 * Autobooting
120 */
121#define CONFIG_BOOTDELAY 2 /* autoboot after 2 seconds */
122
123#define CONFIG_SYS_AUTOLOAD "n"
124
125#define CONFIG_AUTOBOOT_KEYED
126#define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds\n", bootdelay
127#define CONFIG_AUTOBOOT_DELAY_STR "asdfg"
128
129#undef CONFIG_BOOTARGS
130#define CONFIG_PREBOOT "run try_update"
131
132#define CONFIG_EXTRA_ENV_SETTINGS \
Ilya Yanok7ae54992010-10-21 17:20:09 +0200133 "bk=run add_mtd ; run add_consolespec ; bootm 200000\0" \
134 "cf1=diskboot 200000 0:1\0" \
135 "bootcmd_cf1=run bcf1\0" \
136 "bcf=setenv bootargs root=/dev/hda3\0" \
137 "bootcmd_nfs=run bnfs\0" \
138 "norargs=setenv bootargs root=/dev/mtdblock3 rootfstype=cramfs "\
139 "panic=1\0" \
140 "bootcmd_nor=cp.b ${kernel_addr} 200000 100000;" \
141 "run norargs addip; run bk\0" \
142 "bnfs=nfs 200000 ${rootpath}/boot/uImage;" \
143 "run nfsargs addip ; run bk\0" \
144 "nfsargs=setenv bootargs root=/dev/nfs rw " \
145 "nfsroot=${serverip}:${rootpath}\0" \
146 "try_update=usb start;sleep 2;usb start;sleep 1;" \
147 "fatload usb 0 2F0000 PCPUUPDT 2FF;usb stop;" \
148 "source 2F0000\0" \
149 "env_addr=FE060000\0" \
150 "kernel_addr=FE100000\0" \
151 "rootfs_addr=FE200000\0" \
152 "add_mtd=setenv bootargs ${bootargs} mtdparts=" \
153 "phys_mapped_flash:384k(u),640k(e),1m(k),30m(r)\0" \
154 "bcf1=run cf1; run bcf; run addip; run bk\0" \
155 "add_consolespec=setenv bootargs ${bootargs} " \
156 "console=/dev/null quiet\0" \
157 "addip=if test -n ${ethaddr};" \
158 "then if test -n ${ipaddr};" \
159 "then setenv bootargs ${bootargs} " \
160 "ip=${ipaddr}:${serverip}:${gatewayip}:"\
161 "${netmask}:${hostname}:${netdev}:off;" \
162 "fi;" \
163 "else;" \
164 "setenv bootargs ${bootargs} no_ethaddr;" \
165 "fi\0" \
166 "hostname=CPUP0\0" \
167 "ethaddr=00:00:00:00:00:00\0" \
168 "netdev=eth0\0" \
169 "bootcmd=run bootcmd_nor\0" \
Sergei Poselenov9531a232010-09-09 23:03:31 +0200170 ""
171/*
172 * IPB Bus clocking configuration.
173 */
174#undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
175
176/*
177 * I2C configuration
178 */
179#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
180#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
181
182#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
183#define CONFIG_SYS_I2C_SLAVE 0x7F
184
185/*
186 * EEPROM configuration
187 */
188#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 /* 1010010x */
189#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
190#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
191#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
192#define CONFIG_SYS_EEPROM_WREN 1
193#define CONFIG_SYS_EEPROM_WP GPIO_PSC2_4
194
195/*
196 * Flash configuration
197 */
198#define CONFIG_SYS_FLASH_BASE 0xFE000000
199#define CONFIG_SYS_FLASH_SIZE 0x02000000
200#if !defined(CONFIG_SYS_LOWBOOT)
201#error "CONFIG_SYS_LOWBOOT not defined?"
202#else /* CONFIG_SYS_LOWBOOT */
203#if defined(CONFIG_SYS_LOWBOOT32)
204#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00060000)
205#endif
206#endif /* CONFIG_SYS_LOWBOOT */
207
208#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
209#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max num of sects on one chip */
210#define CONFIG_FLASH_CFI_DRIVER
211#define CONFIG_SYS_FLASH_CFI
212#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
213#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_CS0_START}
Ilya Yanoke36aff62010-10-21 17:20:13 +0200214#define CONFIG_SYS_FLASH_BANKS_SIZES {CONFIG_SYS_CS0_SIZE}
Sergei Poselenov9531a232010-09-09 23:03:31 +0200215
216/*
217 * Environment settings
218 */
219#define CONFIG_ENV_IS_IN_FLASH 1
220#define CONFIG_ENV_SIZE 0x10000
221#define CONFIG_ENV_SECT_SIZE 0x20000
222#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
223#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
224
225#define CONFIG_ENV_OVERWRITE 1
226
227/*
228 * Memory map
229 */
230#define CONFIG_SYS_MBAR 0xF0000000
231#define CONFIG_SYS_SDRAM_BASE 0x00000000
232#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
233
234/* Use SRAM until RAM will be available */
235#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
Wolfgang Denk553f0982010-10-26 13:32:32 +0200236#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */
Sergei Poselenov9531a232010-09-09 23:03:31 +0200237
238
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200239#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Sergei Poselenov9531a232010-09-09 23:03:31 +0200240#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
241
Wolfgang Denkc8d76ea2010-10-18 23:43:37 +0200242#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Sergei Poselenov9531a232010-09-09 23:03:31 +0200243#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
244# define CONFIG_SYS_RAMBOOT 1
245#endif
246
247#define CONFIG_SYS_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
248#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
249#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
250
251/*
252 * Ethernet configuration
253 */
254#define CONFIG_MPC5xxx_FEC 1
255#define CONFIG_MPC5xxx_FEC_MII100
256/*
257 * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
258 */
259/* #define CONFIG_MPC5xxx_FEC_MII10 */
260#define CONFIG_PHY_ADDR 0x1f
261#define CONFIG_PHY_TYPE 0x79c874 /* AMD Phy Controller */
262
263/*
264 * GPIO configuration
265 */
Ilya Yanokcb5639c2010-09-09 23:03:33 +0200266#define CONFIG_SYS_GPS_PORT_CONFIG 0x18000004
Sergei Poselenov9531a232010-09-09 23:03:31 +0200267
268/*
269 * Miscellaneous configurable options
270 */
271#define CONFIG_SYS_HUSH_PARSER
272#define CONFIG_CMDLINE_EDITING 1
Sergei Poselenov9531a232010-09-09 23:03:31 +0200273#define CONFIG_SYS_LONGHELP /* undef to save memory */
Sergei Poselenov9531a232010-09-09 23:03:31 +0200274#if defined(CONFIG_CMD_KGDB)
275#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
276#else
277#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
278#endif
279#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
280#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
281#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
282
283#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
284#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
285
286#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
287
Sergei Poselenov9531a232010-09-09 23:03:31 +0200288#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
289#if defined(CONFIG_CMD_KGDB)
290# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
291#endif
292
293
294/*
295 * Various low-level settings
296 */
297#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
298#define CONFIG_SYS_HID0_FINAL HID0_ICE
299/* Flash at CSBoot, CS0 */
300#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
301#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
302#define CONFIG_SYS_BOOTCS_CFG 0x0002DD00
303#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
304#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
305/* External SRAM at CS1 */
306#define CONFIG_SYS_CS1_START 0x62000000
307#define CONFIG_SYS_CS1_SIZE 0x00400000
308#define CONFIG_SYS_CS1_CFG 0x00009930
309#define CONFIG_SYS_SRAM_BASE CONFIG_SYS_CS1_START
310#define CONFIG_SYS_SRAM_SIZE CONFIG_SYS_CS1_SIZE
Ilya Yanokcb5639c2010-09-09 23:03:33 +0200311/* LED display at CS7 */
312#define CONFIG_SYS_CS7_START 0x6a000000
313#define CONFIG_SYS_CS7_SIZE (64*1024)
314#define CONFIG_SYS_CS7_CFG 0x0000bf30
Sergei Poselenov9531a232010-09-09 23:03:31 +0200315
316#define CONFIG_SYS_CS_BURST 0x00000000
317#define CONFIG_SYS_CS_DEADCYCLE 0x33333003
318
319#define CONFIG_SYS_RESET_ADDRESS 0xff000000
320
321/*-----------------------------------------------------------------------
322 * USB stuff
323 *-----------------------------------------------------------------------
324 */
325#define CONFIG_USB_CLOCK 0x0001BBBB
326#define CONFIG_USB_CONFIG 0x00001000 /* 0x4000 for SE mode */
327
328/*-----------------------------------------------------------------------
329 * IDE/ATA stuff Supports IDE harddisk
330 *-----------------------------------------------------------------------
331 */
332
333#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
334
335#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
336#undef CONFIG_IDE_LED /* LED for ide not supported */
337
338#define CONFIG_IDE_PREINIT
339
340#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
341#define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 2 drives per IDE bus */
342
343#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
344
345#define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA
346
347/* Offset for data I/O */
348#define CONFIG_SYS_ATA_DATA_OFFSET (0x0060)
349
350/* Offset for normal register accesses */
351#define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET)
352
353/* Offset for alternate registers */
354#define CONFIG_SYS_ATA_ALT_OFFSET (0x005C)
355
356/* Interval between registers */
357#define CONFIG_SYS_ATA_STRIDE 4
358
359#define CONFIG_ATAPI 1
360
361/*-----------------------------------------------------------------------
362 * Open firmware flat tree support
363 *-----------------------------------------------------------------------
364 */
365#define CONFIG_OF_LIBFDT 1
366#define CONFIG_OF_BOARD_SETUP 1
367
368#define OF_CPU "PowerPC,5200@0"
369#define OF_SOC "soc5200@f0000000"
370#define OF_TBCLK (bd->bi_busfreq / 4)
371#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
372
Ilya Yanokcb5639c2010-09-09 23:03:33 +0200373/* Support for the 7-segment display */
374#define CONFIG_SYS_DISP_CHR_RAM CONFIG_SYS_CS7_START
375#define CONFIG_SHOW_ACTIVITY /* used for display realization */
376
Ilya Yanok92d1a402010-09-09 23:03:34 +0200377#define CONFIG_SHOW_BOOT_PROGRESS
378
Sergei Poselenov9531a232010-09-09 23:03:31 +0200379#endif /* __CONFIG_H */