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Marek Vasut0f83b362013-04-25 10:16:03 +00001/*
2 * DENX M53 configuration
3 * Copyright (C) 2012-2013 Marek Vasut <marex@denx.de>
4 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +02005 * SPDX-License-Identifier: GPL-2.0+
Marek Vasut0f83b362013-04-25 10:16:03 +00006 */
7
8#ifndef __M53EVK_CONFIG_H__
9#define __M53EVK_CONFIG_H__
10
11#define CONFIG_MX53
12#define CONFIG_MXC_GPIO
Marek Vasut0f83b362013-04-25 10:16:03 +000013
14#include <asm/arch/imx-regs.h>
15
16#define CONFIG_DISPLAY_CPUINFO
17#define CONFIG_BOARD_EARLY_INIT_F
18#define CONFIG_REVISION_TAG
19#define CONFIG_SYS_NO_FLASH
20
21/*
22 * U-Boot Commands
23 */
24#include <config_cmd_default.h>
25#define CONFIG_DISPLAY_BOARDINFO
26#define CONFIG_DOS_PARTITION
27
28#define CONFIG_CMD_DATE
29#define CONFIG_CMD_DHCP
30#define CONFIG_CMD_EXT2
31#define CONFIG_CMD_FAT
32#define CONFIG_CMD_I2C
33#define CONFIG_CMD_MII
34#define CONFIG_CMD_MMC
35#define CONFIG_CMD_NAND
36#define CONFIG_CMD_NET
37#define CONFIG_CMD_PING
38#define CONFIG_CMD_SATA
39#define CONFIG_CMD_USB
40
41/*
42 * Memory configurations
43 */
44#define CONFIG_NR_DRAM_BANKS 2
45#define PHYS_SDRAM_1 CSD0_BASE_ADDR
46#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
47#define PHYS_SDRAM_2 CSD1_BASE_ADDR
48#define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024)
49#define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
50#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
51#define CONFIG_SYS_MEMTEST_START 0x70000000
52#define CONFIG_SYS_MEMTEST_END 0xaff00000
53
54#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
55#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
56#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
57
58#define CONFIG_SYS_INIT_SP_OFFSET \
59 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
60#define CONFIG_SYS_INIT_SP_ADDR \
61 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
62
63#define CONFIG_SYS_TEXT_BASE 0x71000000
64
65/*
66 * U-Boot general configurations
67 */
68#define CONFIG_SYS_LONGHELP
Marek Vasut0f83b362013-04-25 10:16:03 +000069#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
70#define CONFIG_SYS_PBSIZE \
71 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
72 /* Print buffer size */
73#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
74#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
75 /* Boot argument buffer size */
76#define CONFIG_VERSION_VARIABLE /* U-BOOT version */
77#define CONFIG_AUTO_COMPLETE /* Command auto complete */
78#define CONFIG_CMDLINE_EDITING /* Command history etc */
79#define CONFIG_SYS_HUSH_PARSER
80
81/*
82 * Serial Driver
83 */
84#define CONFIG_MXC_UART
85#define CONFIG_MXC_UART_BASE UART2_BASE
86#define CONFIG_CONS_INDEX 1
87#define CONFIG_BAUDRATE 115200
88
89/*
90 * MMC Driver
91 */
92#ifdef CONFIG_CMD_MMC
93#define CONFIG_MMC
94#define CONFIG_GENERIC_MMC
95#define CONFIG_FSL_ESDHC
96#define CONFIG_SYS_FSL_ESDHC_ADDR 0
97#define CONFIG_SYS_FSL_ESDHC_NUM 1
98#endif
99
100/*
101 * NAND
102 */
103#define CONFIG_ENV_SIZE (16 * 1024)
104#ifdef CONFIG_CMD_NAND
105#define CONFIG_SYS_MAX_NAND_DEVICE 1
106#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
107#define CONFIG_NAND_MXC
108#define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
109#define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
110#define CONFIG_SYS_NAND_LARGEPAGE
111#define CONFIG_MXC_NAND_HWECC
112#define CONFIG_SYS_NAND_USE_FLASH_BBT
113
114/* Environment is in NAND */
115#define CONFIG_ENV_IS_IN_NAND
116#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
117#define CONFIG_ENV_SECT_SIZE (128 * 1024)
118#define CONFIG_ENV_RANGE (512 * 1024)
119#define CONFIG_ENV_OFFSET 0x100000
120#define CONFIG_ENV_OFFSET_REDUND \
121 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
122
123#define CONFIG_CMD_UBI
124#define CONFIG_CMD_UBIFS
125#define CONFIG_CMD_MTDPARTS
126#define CONFIG_RBTREE
127#define CONFIG_LZO
128#define CONFIG_MTD_DEVICE
129#define CONFIG_MTD_PARTITIONS
130#define MTDIDS_DEFAULT "nand0=mxc-nand"
131#define MTDPARTS_DEFAULT \
132 "mtdparts=mxc-nand:" \
133 "1m(bootloader)ro," \
134 "512k(environment)," \
135 "512k(redundant-environment)," \
136 "4m(kernel)," \
137 "128k(fdt)," \
138 "8m(ramdisk)," \
139 "-(filesystem)"
140#else
141#define CONFIG_ENV_IS_NOWHERE
142#endif
143
144/*
145 * Ethernet on SOC (FEC)
146 */
147#ifdef CONFIG_CMD_NET
148#define CONFIG_FEC_MXC
149#define IMX_FEC_BASE FEC_BASE_ADDR
150#define CONFIG_FEC_MXC_PHYADDR 0x0
151#define CONFIG_MII
152#define CONFIG_DISCOVER_PHY
153#define CONFIG_FEC_XCV_TYPE RMII
154#define CONFIG_PHYLIB
155#define CONFIG_PHY_MICREL
156#endif
157
158/*
159 * I2C
160 */
161#ifdef CONFIG_CMD_I2C
tremb089d032013-09-21 18:13:36 +0200162#define CONFIG_SYS_I2C
163#define CONFIG_SYS_I2C_MXC
164#define CONFIG_SYS_SPD_BUS_NUM 1 /* I2C2 */
Marek Vasut0f83b362013-04-25 10:16:03 +0000165#endif
166
167/*
168 * RTC
169 */
170#ifdef CONFIG_CMD_DATE
171#define CONFIG_RTC_M41T62
172#define CONFIG_SYS_I2C_RTC_ADDR 0x68
173#define CONFIG_SYS_M41T11_BASE_YEAR 2000
174#endif
175
176/*
177 * USB
178 */
179#ifdef CONFIG_CMD_USB
180#define CONFIG_USB_EHCI
181#define CONFIG_USB_EHCI_MX5
182#define CONFIG_USB_STORAGE
183#define CONFIG_USB_HOST_ETHER
184#define CONFIG_USB_ETHER_ASIX
185#define CONFIG_USB_ETHER_SMSC95XX
186#define CONFIG_MXC_USB_PORT 1
187#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
188#define CONFIG_MXC_USB_FLAGS 0
189#endif
190
191/*
192 * SATA
193 */
194#ifdef CONFIG_CMD_SATA
195#define CONFIG_DWC_AHSATA
196#define CONFIG_SYS_SATA_MAX_DEVICE 1
197#define CONFIG_DWC_AHSATA_PORT_ID 0
198#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR
199#define CONFIG_LBA48
200#define CONFIG_LIBATA
201#endif
202
203/*
204 * Boot Linux
205 */
206#define CONFIG_CMDLINE_TAG
207#define CONFIG_INITRD_TAG
208#define CONFIG_REVISION_TAG
209#define CONFIG_SETUP_MEMORY_TAGS
210#define CONFIG_BOOTDELAY 3
211#define CONFIG_BOOTFILE "m53evk/uImage"
212#define CONFIG_BOOTARGS "console=ttymxc1,115200"
213#define CONFIG_LOADADDR 0x70800000
214#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
215#define CONFIG_OF_LIBFDT
216
217/*
218 * NAND SPL
219 */
220#define CONFIG_SPL
221#define CONFIG_SPL_FRAMEWORK
222#define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx"
223#define CONFIG_SPL_BOARD_INIT
224#define CONFIG_SPL_TEXT_BASE 0x70008000
225#define CONFIG_SPL_PAD_TO 0x8000
226#define CONFIG_SPL_STACK 0x70004000
227#define CONFIG_SPL_GPIO_SUPPORT
228#define CONFIG_SPL_LIBCOMMON_SUPPORT
229#define CONFIG_SPL_LIBGENERIC_SUPPORT
230#define CONFIG_SPL_NAND_SUPPORT
231#define CONFIG_SPL_SERIAL_SUPPORT
232
233#define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO
234#define CONFIG_SYS_NAND_PAGE_SIZE 2048
235#define CONFIG_SYS_NAND_OOBSIZE 64
236#define CONFIG_SYS_NAND_PAGE_COUNT 64
237#define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
238#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
239
240#endif /* __M53EVK_CONFIG_H__ */