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Derald D. Woodsd9be1832017-12-16 14:14:48 -06001/*
2 * Device Tree Source for OMAP34xx/OMAP35xx SoC
3 *
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11#include <dt-bindings/media/omap3-isp.h>
12
13#include "omap3.dtsi"
14
15/ {
16 cpus {
17 cpu: cpu@0 {
18 /* OMAP343x/OMAP35xx variants OPP1-5 */
19 operating-points = <
20 /* kHz uV */
21 125000 975000
22 250000 1075000
23 500000 1200000
24 550000 1270000
25 600000 1350000
26 >;
27 clock-latency = <300000>; /* From legacy driver */
28 };
29 };
30
31 ocp@68000000 {
32 omap3_pmx_core2: pinmux@480025d8 {
33 compatible = "ti,omap3-padconf", "pinctrl-single";
34 reg = <0x480025d8 0x24>;
35 #address-cells = <1>;
36 #size-cells = <0>;
37 #pinctrl-cells = <1>;
38 #interrupt-cells = <1>;
39 interrupt-controller;
40 pinctrl-single,register-width = <16>;
41 pinctrl-single,function-mask = <0xff1f>;
42 };
43
44 isp: isp@480bc000 {
45 compatible = "ti,omap3-isp";
46 reg = <0x480bc000 0x12fc
47 0x480bd800 0x017c>;
48 interrupts = <24>;
49 iommus = <&mmu_isp>;
50 syscon = <&scm_conf 0x6c>;
51 ti,phy-type = <OMAP3ISP_PHY_TYPE_COMPLEX_IO>;
52 #clock-cells = <1>;
53 ports {
54 #address-cells = <1>;
55 #size-cells = <0>;
56 };
57 };
58
59 bandgap: bandgap@48002524 {
60 reg = <0x48002524 0x4>;
61 compatible = "ti,omap34xx-bandgap";
62 #thermal-sensor-cells = <0>;
63 };
64 };
65
66 thermal_zones: thermal-zones {
67 #include "omap3-cpu-thermal.dtsi"
68 };
69};
70
71&ssi {
72 status = "ok";
73
74 clocks = <&ssi_ssr_fck>,
75 <&ssi_sst_fck>,
76 <&ssi_ick>;
77 clock-names = "ssi_ssr_fck",
78 "ssi_sst_fck",
79 "ssi_ick";
80};
81
82/include/ "omap34xx-omap36xx-clocks.dtsi"
83/include/ "omap36xx-omap3430es2plus-clocks.dtsi"
84/include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi"