| Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| Tom Warren | efc05ae | 2011-01-27 10:58:07 +0000 | [diff] [blame] | 2 | /* |
| Stephen Warren | f3d9330 | 2012-05-21 10:04:27 +0000 | [diff] [blame] | 3 | * (C) Copyright 2010-2012 |
| Tom Warren | efc05ae | 2011-01-27 10:58:07 +0000 | [diff] [blame] | 4 | * NVIDIA Corporation <www.nvidia.com> |
| Tom Warren | efc05ae | 2011-01-27 10:58:07 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef __CONFIG_H |
| 8 | #define __CONFIG_H |
| 9 | |
| Alexey Brodkin | 1ace402 | 2014-02-26 17:47:58 +0400 | [diff] [blame] | 10 | #include <linux/sizes.h> |
| Allen Martin | 00a2749 | 2012-08-31 08:30:00 +0000 | [diff] [blame] | 11 | #include "tegra20-common.h" |
| Tom Warren | efc05ae | 2011-01-27 10:58:07 +0000 | [diff] [blame] | 12 | |
| 13 | /* High-level configuration options */ |
| Tom Warren | 29f3e3f | 2012-09-04 17:00:24 -0700 | [diff] [blame] | 14 | #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Harmony" |
| Tom Warren | efc05ae | 2011-01-27 10:58:07 +0000 | [diff] [blame] | 15 | |
| 16 | /* Board-specific serial config */ |
| Tom Warren | 29f3e3f | 2012-09-04 17:00:24 -0700 | [diff] [blame] | 17 | #define CONFIG_TEGRA_ENABLE_UARTD |
| Tom Warren | efc05ae | 2011-01-27 10:58:07 +0000 | [diff] [blame] | 18 | |
| 19 | /* UARTD: keyboard satellite board UART, default */ |
| 20 | #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE |
| Tom Warren | 29f3e3f | 2012-09-04 17:00:24 -0700 | [diff] [blame] | 21 | #ifdef CONFIG_TEGRA_ENABLE_UARTA |
| Tom Warren | efc05ae | 2011-01-27 10:58:07 +0000 | [diff] [blame] | 22 | /* UARTA: debug board UART */ |
| 23 | #define CONFIG_SYS_NS16550_COM2 NV_PA_APB_UARTA_BASE |
| 24 | #endif |
| 25 | |
| 26 | #define CONFIG_MACH_TYPE MACH_TYPE_HARMONY |
| Tom Warren | efc05ae | 2011-01-27 10:58:07 +0000 | [diff] [blame] | 27 | |
| Stephen Warren | 9614a1e | 2012-07-30 07:37:52 +0000 | [diff] [blame] | 28 | /* NAND support */ |
| Stephen Warren | 9614a1e | 2012-07-30 07:37:52 +0000 | [diff] [blame] | 29 | #define CONFIG_TEGRA_NAND |
| 30 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| Stephen Warren | 9614a1e | 2012-07-30 07:37:52 +0000 | [diff] [blame] | 31 | |
| 32 | /* Environment in NAND (which is 512M), aligned to start of last sector */ |
| Stephen Warren | 9614a1e | 2012-07-30 07:37:52 +0000 | [diff] [blame] | 33 | #define CONFIG_ENV_OFFSET (SZ_512M - SZ_128K) /* 128K sector size */ |
| Stephen Warren | bea2674 | 2012-05-16 06:21:00 +0000 | [diff] [blame] | 34 | |
| Tom Warren | 29f3e3f | 2012-09-04 17:00:24 -0700 | [diff] [blame] | 35 | #include "tegra-common-post.h" |
| Stephen Warren | bea2674 | 2012-05-16 06:21:00 +0000 | [diff] [blame] | 36 | |
| Tom Warren | efc05ae | 2011-01-27 10:58:07 +0000 | [diff] [blame] | 37 | #endif /* __CONFIG_H */ |