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Marek Vasut10da95a2010-07-26 06:30:25 +02001/*
2 * Balloon3 configuration file
3 *
4 * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
5 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Marek Vasut10da95a2010-07-26 06:30:25 +02007 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
12/*
13 * High Level Board Configuration Options
14 */
Marek Vasutabc20ab2011-11-26 07:20:07 +010015#define CONFIG_CPU_PXA27X 1 /* Marvell PXA270 CPU */
Marcel Ziswiler44d6db62015-03-01 00:53:11 +010016#define CONFIG_BALLOON3 1 /* Balloon3 board */
Marek Vasut10da95a2010-07-26 06:30:25 +020017
18/*
19 * Environment settings
20 */
21#define CONFIG_ENV_OVERWRITE
22#define CONFIG_SYS_MALLOC_LEN (128*1024)
Marek Vasut20ae5192010-10-03 01:05:55 +020023#define CONFIG_ARCH_CPU_INIT
Marek Vasut10da95a2010-07-26 06:30:25 +020024#define CONFIG_BOOTCOMMAND \
Marek Vasut20ae5192010-10-03 01:05:55 +020025 "fpga load 0x0 0x50000 0x62638; " \
Marek Vasut10da95a2010-07-26 06:30:25 +020026 "if usb reset && fatload usb 0 0xa4000000 uImage; then " \
27 "bootm 0xa4000000; " \
28 "fi; " \
Marek Vasut20ae5192010-10-03 01:05:55 +020029 "bootm 0xd0000;"
Marek Vasut10da95a2010-07-26 06:30:25 +020030#define CONFIG_BOOTARGS "console=tty0 console=ttyS2,115200"
31#define CONFIG_TIMESTAMP
32#define CONFIG_BOOTDELAY 2 /* Autoboot delay */
33#define CONFIG_CMDLINE_TAG
34#define CONFIG_SETUP_MEMORY_TAGS
Marek Vasut20ae5192010-10-03 01:05:55 +020035#define CONFIG_SYS_TEXT_BASE 0x0
Marek Vasut10da95a2010-07-26 06:30:25 +020036#define CONFIG_LZMA /* LZMA compression support */
37
38/*
39 * Serial Console Configuration
40 */
41#define CONFIG_PXA_SERIAL
42#define CONFIG_STUART 1
Marek Vasutce6971c2012-09-12 12:36:25 +020043#define CONFIG_CONS_INDEX 2
Marek Vasut10da95a2010-07-26 06:30:25 +020044#define CONFIG_BAUDRATE 115200
Marek Vasut10da95a2010-07-26 06:30:25 +020045
46/*
47 * Bootloader Components Configuration
48 */
Marek Vasut10da95a2010-07-26 06:30:25 +020049#undef CONFIG_CMD_ENV
Marek Vasut10da95a2010-07-26 06:30:25 +020050#define CONFIG_CMD_USB
Siva Durga Prasad Paladugu64e809a2014-03-14 16:35:38 +053051#define CONFIG_CMD_FPGA_LOADMK
Marek Vasut10da95a2010-07-26 06:30:25 +020052#undef CONFIG_LCD
53
54/*
55 * KGDB
56 */
57#ifdef CONFIG_CMD_KGDB
58#define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port speed */
Marek Vasut10da95a2010-07-26 06:30:25 +020059#endif
60
61/*
62 * HUSH Shell Configuration
63 */
64#define CONFIG_SYS_HUSH_PARSER 1
Marek Vasut10da95a2010-07-26 06:30:25 +020065
66#define CONFIG_SYS_LONGHELP
Nikita Kiryanov181bd9d2015-08-03 12:36:58 +030067#undef CONFIG_SYS_PROMPT
Marek Vasut10da95a2010-07-26 06:30:25 +020068#ifdef CONFIG_SYS_HUSH_PARSER
69#define CONFIG_SYS_PROMPT "$ "
70#else
Marek Vasut10da95a2010-07-26 06:30:25 +020071#endif
72#define CONFIG_SYS_CBSIZE 256
73#define CONFIG_SYS_PBSIZE \
74 (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
75#define CONFIG_SYS_MAXARGS 16
76#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
77#define CONFIG_SYS_DEVICE_NULLDEV 1
78
79/*
80 * Clock Configuration
81 */
Marek Vasut10da95a2010-07-26 06:30:25 +020082#define CONFIG_SYS_CPUSPEED 0x290 /* 520MHz */
83
84/*
Marek Vasut10da95a2010-07-26 06:30:25 +020085 * DRAM Map
86 */
Marcel Ziswiler44d6db62015-03-01 00:53:11 +010087#define CONFIG_NR_DRAM_BANKS 3 /* 3 banks of DRAM */
Marek Vasut10da95a2010-07-26 06:30:25 +020088#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
89#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
90#define PHYS_SDRAM_2 0xb0000000 /* SDRAM Bank #2 */
91#define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */
Marcel Ziswiler44d6db62015-03-01 00:53:11 +010092#define PHYS_SDRAM_3 0x80000000 /* SDRAM Bank #3 */
Marek Vasut10da95a2010-07-26 06:30:25 +020093#define PHYS_SDRAM_3_SIZE 0x08000000 /* 128 MB */
94
95#define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */
96#define CONFIG_SYS_DRAM_SIZE 0x18000000 /* 384 MB DRAM */
97
98#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */
99#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
100
101#define CONFIG_SYS_LOAD_ADDR 0xa1000000
102
Marek Vasut6ef6eb92010-09-23 09:46:57 +0200103#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
Marek Vasut20ae5192010-10-03 01:05:55 +0200104#define CONFIG_SYS_INIT_SP_ADDR \
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200105 (PHYS_SDRAM_1 + GENERATED_GBL_DATA_SIZE + 2048)
Marek Vasut6ef6eb92010-09-23 09:46:57 +0200106
Marek Vasut10da95a2010-07-26 06:30:25 +0200107/*
108 * NOR FLASH
109 */
110#ifdef CONFIG_CMD_FLASH
111#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
112#define PHYS_FLASH_SIZE 0x00800000 /* 8 MB */
113#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
114
115#define CONFIG_SYS_FLASH_CFI
116#define CONFIG_FLASH_CFI_DRIVER 1
117#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
118
119#define CONFIG_SYS_MAX_FLASH_BANKS 1
120#define CONFIG_SYS_MAX_FLASH_SECT 256
121
122#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
123
Marek Vasutf90aea22013-11-04 20:50:21 +0100124#define CONFIG_SYS_FLASH_ERASE_TOUT 240000
125#define CONFIG_SYS_FLASH_WRITE_TOUT 240000
126#define CONFIG_SYS_FLASH_LOCK_TOUT 240000
127#define CONFIG_SYS_FLASH_UNLOCK_TOUT 240000
Marek Vasut10da95a2010-07-26 06:30:25 +0200128#define CONFIG_SYS_FLASH_PROTECTION
129#define CONFIG_ENV_IS_IN_FLASH
130#else
131#define CONFIG_SYS_NO_FLASH
Marcel Ziswiler50dea462015-03-01 00:53:12 +0100132#define CONFIG_ENV_IS_NOWHERE
Marek Vasut10da95a2010-07-26 06:30:25 +0200133#endif
134
135#define CONFIG_SYS_MONITOR_BASE 0x000000
136#define CONFIG_SYS_MONITOR_LEN 0x40000
137
138#define CONFIG_ENV_SIZE 0x2000
139#define CONFIG_ENV_ADDR 0x40000
140#define CONFIG_ENV_SECT_SIZE 0x10000
141
142/*
143 * GPIO settings
144 */
145#define CONFIG_SYS_GPSR0_VAL 0x307dc7fd
146#define CONFIG_SYS_GPSR1_VAL 0x03cffa4e
147#define CONFIG_SYS_GPSR2_VAL 0x7131c000
148#define CONFIG_SYS_GPSR3_VAL 0x01e1f3ff
149
150#define CONFIG_SYS_GPCR0_VAL 0x0
151#define CONFIG_SYS_GPCR1_VAL 0x0
152#define CONFIG_SYS_GPCR2_VAL 0x0
153#define CONFIG_SYS_GPCR3_VAL 0x0
154
155#define CONFIG_SYS_GPDR0_VAL 0xc0f98e02
156#define CONFIG_SYS_GPDR1_VAL 0xfcffa8b7
157#define CONFIG_SYS_GPDR2_VAL 0x22e3ffff
158#define CONFIG_SYS_GPDR3_VAL 0x000201fe
159
160#define CONFIG_SYS_GAFR0_L_VAL 0x96c00000
161#define CONFIG_SYS_GAFR0_U_VAL 0xa5e5459b
162#define CONFIG_SYS_GAFR1_L_VAL 0x699b759a
163#define CONFIG_SYS_GAFR1_U_VAL 0xaaa5a5aa
164#define CONFIG_SYS_GAFR2_L_VAL 0xaaaaaaaa
165#define CONFIG_SYS_GAFR2_U_VAL 0x01f9a6aa
166#define CONFIG_SYS_GAFR3_L_VAL 0x54510003
167#define CONFIG_SYS_GAFR3_U_VAL 0x00001599
168
169#define CONFIG_SYS_PSSR_VAL 0x30
170
171/*
172 * Clock settings
173 */
174#define CONFIG_SYS_CKEN 0xffffffff
175#define CONFIG_SYS_CCCR 0x00000290
176
177/*
178 * Memory settings
179 */
180#define CONFIG_SYS_MSC0_VAL 0x7ff07ff8
181#define CONFIG_SYS_MSC1_VAL 0x7ff07ff0
182#define CONFIG_SYS_MSC2_VAL 0x74a42491
183#define CONFIG_SYS_MDCNFG_VAL 0x89d309d3
184#define CONFIG_SYS_MDREFR_VAL 0x001d8018
185#define CONFIG_SYS_MDMRS_VAL 0x00220022
186#define CONFIG_SYS_FLYCNFG_VAL 0x00000000
187#define CONFIG_SYS_SXCNFG_VAL 0x00000000
Marek Vasut10da95a2010-07-26 06:30:25 +0200188
189/*
190 * PCMCIA and CF Interfaces
191 */
192#define CONFIG_SYS_MECR_VAL 0x00000000
193#define CONFIG_SYS_MCMEM0_VAL 0x00014307
194#define CONFIG_SYS_MCMEM1_VAL 0x00014307
195#define CONFIG_SYS_MCATT0_VAL 0x0001c787
196#define CONFIG_SYS_MCATT1_VAL 0x0001c787
197#define CONFIG_SYS_MCIO0_VAL 0x0001430f
198#define CONFIG_SYS_MCIO1_VAL 0x0001430f
199
200/*
201 * LCD
202 */
203#ifdef CONFIG_LCD
204#define CONFIG_BALLOON3LCD
205#define CONFIG_VIDEO_LOGO
206#define CONFIG_CMD_BMP
207#define CONFIG_SPLASH_SCREEN
208#define CONFIG_SPLASH_SCREEN_ALIGN
209#define CONFIG_VIDEO_BMP_GZIP
210#define CONFIG_VIDEO_BMP_RLE8
211#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20)
212#endif
213
214/*
215 * USB
216 */
217#ifdef CONFIG_CMD_USB
218#define CONFIG_USB_OHCI_NEW
219#define CONFIG_SYS_USB_OHCI_CPU_INIT
220#define CONFIG_SYS_USB_OHCI_BOARD_INIT
221#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
222#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x4C000000
223#define CONFIG_SYS_USB_OHCI_SLOT_NAME "balloon3"
224#define CONFIG_USB_STORAGE
225#define CONFIG_DOS_PARTITION
226#define CONFIG_CMD_FAT
227#define CONFIG_CMD_EXT2
228#endif
229
230/*
231 * FPGA
232 */
233#ifdef CONFIG_CMD_FPGA
234#define CONFIG_FPGA
235#define CONFIG_FPGA_XILINX
236#define CONFIG_FPGA_SPARTAN3
237#define CONFIG_SYS_FPGA_PROG_FEEDBACK
238#define CONFIG_SYS_FPGA_WAIT 1000
239#define CONFIG_MAX_FPGA_DEVICES 1
240#endif
241
242#endif /* __CONFIG_H */