blob: f34a54f754093a9be58865269cd7caebf47de24e [file] [log] [blame]
Ilya Yanok0d19f6c2009-02-10 00:22:31 +01001/*
2 * Copyright (C) 2009, Ilya Yanok, Emcraft Systems, <yanok@emcraft.com>
3 *
4 * Configuration settings for the Dave/DENX QongEVB-LITE board.
5 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +02006 * SPDX-License-Identifier: GPL-2.0+
Ilya Yanok0d19f6c2009-02-10 00:22:31 +01007 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
Stefano Babic86271112011-03-14 15:43:56 +010012#include <asm/arch/imx-regs.h>
Ilya Yanok0d19f6c2009-02-10 00:22:31 +010013
Stefano Babic22a9ea92011-06-09 16:43:26 +020014/* High Level Configuration Options */
Masahiro Yamada3fd968e2014-11-06 14:59:37 +090015#define CONFIG_MX31 /* This is a mx31 */
Fabio Estevam8a508e32011-10-21 07:03:54 +000016#define CONFIG_QONG
Ilya Yanok0d19f6c2009-02-10 00:22:31 +010017
18#define CONFIG_DISPLAY_CPUINFO
19#define CONFIG_DISPLAY_BOARDINFO
20
Stefano Babic22a9ea92011-06-09 16:43:26 +020021#define CONFIG_SYS_TEXT_BASE 0xa0000000
22
Fabio Estevam8a508e32011-10-21 07:03:54 +000023#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
24#define CONFIG_SETUP_MEMORY_TAGS
25#define CONFIG_INITRD_TAG
Ilya Yanok0d19f6c2009-02-10 00:22:31 +010026
27/*
28 * Size of malloc() pool
29 */
Wolfgang Denk544aa662011-10-25 09:48:16 +000030#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1536 * 1024)
Ilya Yanok0d19f6c2009-02-10 00:22:31 +010031
32/*
33 * Hardware drivers
34 */
35
Stefano Babic40f6fff2011-11-22 15:22:39 +010036#define CONFIG_MXC_UART
37#define CONFIG_MXC_UART_BASE UART1_BASE
Ilya Yanok0d19f6c2009-02-10 00:22:31 +010038
Stefano Babicc4ea1422010-07-06 17:05:06 +020039#define CONFIG_MXC_GPIO
Stefano Babic8640c982011-02-02 00:49:37 +000040#define CONFIG_HW_WATCHDOG
Troy Kiskyabbab702012-10-22 15:19:01 +000041#define CONFIG_IMX_WATCHDOG
Stefano Babic45997e02010-03-29 16:43:39 +020042
Stefano Babice98ecd72010-04-16 17:13:54 +020043#define CONFIG_MXC_SPI
44#define CONFIG_DEFAULT_SPI_BUS 1
Stefano Babic9f481e92010-08-23 20:41:19 +020045#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
Fabio Estevam4e8b7542011-10-24 06:44:15 +000046#define CONFIG_RTC_MC13XXX
Stefano Babice98ecd72010-04-16 17:13:54 +020047
Ɓukasz Majewskibe3b51a2012-11-13 03:22:14 +000048#define CONFIG_POWER
49#define CONFIG_POWER_SPI
50#define CONFIG_POWER_FSL
Stefano Babice98ecd72010-04-16 17:13:54 +020051#define CONFIG_FSL_PMIC_BUS 1
52#define CONFIG_FSL_PMIC_CS 0
53#define CONFIG_FSL_PMIC_CLK 100000
Stefano Babic9f481e92010-08-23 20:41:19 +020054#define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH)
Stefano Babicf33bd082011-10-06 11:23:33 +020055#define CONFIG_FSL_PMIC_BITLEN 32
Stefano Babice98ecd72010-04-16 17:13:54 +020056
Ilya Yanok0d19f6c2009-02-10 00:22:31 +010057/* FPGA */
Stefano Babicb9eb3fd2010-06-29 11:48:24 +020058#define CONFIG_FPGA
Fabio Estevam8a508e32011-10-21 07:03:54 +000059#define CONFIG_QONG_FPGA
Ilya Yanok0d19f6c2009-02-10 00:22:31 +010060#define CONFIG_FPGA_BASE (CS1_BASE)
Stefano Babicb9eb3fd2010-06-29 11:48:24 +020061#define CONFIG_FPGA_LATTICE
62#define CONFIG_FPGA_COUNT 1
Ilya Yanok0d19f6c2009-02-10 00:22:31 +010063
64#ifdef CONFIG_QONG_FPGA
65/* Ethernet */
Fabio Estevam8a508e32011-10-21 07:03:54 +000066#define CONFIG_DNET
Ilya Yanok0d19f6c2009-02-10 00:22:31 +010067#define CONFIG_DNET_BASE (CS1_BASE + QONG_FPGA_PERIPH_SIZE)
Ilya Yanok0d19f6c2009-02-10 00:22:31 +010068
Stefano Babic7c8cf0d2010-04-21 09:56:31 +020069/* Framebuffer and LCD */
Helmut Raiger62a22dc2011-10-12 23:16:29 +000070#define CONFIG_VIDEO
71#define CONFIG_CFB_CONSOLE
Stefano Babic7c8cf0d2010-04-21 09:56:31 +020072#define CONFIG_VIDEO_MX3
Helmut Raiger62a22dc2011-10-12 23:16:29 +000073#define CONFIG_VIDEO_LOGO
74#define CONFIG_VIDEO_SW_CURSOR
75#define CONFIG_VGA_AS_SINGLE_DEVICE
Stefano Babic7c8cf0d2010-04-21 09:56:31 +020076#define CONFIG_SYS_CONSOLE_IS_IN_ENV
Helmut Raiger62a22dc2011-10-12 23:16:29 +000077#define CONFIG_SPLASH_SCREEN
Stefano Babic7c8cf0d2010-04-21 09:56:31 +020078#define CONFIG_CMD_BMP
79#define CONFIG_BMP_16BPP
Wolfgang Denk544aa662011-10-25 09:48:16 +000080#define CONFIG_VIDEO_BMP_GZIP
81#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (512 << 10)
Stefano Babic7c8cf0d2010-04-21 09:56:31 +020082
Stefano Babicd7dc4642010-10-05 14:05:11 +020083/* USB */
84#define CONFIG_CMD_USB
85#ifdef CONFIG_CMD_USB
86#define CONFIG_USB_EHCI /* Enable EHCI USB support */
87#define CONFIG_USB_EHCI_MXC
88#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
89#define CONFIG_MXC_USB_PORT 2
90#define CONFIG_MXC_USB_PORTSC (MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT)
91#define CONFIG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED
92#define CONFIG_EHCI_IS_TDI
93#define CONFIG_USB_STORAGE
94#define CONFIG_DOS_PARTITION
95#define CONFIG_SUPPORT_VFAT
Wolfgang Denkb952c242010-10-19 11:10:06 +020096#define CONFIG_CMD_EXT2
Stefano Babicd7dc4642010-10-05 14:05:11 +020097#define CONFIG_CMD_FAT
98#endif /* CONFIG_CMD_USB */
99
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100100/*
101 * Reducing the ARP timeout from default 5 seconds to 200ms we speed up the
102 * initial TFTP transfer, should the user wish one, significantly.
103 */
104#define CONFIG_ARP_TIMEOUT 200UL
105
106#endif /* CONFIG_QONG_FPGA */
107
108#define CONFIG_CONS_INDEX 1
109#define CONFIG_BAUDRATE 115200
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100110
111/***********************************************************
112 * Command definition
113 ***********************************************************/
Heiko Schocher7e4a9e62010-09-17 13:10:32 +0200114#define CONFIG_CMD_CACHE
Wolfgang Denkb952c242010-10-19 11:10:06 +0200115#define CONFIG_CMD_DATE
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100116#define CONFIG_CMD_DHCP
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100117#define CONFIG_CMD_MII
Stefano Babic45997e02010-03-29 16:43:39 +0200118#define CONFIG_CMD_NAND
Wolfgang Denkb952c242010-10-19 11:10:06 +0200119#define CONFIG_CMD_PING
Stefano Babice98ecd72010-04-16 17:13:54 +0200120#define CONFIG_CMD_SPI
Wolfgang Denk544aa662011-10-25 09:48:16 +0000121#define CONFIG_CMD_UNZIP
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100122
Helmut Raiger9660e442011-10-20 04:19:47 +0000123#define CONFIG_BOARD_LATE_INIT
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100124
125#define CONFIG_BOOTDELAY 5
126
127#define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
128
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100129#define CONFIG_EXTRA_ENV_SETTINGS \
130 "netdev=eth0\0" \
131 "nfsargs=setenv bootargs root=/dev/nfs rw " \
132 "nfsroot=${serverip}:${rootpath}\0" \
133 "ramargs=setenv bootargs root=/dev/ram rw\0" \
134 "addip=setenv bootargs ${bootargs} " \
135 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
136 ":${hostname}:${netdev}:off panic=1\0" \
137 "addtty=setenv bootargs ${bootargs}" \
138 " console=ttymxc0,${baudrate}\0" \
Ilya Yanokb4e85d02009-02-05 04:08:20 +0100139 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100140 "addmisc=setenv bootargs ${bootargs}\0" \
Wolfgang Denk8a1cdaa2010-04-28 12:54:43 +0200141 "uboot_addr=A0000000\0" \
Wolfgang Denkb952c242010-10-19 11:10:06 +0200142 "kernel_addr=A00C0000\0" \
Wolfgang Denk8a1cdaa2010-04-28 12:54:43 +0200143 "ramdisk_addr=A0300000\0" \
Ilya Yanokb4e85d02009-02-05 04:08:20 +0100144 "u-boot=qong/u-boot.bin\0" \
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100145 "kernel_addr_r=80800000\0" \
146 "hostname=qong\0" \
147 "bootfile=qong/uImage\0" \
148 "rootpath=/opt/eldk-4.2-arm/armVFP\0" \
Ilya Yanokb4e85d02009-02-05 04:08:20 +0100149 "flash_self=run ramargs addip addtty addmtd addmisc;" \
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100150 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
Ilya Yanokb4e85d02009-02-05 04:08:20 +0100151 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100152 "bootm ${kernel_addr}\0" \
153 "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \
Ilya Yanokb4e85d02009-02-05 04:08:20 +0100154 "run nfsargs addip addtty addmtd addmisc;" \
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100155 "bootm\0" \
Ilya Yanokb4e85d02009-02-05 04:08:20 +0100156 "bootcmd=run flash_self\0" \
157 "load=tftp ${loadaddr} ${u-boot}\0" \
Marek Vasut93ea89f2012-09-23 17:41:23 +0200158 "update=protect off " __stringify(CONFIG_SYS_MONITOR_BASE) \
159 " +${filesize};era " __stringify(CONFIG_SYS_MONITOR_BASE)\
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100160 " +${filesize};cp.b ${fileaddr} " \
Marek Vasut93ea89f2012-09-23 17:41:23 +0200161 __stringify(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0" \
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100162 "upd=run load update\0" \
Helmut Raiger62a22dc2011-10-12 23:16:29 +0000163 "videomode=video=ctfb:x:640,y:480,depth:16,mode:0,pclk:40000," \
164 "le:120,ri:40,up:35,lo:10,hs:30,vs:3,sync:100663296," \
165 "vmode:0\0" \
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100166
167/*
168 * Miscellaneous configurable options
169 */
170#define CONFIG_SYS_LONGHELP /* undef to save memory */
Ilya Yanokb4e85d02009-02-05 04:08:20 +0100171#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100172/* Print Buffer Size */
173#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
174 sizeof(CONFIG_SYS_PROMPT) + 16)
175#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
176/* Boot Argument Buffer Size */
177#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
178
179/* memtest works on first 255MB of RAM */
180#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
181#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0xff000000)
182
183#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
184
Fabio Estevam8a508e32011-10-21 07:03:54 +0000185#define CONFIG_CMDLINE_EDITING
186#define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100187
Fabio Estevam8a508e32011-10-21 07:03:54 +0000188#define CONFIG_MISC_INIT_R
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100189
190/*-----------------------------------------------------------------------
191 * Physical Memory Map
192 */
193#define CONFIG_NR_DRAM_BANKS 1
194#define PHYS_SDRAM_1 CSD0_BASE
195#define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */
196
Stefano Babic45997e02010-03-29 16:43:39 +0200197/*
198 * NAND driver
199 */
200
201#ifndef __ASSEMBLY__
202extern void qong_nand_plat_init(void *chip);
203extern int qong_nand_rdy(void *chip);
204#endif
205#define CONFIG_NAND_PLAT
206#define CONFIG_SYS_MAX_NAND_DEVICE 1
207#define CONFIG_SYS_NAND_BASE CS3_BASE
208#define NAND_PLAT_INIT() qong_nand_plat_init(nand)
209
210#define QONG_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 24))
211#define QONG_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 23))
212#define QONG_NAND_WRITE(addr, cmd) \
213 do { \
214 __REG8(addr) = cmd; \
215 } while (0)
216
217#define NAND_PLAT_WRITE_CMD(chip, cmd) QONG_NAND_WRITE(QONG_NAND_CLE(chip), cmd)
218#define NAND_PLAT_WRITE_ADR(chip, cmd) QONG_NAND_WRITE(QONG_NAND_ALE(chip), cmd)
219#define NAND_PLAT_DEV_READY(chip) (qong_nand_rdy(chip))
220
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100221/*-----------------------------------------------------------------------
222 * FLASH and environment organization
223 */
224#define CONFIG_SYS_FLASH_BASE CS0_BASE
225#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
226/* max number of sectors on one chip */
227#define CONFIG_SYS_MAX_FLASH_SECT 1024
228/* Monitor at beginning of flash */
229#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
230#define CONFIG_SYS_MONITOR_LEN 0x40000 /* Reserve 256KiB */
231
Fabio Estevam8a508e32011-10-21 07:03:54 +0000232#define CONFIG_ENV_IS_IN_FLASH
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100233#define CONFIG_ENV_SECT_SIZE 0x20000
234#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
Stefano Babicd7dc4642010-10-05 14:05:11 +0200235#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x80000)
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100236
237/* Address and size of Redundant Environment Sector */
238#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
239#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
240
241/*-----------------------------------------------------------------------
242 * CFI FLASH driver setup
243 */
244/* Flash memory is CFI compliant */
Fabio Estevam8a508e32011-10-21 07:03:54 +0000245#define CONFIG_SYS_FLASH_CFI
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100246/* Use drivers/cfi_flash.c */
Fabio Estevam8a508e32011-10-21 07:03:54 +0000247#define CONFIG_FLASH_CFI_DRIVER
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100248/* Use buffered writes (~10x faster) */
Fabio Estevam8a508e32011-10-21 07:03:54 +0000249#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100250/* Use hardware sector protection */
Fabio Estevam8a508e32011-10-21 07:03:54 +0000251#define CONFIG_SYS_FLASH_PROTECTION
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100252
253/*
Stefano Babicc9d944d2010-04-08 17:23:52 +0200254 * Filesystem
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100255 */
Stefano Babicc9d944d2010-04-08 17:23:52 +0200256#define CONFIG_CMD_JFFS2
257#define CONFIG_CMD_UBI
258#define CONFIG_CMD_UBIFS
259#define CONFIG_RBTREE
260#define CONFIG_MTD_PARTITIONS
Stefan Roese68d7d652009-03-19 13:30:36 +0100261#define CONFIG_CMD_MTDPARTS
Stefano Babicc9d944d2010-04-08 17:23:52 +0200262#define CONFIG_LZO
Stefan Roese942556a2009-05-12 14:32:58 +0200263#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
264#define CONFIG_FLASH_CFI_MTD
Wolfgang Denkb952c242010-10-19 11:10:06 +0200265#define MTDIDS_DEFAULT "nor0=physmap-flash.0," \
266 "nand0=gen_nand"
Ilya Yanokb4e85d02009-02-05 04:08:20 +0100267#define MTDPARTS_DEFAULT \
Wolfgang Denkb952c242010-10-19 11:10:06 +0200268 "mtdparts=physmap-flash.0:" \
269 "512k(U-Boot),128k(env1),128k(env2)," \
270 "2304k(kernel),13m(ramdisk),-(user);" \
271 "gen_nand:" \
272 "128m(nand)"
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100273
Heiko Schochera784c012010-09-22 14:06:33 +0200274/* additions for new relocation code, must be added to all boards */
Heiko Schochere48b7c02010-09-17 13:10:40 +0200275#define CONFIG_SYS_SDRAM_BASE 0x80000000
276#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
Wolfgang Denk553f0982010-10-26 13:32:32 +0200277#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200278#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Heiko Schochere48b7c02010-09-17 13:10:40 +0200279#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)
280
Fabio Estevam8a508e32011-10-21 07:03:54 +0000281#define CONFIG_BOARD_EARLY_INIT_F
Heiko Schochere48b7c02010-09-17 13:10:40 +0200282
Ilya Yanok0d19f6c2009-02-10 00:22:31 +0100283#endif /* __CONFIG_H */