| Andre Przywara | e7bd15e | 2017-02-16 01:20:29 +0000 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_SUNXI=y |
| 3 | CONFIG_MACH_SUN50I_H5=y |
| Andre Przywara | e7bd15e | 2017-02-16 01:20:29 +0000 | [diff] [blame] | 4 | CONFIG_DRAM_CLK=672 |
| 5 | CONFIG_DRAM_ZQ=3881977 |
| Icenowy Zheng | a8df97d | 2017-07-04 18:43:11 +0800 | [diff] [blame] | 6 | CONFIG_MACPWR="PD6" |
| Andre Przywara | e7bd15e | 2017-02-16 01:20:29 +0000 | [diff] [blame] | 7 | CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-pc2" |
| 8 | # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set |
| Tom Rini | 2681e78 | 2017-05-01 11:41:11 -0400 | [diff] [blame] | 9 | CONFIG_SPL=y |
| Andre Przywara | e7bd15e | 2017-02-16 01:20:29 +0000 | [diff] [blame] | 10 | # CONFIG_CMD_FLASH is not set |
| 11 | # CONFIG_CMD_FPGA is not set |
| 12 | # CONFIG_SPL_DOS_PARTITION is not set |
| 13 | # CONFIG_SPL_ISO_PARTITION is not set |
| 14 | # CONFIG_SPL_EFI_PARTITION is not set |
| Tom Rini | 2681e78 | 2017-05-01 11:41:11 -0400 | [diff] [blame] | 15 | CONFIG_SPL_SPI_SUNXI=y |
| Andre Przywara | e7bd15e | 2017-02-16 01:20:29 +0000 | [diff] [blame] | 16 | CONFIG_SUN8I_EMAC=y |
| 17 | CONFIG_USB_EHCI_HCD=y |
| Tom Rini | ecad705 | 2017-08-25 17:50:26 -0400 | [diff] [blame] | 18 | CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y |