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Lunsheng Wangb0e32942005-07-29 10:20:29 -05001/*
2* Copyright (C) 2002,2003, Motorola Inc.
3* Xianghua Xiao <X.Xiao@motorola.com>
4*
5* See file CREDITS for list of people who contributed to this
6* project.
7*
8* This program is free software; you can redistribute it and/or
9* modify it under the terms of the GNU General Public License as
10* published by the Free Software Foundation; either version 2 of
11* the License, or (at your option) any later version.
12*
13* This program is distributed in the hope that it will be useful,
14* but WITHOUT ANY WARRANTY; without even the implied warranty of
15* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16* GNU General Public License for more details.
17*
18* You should have received a copy of the GNU General Public License
19* along with this program; if not, write to the Free Software
20* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21* MA 02111-1307 USA
22*/
23
24#include <ppc_asm.tmpl>
25#include <ppc_defs.h>
26#include <asm/cache.h>
27#include <asm/mmu.h>
28#include <config.h>
29#include <mpc85xx.h>
30
31#define entry_start \
32 mflr r1 ; \
33 bl 0f ;
34
35#define entry_end \
360: mflr r0 ; \
37 mtlr r1 ; \
38 blr ;
39
40/* TLB1 entries configuration: */
41
42 .section .bootpg, "ax"
43 .globl tlb1_entry
44tlb1_entry:
45 entry_start
46
47 .long 0x0a /* the following data table uses a few of 16 TLB entries */
48
Kumar Gala2146cf52007-12-19 01:18:15 -060049 .long FSL_BOOKE_MAS0(1,1,0)
50 .long FSL_BOOKE_MAS1(1,1,0,0,BOOKE_PAGESZ_1M)
51 .long FSL_BOOKE_MAS2(CFG_CCSRBAR,(MAS2_I|MAS2_G))
52 .long FSL_BOOKE_MAS3(CFG_CCSRBAR,0,(MAS3_SX|MAS3_SW|MAS3_SR))
Lunsheng Wangb0e32942005-07-29 10:20:29 -050053
54 #if defined(CFG_FLASH_PORT_WIDTH_16)
Kumar Gala2146cf52007-12-19 01:18:15 -060055 .long FSL_BOOKE_MAS0(1,2,0)
56 .long FSL_BOOKE_MAS1(1,1,0,0,BOOKE_PAGESZ_4M)
57 .long FSL_BOOKE_MAS2(CFG_FLASH_BASE,(MAS2_I|MAS2_G))
58 .long FSL_BOOKE_MAS3(CFG_FLASH_BASE,0,(MAS3_SX|MAS3_SW|MAS3_SR))
Lunsheng Wangb0e32942005-07-29 10:20:29 -050059
Kumar Gala2146cf52007-12-19 01:18:15 -060060 .long FSL_BOOKE_MAS0(1,3,0)
61 .long FSL_BOOKE_MAS1(1,1,0,0,BOOKE_PAGESZ_4M)
62 .long FSL_BOOKE_MAS2(CFG_FLASH_BASE+0x400000,(MAS2_I|MAS2_G))
63 .long FSL_BOOKE_MAS3(CFG_FLASH_BASE+0x400000,0,(MAS3_SX|MAS3_SW|MAS3_SR))
Lunsheng Wangb0e32942005-07-29 10:20:29 -050064 #else
Kumar Gala2146cf52007-12-19 01:18:15 -060065 .long FSL_BOOKE_MAS0(1,2,0)
66 .long FSL_BOOKE_MAS1(1,1,0,0,BOOKE_PAGESZ_16M)
67 .long FSL_BOOKE_MAS2(CFG_FLASH_BASE,(MAS2_I|MAS2_G))
68 .long FSL_BOOKE_MAS3(CFG_FLASH_BASE,0,(MAS3_SX|MAS3_SW|MAS3_SR))
Lunsheng Wangb0e32942005-07-29 10:20:29 -050069
Kumar Gala2146cf52007-12-19 01:18:15 -060070 .long FSL_BOOKE_MAS0(1,3,0)
71 .long FSL_BOOKE_MAS1(0,0,0,0,BOOKE_PAGESZ_1M)
72 .long FSL_BOOKE_MAS2(0,0)
73 .long FSL_BOOKE_MAS3(0,0,(MAS3_SX|MAS3_SW|MAS3_SR))
Lunsheng Wangb0e32942005-07-29 10:20:29 -050074 #endif
75
76 #if !defined(CONFIG_SPD_EEPROM)
Kumar Gala2146cf52007-12-19 01:18:15 -060077 .long FSL_BOOKE_MAS0(1,4,0)
78 .long FSL_BOOKE_MAS1(1,1,0,0,BOOKE_PAGESZ_64M)
79 .long FSL_BOOKE_MAS2(CFG_DDR_SDRAM_BASE,0)
80 .long FSL_BOOKE_MAS3(CFG_DDR_SDRAM_BASE,0,(MAS3_SX|MAS3_SW|MAS3_SR))
Lunsheng Wangb0e32942005-07-29 10:20:29 -050081
Kumar Gala2146cf52007-12-19 01:18:15 -060082 .long FSL_BOOKE_MAS0(1,5,0)
83 .long FSL_BOOKE_MAS1(1,1,0,0,BOOKE_PAGESZ_64M)
84 .long FSL_BOOKE_MAS2(CFG_DDR_SDRAM_BASE+0x4000000,0)
85 .long FSL_BOOKE_MAS3(CFG_DDR_SDRAM_BASE+0x4000000,0,(MAS3_SX|MAS3_SW|MAS3_SR))
Lunsheng Wangb0e32942005-07-29 10:20:29 -050086 #else
Kumar Gala2146cf52007-12-19 01:18:15 -060087 .long FSL_BOOKE_MAS0(1,4,0)
88 .long FSL_BOOKE_MAS1(0,0,0,0,BOOKE_PAGESZ_1M)
89 .long FSL_BOOKE_MAS2(0,0)
90 .long FSL_BOOKE_MAS3(0,0,(MAS3_SX|MAS3_SW|MAS3_SR))
Lunsheng Wangb0e32942005-07-29 10:20:29 -050091
Kumar Gala2146cf52007-12-19 01:18:15 -060092 .long FSL_BOOKE_MAS0(1,5,0)
93 .long FSL_BOOKE_MAS1(0,0,0,0,BOOKE_PAGESZ_1M)
94 .long FSL_BOOKE_MAS2(0,0)
95 .long FSL_BOOKE_MAS3(0,0,(MAS3_SX|MAS3_SW|MAS3_SR))
Lunsheng Wangb0e32942005-07-29 10:20:29 -050096 #endif
97
Kumar Gala2146cf52007-12-19 01:18:15 -060098 .long FSL_BOOKE_MAS0(1,6,0)
99 .long FSL_BOOKE_MAS1(1,1,0,0,BOOKE_PAGESZ_64M)
Lunsheng Wangb0e32942005-07-29 10:20:29 -0500100 #if defined(CONFIG_RAM_AS_FLASH)
Kumar Gala2146cf52007-12-19 01:18:15 -0600101 .long FSL_BOOKE_MAS2(CFG_LBC_SDRAM_BASE,(MAS2_I|MAS2_G))
Lunsheng Wangb0e32942005-07-29 10:20:29 -0500102 #else
Kumar Gala2146cf52007-12-19 01:18:15 -0600103 .long FSL_BOOKE_MAS2(CFG_LBC_SDRAM_BASE,0)
Lunsheng Wangb0e32942005-07-29 10:20:29 -0500104 #endif
Kumar Gala2146cf52007-12-19 01:18:15 -0600105 .long FSL_BOOKE_MAS3(CFG_LBC_SDRAM_BASE,0,(MAS3_SX|MAS3_SW|MAS3_SR))
Lunsheng Wangb0e32942005-07-29 10:20:29 -0500106
Kumar Gala2146cf52007-12-19 01:18:15 -0600107 .long FSL_BOOKE_MAS0(1,7,0)
108 .long FSL_BOOKE_MAS1(1,1,0,0,BOOKE_PAGESZ_16K)
Lunsheng Wangb0e32942005-07-29 10:20:29 -0500109 #ifdef CONFIG_L2_INIT_RAM
Kumar Gala2146cf52007-12-19 01:18:15 -0600110 .long FSL_BOOKE_MAS2(CFG_INIT_RAM_ADDR,0,0,0,1,0,0,0,0)
Lunsheng Wangb0e32942005-07-29 10:20:29 -0500111 #else
Kumar Gala2146cf52007-12-19 01:18:15 -0600112 .long FSL_BOOKE_MAS2(CFG_INIT_RAM_ADDR,0)
Lunsheng Wangb0e32942005-07-29 10:20:29 -0500113 #endif
Kumar Gala2146cf52007-12-19 01:18:15 -0600114 .long FSL_BOOKE_MAS3(CFG_INIT_RAM_ADDR,0,(MAS3_SX|MAS3_SW|MAS3_SR))
Lunsheng Wangb0e32942005-07-29 10:20:29 -0500115
Kumar Gala2146cf52007-12-19 01:18:15 -0600116 .long FSL_BOOKE_MAS0(1,8,0)
117 .long FSL_BOOKE_MAS1(1,1,0,0,BOOKE_PAGESZ_256M)
Kumar Galac8c41d42008-01-16 10:04:42 -0600118 .long FSL_BOOKE_MAS2(CFG_PCI_MEM_PHYS,(MAS2_I|MAS2_G))
119 .long FSL_BOOKE_MAS3(CFG_PCI_MEM_PHYS,0,(MAS3_SX|MAS3_SW|MAS3_SR))
Lunsheng Wangb0e32942005-07-29 10:20:29 -0500120
Kumar Gala2146cf52007-12-19 01:18:15 -0600121 .long FSL_BOOKE_MAS0(1,9,0)
122 .long FSL_BOOKE_MAS1(1,1,0,0,BOOKE_PAGESZ_16K)
123 .long FSL_BOOKE_MAS2(CFG_BCSR,(MAS2_I|MAS2_G))
124 .long FSL_BOOKE_MAS3(CFG_BCSR,0,(MAS3_SX|MAS3_SW|MAS3_SR))
Lunsheng Wangb0e32942005-07-29 10:20:29 -0500125
126 #if (CFG_CCSRBAR_DEFAULT != CFG_CCSRBAR)
Kumar Gala2146cf52007-12-19 01:18:15 -0600127 .long FSL_BOOKE_MAS0(1,15,0)
128 .long FSL_BOOKE_MAS1(1,1,0,0,BOOKE_PAGESZ_1M)
129 .long FSL_BOOKE_MAS2(CFG_CCSRBAR_DEFAULT,(MAS2_I|MAS2_G))
130 .long FSL_BOOKE_MAS3(CFG_CCSRBAR_DEFAULT,0,(MAS3_SX|MAS3_SW|MAS3_SR))
Lunsheng Wangb0e32942005-07-29 10:20:29 -0500131 #else
Kumar Gala2146cf52007-12-19 01:18:15 -0600132 .long FSL_BOOKE_MAS0(1,15,0)
133 .long FSL_BOOKE_MAS1(0,0,0,0,BOOKE_PAGESZ_1M)
134 .long FSL_BOOKE_MAS2(0,0)
135 .long FSL_BOOKE_MAS3(0,0,(MAS3_SX|MAS3_SW|MAS3_SR))
Lunsheng Wangb0e32942005-07-29 10:20:29 -0500136 #endif
137 entry_end