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Masahiro Yamada5894ca02014-10-03 19:21:06 +09001/*
2 * UniPhier SBC (System Bus Controller) registers
3 *
Masahiro Yamadae8a92932016-08-10 16:08:49 +09004 * Copyright (C) 2011-2014 Panasonic Corporation
5 * Copyright (C) 2015-2016 Socionext Inc.
Masahiro Yamada5894ca02014-10-03 19:21:06 +09006 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10#ifndef ARCH_SBC_REGS_H
11#define ARCH_SBC_REGS_H
12
13#define SBBASE_BASE 0x58c00100
14#define SBBASE(x) (SBBASE_BASE + (x) * 0x10)
15
16#define SBBASE0 (SBBASE(0))
17#define SBBASE1 (SBBASE(1))
18#define SBBASE2 (SBBASE(2))
19#define SBBASE3 (SBBASE(3))
20#define SBBASE4 (SBBASE(4))
21#define SBBASE5 (SBBASE(5))
22#define SBBASE6 (SBBASE(6))
23#define SBBASE7 (SBBASE(7))
24
25#define SBBASE_BANK_ENABLE (0x00000001)
26
27#define SBCTRL_BASE 0x58c00200
28#define SBCTRL(x, y) (SBCTRL_BASE + (x) * 0x10 + (y) * 4)
29
30#define SBCTRL00 SBCTRL(0, 0)
31#define SBCTRL01 SBCTRL(0, 1)
32#define SBCTRL02 SBCTRL(0, 2)
33#define SBCTRL03 SBCTRL(0, 3)
34#define SBCTRL04 (SBCTRL_BASE + 0x100)
35
36#define SBCTRL10 SBCTRL(1, 0)
37#define SBCTRL11 SBCTRL(1, 1)
38#define SBCTRL12 SBCTRL(1, 2)
39#define SBCTRL13 SBCTRL(1, 3)
40#define SBCTRL14 (SBCTRL_BASE + 0x110)
41
42#define SBCTRL20 SBCTRL(2, 0)
43#define SBCTRL21 SBCTRL(2, 1)
44#define SBCTRL22 SBCTRL(2, 2)
45#define SBCTRL23 SBCTRL(2, 3)
46#define SBCTRL24 (SBCTRL_BASE + 0x120)
47
48#define SBCTRL30 SBCTRL(3, 0)
49#define SBCTRL31 SBCTRL(3, 1)
50#define SBCTRL32 SBCTRL(3, 2)
51#define SBCTRL33 SBCTRL(3, 3)
52#define SBCTRL34 (SBCTRL_BASE + 0x130)
53
54#define SBCTRL40 SBCTRL(4, 0)
55#define SBCTRL41 SBCTRL(4, 1)
56#define SBCTRL42 SBCTRL(4, 2)
57#define SBCTRL43 SBCTRL(4, 3)
58#define SBCTRL44 (SBCTRL_BASE + 0x140)
59
60#define SBCTRL50 SBCTRL(5, 0)
61#define SBCTRL51 SBCTRL(5, 1)
62#define SBCTRL52 SBCTRL(5, 2)
63#define SBCTRL53 SBCTRL(5, 3)
64#define SBCTRL54 (SBCTRL_BASE + 0x150)
65
66#define SBCTRL60 SBCTRL(6, 0)
67#define SBCTRL61 SBCTRL(6, 1)
68#define SBCTRL62 SBCTRL(6, 2)
69#define SBCTRL63 SBCTRL(6, 3)
70#define SBCTRL64 (SBCTRL_BASE + 0x160)
71
72#define SBCTRL70 SBCTRL(7, 0)
73#define SBCTRL71 SBCTRL(7, 1)
74#define SBCTRL72 SBCTRL(7, 2)
75#define SBCTRL73 SBCTRL(7, 3)
76#define SBCTRL74 (SBCTRL_BASE + 0x170)
77
Masahiro Yamada2661dfd2015-01-06 14:20:04 +090078#define PC0CTRL 0x598000c0
Masahiro Yamada5894ca02014-10-03 19:21:06 +090079
80#ifndef __ASSEMBLY__
Masahiro Yamadaf6e7f072015-05-29 17:30:00 +090081#include <linux/io.h>
Masahiro Yamada5894ca02014-10-03 19:21:06 +090082static inline int boot_is_swapped(void)
83{
84 return !(readl(SBBASE0) & SBBASE_BANK_ENABLE);
85}
86#endif
87
88#endif /* ARCH_SBC_REGS_H */