blob: fa9e406556031db0394c12cea1ddd700219d9d55 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Kumar Gala69018ce2008-01-17 08:25:45 -06002/*
3 * Copyright 2008 Freescale Semiconductor, Inc.
4 *
5 * (C) Copyright 2000
6 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
Kumar Gala69018ce2008-01-17 08:25:45 -06007 */
8
Simon Glass401d1c42020-10-30 21:38:53 -06009#include <asm/global_data.h>
Masahiro Yamadab08c8c42018-03-05 01:20:11 +090010#include <linux/libfdt.h>
Kumar Gala69018ce2008-01-17 08:25:45 -060011#include <fdt_support.h>
Qianyu Gong2459afb2016-02-18 13:01:59 +080012#include <fsl_qe.h>
Kumar Gala69018ce2008-01-17 08:25:45 -060013
Zhao Qiang93d33202014-09-25 13:52:25 +080014#ifdef CONFIG_QE
Kumar Gala69018ce2008-01-17 08:25:45 -060015DECLARE_GLOBAL_DATA_PTR;
16
17/*
18 * If a QE firmware has been uploaded, then add the 'firmware' node under
19 * the 'qe' node.
20 */
21void fdt_fixup_qe_firmware(void *blob)
22{
23 struct qe_firmware_info *qe_fw_info;
24 int node, ret;
25
26 qe_fw_info = qe_get_firmware_info();
27 if (!qe_fw_info)
28 return;
29
30 node = fdt_path_offset(blob, "/qe");
31 if (node < 0)
32 return;
33
34 /* We assume the node doesn't exist yet */
35 node = fdt_add_subnode(blob, node, "firmware");
36 if (node < 0)
37 return;
38
39 ret = fdt_setprop(blob, node, "extended-modes",
40 &qe_fw_info->extended_modes, sizeof(u64));
41 if (ret < 0)
42 goto error;
43
44 ret = fdt_setprop_string(blob, node, "id", qe_fw_info->id);
45 if (ret < 0)
46 goto error;
47
48 ret = fdt_setprop(blob, node, "virtual-traps", qe_fw_info->vtraps,
49 sizeof(qe_fw_info->vtraps));
50 if (ret < 0)
51 goto error;
52
53 return;
54
55error:
56 fdt_del_node(blob, node);
57}
58
59void ft_qe_setup(void *blob)
60{
Kumar Gala69018ce2008-01-17 08:25:45 -060061 do_fixup_by_prop_u32(blob, "device_type", "qe", 4,
Simon Glass45bae2e2012-12-13 20:48:50 +000062 "bus-frequency", gd->arch.qe_clk, 1);
Kumar Gala69018ce2008-01-17 08:25:45 -060063 do_fixup_by_prop_u32(blob, "device_type", "qe", 4,
Simon Glass1206c182012-12-13 20:48:44 +000064 "brg-frequency", gd->arch.brg_clk, 1);
Kumar Gala69018ce2008-01-17 08:25:45 -060065 do_fixup_by_compat_u32(blob, "fsl,qe",
Simon Glass45bae2e2012-12-13 20:48:50 +000066 "clock-frequency", gd->arch.qe_clk, 1);
Kumar Gala69018ce2008-01-17 08:25:45 -060067 do_fixup_by_compat_u32(blob, "fsl,qe",
Simon Glass45bae2e2012-12-13 20:48:50 +000068 "bus-frequency", gd->arch.qe_clk, 1);
Kumar Gala69018ce2008-01-17 08:25:45 -060069 do_fixup_by_compat_u32(blob, "fsl,qe",
Simon Glass1206c182012-12-13 20:48:44 +000070 "brg-frequency", gd->arch.brg_clk, 1);
Anton Vorontsov3fca8032009-10-15 17:47:16 +040071 do_fixup_by_compat_u32(blob, "fsl,qe-gtm",
Simon Glass45bae2e2012-12-13 20:48:50 +000072 "clock-frequency", gd->arch.qe_clk / 2, 1);
Kumar Gala69018ce2008-01-17 08:25:45 -060073 fdt_fixup_qe_firmware(blob);
Kumar Gala69018ce2008-01-17 08:25:45 -060074}
Zhao Qiang93d33202014-09-25 13:52:25 +080075#endif