blob: bd412915e9514c6c4ea3eca2235937e4242f3795 [file] [log] [blame]
Simon Glass13bdce82017-05-31 17:57:23 -06001/dts-v1/;
2
3/ {
4 description = "U-Boot mainline";
5 #address-cells = <1>;
6
7 images {
Andre Przywara971a5412017-12-04 02:05:09 +00008 kernel {
Tristan Bastian407b5b92019-01-16 19:49:56 +01009 description = "U-Boot mainline ";
Simon Glass13bdce82017-05-31 17:57:23 -060010 type = "kernel_noload";
11 arch = "arm";
12 os = "linux";
13 data = /incbin/("../.././b/nyan-big/u-boot.bin");
14 compression = "none";
15 load = <0>;
16 entry = <0>;
Andre Przywara971a5412017-12-04 02:05:09 +000017 hash-2 {
Simon Glass13bdce82017-05-31 17:57:23 -060018 algo = "sha1";
19 };
20 };
21
Andre Przywara971a5412017-12-04 02:05:09 +000022 fdt-1{
Simon Glass13bdce82017-05-31 17:57:23 -060023 description = "tegra124-nyan-big.dtb";
24 data = /incbin/("../.././b/nyan-big/u-boot.dtb");
25 type = "flat_dt";
26 arch = "arm";
27 compression = "none";
Andre Przywara971a5412017-12-04 02:05:09 +000028 hash-1{
Simon Glass13bdce82017-05-31 17:57:23 -060029 algo = "sha1";
30 };
31 };
32 };
33
34 configurations {
Andre Przywara971a5412017-12-04 02:05:09 +000035 default = "config-1";
36 config-1 {
Simon Glass13bdce82017-05-31 17:57:23 -060037 description = "Boot U-Boot";
Andre Przywara971a5412017-12-04 02:05:09 +000038 kernel = "kernel";
39 fdt = "fdt-1";
Simon Glass13bdce82017-05-31 17:57:23 -060040 };
41 };
42};