blob: 820ec18b435550da1ee938378b6b39e34588b4c4 [file] [log] [blame]
Chris Packham4c97c4b2023-07-10 10:47:36 +12001// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
3/dts-v1/;
4
5#include <dt-bindings/gpio/gpio.h>
6#include <dt-bindings/interrupt-controller/irq.h>
7#include "ac5-98dx35xx.dtsi"
8
9/ {
10 model = "Allied Telesis x240";
11 compatible = "alliedtelesis,x240", "marvell,ac5x", "marvell,ac5";
12
13 aliases {
14 serial0 = &uart0;
15 spiflash0 = &spiflash0;
16 gpio0 = &gpio0;
17 gpio1 = &gpio1;
18 spi0 = &spi0;
Chris Packham10c937f2023-10-03 16:57:39 +130019 i2c0 = &i2c0;
Chris Packham4c97c4b2023-07-10 10:47:36 +120020 usb0 = &usb0;
21 pinctrl0 = &pinctrl0;
22 };
23
24 chosen {
25 stdout-path = "serial0:115200n8";
26 };
27
28 boot-board {
29 compatible = "atl,boot-board";
30 present-gpio = <&gpio1 6 GPIO_ACTIVE_HIGH>;
31 override-gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
32 };
33
34 gpio-leds {
35 compatible = "gpio-leds";
36
37 fault {
38 label = "fault:red";
39 gpios = <&system_gpio 11 GPIO_ACTIVE_LOW>;
40 default-state = "on";
41 };
42 };
43};
44
45&nand {
46 pinctrl-names = "default";
47 pinctrl-0 = <&nand_pins>;
48
49 nand-ecc-strength = <4>;
50 nand-ecc-step-size = <512>;
51 status = "okay";
52
53 partitions {
54 compatible = "fixed-partitions";
55 #address-cells = <1>;
56 #size-cells = <1>;
57
58 partition@user {
59 reg = <0x00000000 0x10000000>;
60 label = "user";
61 };
62 };
63};
64
65&uart0 {
66 status = "okay";
67};
68
69&usb0 {
70 status = "okay";
71};
72
Chris Packham10c937f2023-10-03 16:57:39 +130073&i2c0 {
74 status = "okay";
75
Chris Packham4c97c4b2023-07-10 10:47:36 +120076 mux@71 {
77 #address-cells = <1>;
78 #size-cells = <0>;
79 compatible = "nxp,pca9546";
80 reg = <0x71>;
81 i2c-mux-idle-disconnect;
82 reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; /* MPP36 */
83 status = "okay";
84
85 i2c@1 {
86 #address-cells = <1>;
87 #size-cells = <0>;
88 reg = <1>;
89
90 hwmon@2e {
91 compatible = "adi,adt7476";
92 reg = <0x2e>;
93 };
94
95 rtc@68 {
96 compatible = "adi,max31331";
97 reg = <0x68>;
98 };
99
100 system_gpio: gpio@27 {
101 compatible = "nxp,pca9555";
102 gpio-controller;
103 #gpio-cells= <2>;
104 reg = <0x27>;
105 interrupt-parent = <&gpio0>;
106 interrupts = <25 IRQ_TYPE_LEVEL_LOW>; /* MPP25 */
107 };
108 };
109 };
110};
111
112&spi0 {
113 status = "okay";
114 spiflash0: flash@0 {
115 compatible = "jedec,spi-nor";
116 spi-max-frequency = <50000000>;
117 spi-tx-bus-width = <1>; /* 1-single, 2-dual, 4-quad */
118 spi-rx-bus-width = <1>; /* 1-single, 2-dual, 4-quad */
119 reg = <0>;
120
121 #address-cells = <1>;
122 #size-cells = <1>;
123 };
124};
125
126&gpio0 {
127 phy-reset {
128 gpio-hog;
129 gpios = <19 GPIO_ACTIVE_LOW>;
130 output-high;
131 line-name = "phy-reset";
132 };
133
134 usb-en {
135 gpio-hog;
136 gpios = <28 GPIO_ACTIVE_HIGH>;
137 output-high;
138 line-name = "usb-en";
139 };
140
141 led-oe-n {
142 gpio-hog;
143 gpios = <23 GPIO_ACTIVE_LOW>;
144 output-low;
145 line-name = "led-oe-n";
146 };
147};
148
149&gpio1 {
150 nand-protect {
151 gpio-hog;
152 gpios = <8 GPIO_ACTIVE_LOW>;
153 output-low;
154 line-name = "nand-protect";
155 };
156};
157
158&pinctrl0 {
159 /*
160 * MPP Bus: MPP#
161 * NF_IO [0-7]
162 * NF_Wen [8]
163 * NF_ALE [9]
164 * NF_CLE [10]
165 * NF_Cen [11]
166 * QSPI_SCK/SPI0_SCK [12]
167 * QSPI_CSn/SPI0_CSn [13]
168 * QSPI_DIO[0]/SPI0_MOSI [14]
169 * QSPI_DIO[1]/SPI0_MISO [15]
170 * NF_Ren [16]
171 * NF_RBn [17]
172 * WD_INTn [18]
173 * B_B_OVRIDE_N [19]
174 * GREEN_SW_N [20]
175 * PHY_INT_N[0] [21]
176 * SPI_WPn [22]
177 * LED_OE_N [23]
178 * USB_PWR_FLT_N [24]
179 * SFP_INT_N [25]
Chris Packham10c937f2023-10-03 16:57:39 +1300180 * I2C0_SCL [26]
181 * I2C0_SDA [27]
Chris Packham4c97c4b2023-07-10 10:47:36 +1200182 * USB_EN [28]
183 * MONITOR_INT_N [29]
184 * XM1_MDC [30]
185 * XM1_MDIO [31]
186 * UA0_RXD [32]
187 * UA0_TXD [33]
188 * PHY_RST0n [34]
189 * TPM_INT_N [35]
190 * I2CMUX_RESET_N [36]
191 * SPI_SRAM_SEL_N [37]
192 * B_B_PRESENT [38]
193 * SPI_FLASH_SEL_N [39]
194 * NF_WP_N [40]
195 * POE_INT_N [41]
196 * PoE_RST_N [42]
197 * LED0_CLK [43]
198 * LED0_STB [44]
199 * LED0_DATA [45]
200 */
201 /* 0 1 2 3 4 5 6 7 8 9 */
202 pin-func = < 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
203 0xff 0xff 1 1 1 1 0xff 0xff 0 0
Chris Packham10c937f2023-10-03 16:57:39 +1300204 0 0 0 0 0 0 1 1 0 0
Chris Packham4c97c4b2023-07-10 10:47:36 +1200205 1 1 1 1 0 0 0 0 0 0
206 0 0 0 1 1 1 >;
207
208 nand_pins: nand-pins {
209 marvell,pins = <0 1 2 3 4 5 6 7 8 9 10 11 16 17>;
210 marvell,function = <2>;
211 };
Chris Packham4c97c4b2023-07-10 10:47:36 +1200212};