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wdenk7ebf7442002-11-02 23:17:16 +00001/*
2 * (C) Copyright 2002 ELTEC Elektronik AG
3 * Frank Gottschling <fgottschling@eltec.de>
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <command.h>
26#include <mpc106.h>
27#include <video_fb.h>
Ben Warren10efa022008-08-31 20:37:00 -070028#include <netdev.h>
wdenk7ebf7442002-11-02 23:17:16 +000029
Wolfgang Denkd87080b2006-03-31 18:32:53 +020030DECLARE_GLOBAL_DATA_PTR;
31
wdenk7ebf7442002-11-02 23:17:16 +000032/* ------------------------------------------------------------------------- */
33
34int checkboard (void)
35{
wdenk8bde7f72003-06-27 21:31:46 +000036 puts ("Board: ELTEC PowerPC\n");
37 return (0);
wdenk7ebf7442002-11-02 23:17:16 +000038}
39
40/* ------------------------------------------------------------------------- */
41
42int checkflash (void)
43{
wdenk8bde7f72003-06-27 21:31:46 +000044 /* TODO */
45 printf ("Test not implemented !\n");
46 return (0);
wdenk7ebf7442002-11-02 23:17:16 +000047}
48
49/* ------------------------------------------------------------------------- */
50
51static unsigned int mpc106_read_cfg_dword (unsigned int reg)
52{
wdenk8bde7f72003-06-27 21:31:46 +000053 unsigned int reg_addr = MPC106_REG | (reg & 0xFFFFFFFC);
wdenk7ebf7442002-11-02 23:17:16 +000054
wdenk8bde7f72003-06-27 21:31:46 +000055 out32r (MPC106_REG_ADDR, reg_addr);
wdenk7ebf7442002-11-02 23:17:16 +000056
wdenk8bde7f72003-06-27 21:31:46 +000057 return (in32r (MPC106_REG_DATA | (reg & 0x3)));
wdenk7ebf7442002-11-02 23:17:16 +000058}
59
60/* ------------------------------------------------------------------------- */
61
62long int dram_size (int board_type)
63{
wdenk8bde7f72003-06-27 21:31:46 +000064 /*
65 * No actual initialisation to do - done when setting up
66 * PICRs MCCRs ME/SARs etc in asm_init.S.
67 */
wdenk7ebf7442002-11-02 23:17:16 +000068
wdenk8bde7f72003-06-27 21:31:46 +000069 register unsigned long i, msar1, mear1, memSize;
wdenk7ebf7442002-11-02 23:17:16 +000070
71#if defined(CFG_MEMTEST)
wdenk8bde7f72003-06-27 21:31:46 +000072 register unsigned long reg;
wdenk7ebf7442002-11-02 23:17:16 +000073
wdenk8bde7f72003-06-27 21:31:46 +000074 printf ("Testing DRAM\n");
wdenk7ebf7442002-11-02 23:17:16 +000075
wdenk8bde7f72003-06-27 21:31:46 +000076 /* write each mem addr with it's address */
77 for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg += 4)
78 *reg = reg;
wdenk7ebf7442002-11-02 23:17:16 +000079
wdenk8bde7f72003-06-27 21:31:46 +000080 for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg += 4) {
81 if (*reg != reg)
82 return -1;
83 }
wdenk7ebf7442002-11-02 23:17:16 +000084#endif
85
wdenk8bde7f72003-06-27 21:31:46 +000086 /*
87 * Since MPC107 memory controller chip has already been set to
88 * control all memory, just read and interpret its memory boundery register.
89 */
90 memSize = 0;
91 msar1 = mpc106_read_cfg_dword (MPC106_MSAR1);
92 mear1 = mpc106_read_cfg_dword (MPC106_MEAR1);
93 i = mpc106_read_cfg_dword (MPC106_MBER) & 0xf;
wdenk7ebf7442002-11-02 23:17:16 +000094
wdenk8bde7f72003-06-27 21:31:46 +000095 do {
96 if (i & 0x01) /* is bank enabled ? */
97 memSize += (mear1 & 0xff) - (msar1 & 0xff) + 1;
98 msar1 >>= 8;
99 mear1 >>= 8;
100 i >>= 1;
101 } while (i);
wdenk7ebf7442002-11-02 23:17:16 +0000102
wdenk8bde7f72003-06-27 21:31:46 +0000103 return (memSize * 0x100000);
wdenk7ebf7442002-11-02 23:17:16 +0000104}
wdenk8bde7f72003-06-27 21:31:46 +0000105
wdenk7ebf7442002-11-02 23:17:16 +0000106/* ------------------------------------------------------------------------- */
107
Becky Bruce9973e3c2008-06-09 16:03:40 -0500108phys_size_t initdram (int board_type)
wdenk7ebf7442002-11-02 23:17:16 +0000109{
wdenk8bde7f72003-06-27 21:31:46 +0000110 return dram_size (board_type);
wdenk7ebf7442002-11-02 23:17:16 +0000111}
112
113/* ------------------------------------------------------------------------- */
114
115/*
116 * The BAB 911 can be reset by writing bit 0 of the Processor Initialization
117 * Register PI in the MPC 107 (at offset 0x41090 of the Embedded Utilities
118 * Memory Block).
119 */
wdenk8bde7f72003-06-27 21:31:46 +0000120int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
wdenk7ebf7442002-11-02 23:17:16 +0000121{
wdenk8bde7f72003-06-27 21:31:46 +0000122 out8 (MPC107_EUMB_PI, 1);
123 return (0);
wdenk7ebf7442002-11-02 23:17:16 +0000124}
125
126/* ------------------------------------------------------------------------- */
127
128#if defined(CONFIG_WATCHDOG)
129
130/*
131 * Since the 7xx CPUs don't have an internal watchdog, this function is
132 * board specific.
133 */
wdenk8bde7f72003-06-27 21:31:46 +0000134void watchdog_reset (void)
wdenk7ebf7442002-11-02 23:17:16 +0000135{
136}
wdenk8bde7f72003-06-27 21:31:46 +0000137#endif /* CONFIG_WATCHDOG */
wdenk7ebf7442002-11-02 23:17:16 +0000138
139/* ------------------------------------------------------------------------- */
140
141void after_reloc (ulong dest_addr)
142{
wdenk8bde7f72003-06-27 21:31:46 +0000143 /*
144 * Jump to the main U-Boot board init code
145 */
wdenk27b207f2003-07-24 23:38:38 +0000146 board_init_r ((gd_t *)gd, dest_addr);
wdenk7ebf7442002-11-02 23:17:16 +0000147}
148
149/* ------------------------------------------------------------------------- */
150
151#ifdef CONFIG_CONSOLE_EXTRA_INFO
152extern GraphicDevice smi;
153
154void video_get_info_str (int line_number, char *info)
155{
wdenk8bde7f72003-06-27 21:31:46 +0000156 /* init video info strings for graphic console */
157 switch (line_number) {
158 case 1:
159 sprintf (info, " MPC7xx V%d.%d at %d / %d MHz",
160 (get_pvr () >> 8) & 0xFF, get_pvr () & 0xFF, 400, 100);
161 return;
162 case 2:
163 sprintf (info, " ELTEC ELPPC with %ld MB DRAM and %ld MB FLASH",
164 dram_size (0) / 0x100000, flash_init () / 0x100000);
165 return;
166 case 3:
167 sprintf (info, " %s", smi.modeIdent);
168 return;
169 }
wdenk7ebf7442002-11-02 23:17:16 +0000170
wdenk8bde7f72003-06-27 21:31:46 +0000171 /* no more info lines */
172 *info = 0;
173 return;
wdenk7ebf7442002-11-02 23:17:16 +0000174}
175#endif
Ben Warren10efa022008-08-31 20:37:00 -0700176
177int board_eth_init(bd_t *bis)
178{
179 return pci_eth_init(bis);
180}