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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 10f670178cce29d7f078ca622f0eeafd6903748a / . / board / cogent / mb.c
blob: ff991cf20e2e3db5d2bb997c98acf39464bf689f [file] [log] [blame]
wdenk354bc6f2002-08-26 21:53:16 +0000[diff] [blame]1/*
2 * (C) Copyright 2000
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <board/cogent/dipsw.h>
26#include <board/cogent/lcd.h>
27#include <board/cogent/rtc.h>
28#include <board/cogent/par.h>
29#include <board/cogent/pci.h>
30
31/* ------------------------------------------------------------------------- */
32
33#if defined(CONFIG_8260)
34
35#include <ioports.h>
36
37/*
38 * I/O Port configuration table
39 *
40 * if conf is 1, then that port pin will be configured at boot time
41 * according to the five values podr/pdir/ppar/psor/pdat for that entry
42 */
43
44const iop_conf_t iop_conf_tab[4][32] = {
45
46 /* Port A configuration */
47 { /* conf ppar psor pdir podr pdat */
48 /* PA31 */ { 0, 0, 0, 0, 0, 0 },
49 /* PA30 */ { 0, 0, 0, 0, 0, 0 },
50 /* PA29 */ { 0, 0, 0, 0, 0, 0 },
51 /* PA28 */ { 0, 0, 0, 0, 0, 0 },
52 /* PA27 */ { 0, 0, 0, 0, 0, 0 },
53 /* PA26 */ { 0, 0, 0, 0, 0, 0 },
54 /* PA25 */ { 0, 0, 0, 0, 0, 0 },
55 /* PA24 */ { 0, 0, 0, 0, 0, 0 },
56 /* PA23 */ { 0, 0, 0, 0, 0, 0 },
57 /* PA22 */ { 0, 0, 0, 0, 0, 0 },
58 /* PA21 */ { 0, 0, 0, 0, 0, 0 },
59 /* PA20 */ { 0, 0, 0, 0, 0, 0 },
60 /* PA19 */ { 0, 0, 0, 0, 0, 0 },
61 /* PA18 */ { 0, 0, 0, 0, 0, 0 },
62 /* PA17 */ { 0, 0, 0, 0, 0, 0 },
63 /* PA16 */ { 0, 0, 0, 0, 0, 0 },
64 /* PA15 */ { 0, 0, 0, 0, 0, 0 },
65 /* PA14 */ { 0, 0, 0, 0, 0, 0 },
66 /* PA13 */ { 0, 0, 0, 0, 0, 0 },
67 /* PA12 */ { 0, 0, 0, 0, 0, 0 },
68 /* PA11 */ { 0, 0, 0, 0, 0, 0 },
69 /* PA10 */ { 0, 0, 0, 0, 0, 0 },
70 /* PA9 */ { 1, 1, 0, 1, 0, 0 }, /* SMC2 TXD */
71 /* PA8 */ { 1, 1, 0, 0, 0, 0 }, /* SMC2 RXD */
72 /* PA7 */ { 0, 0, 0, 0, 0, 0 },
73 /* PA6 */ { 0, 0, 0, 0, 0, 0 },
74 /* PA5 */ { 0, 0, 0, 0, 0, 0 },
75 /* PA4 */ { 0, 0, 0, 0, 0, 0 },
76 /* PA3 */ { 0, 0, 0, 0, 0, 0 },
77 /* PA2 */ { 0, 0, 0, 0, 0, 0 },
78 /* PA1 */ { 0, 0, 0, 0, 0, 0 },
79 /* PA0 */ { 0, 0, 0, 0, 0, 0 }
80 },
81
82
83 { /* conf ppar psor pdir podr pdat */
84 /* PB31 */ { 0, 0, 0, 0, 0, 0 },
85 /* PB30 */ { 0, 0, 0, 0, 0, 0 },
86 /* PB29 */ { 0, 0, 0, 0, 0, 0 },
87 /* PB28 */ { 0, 0, 0, 0, 0, 0 },
88 /* PB27 */ { 0, 0, 0, 0, 0, 0 },
89 /* PB26 */ { 0, 0, 0, 0, 0, 0 },
90 /* PB25 */ { 0, 0, 0, 0, 0, 0 },
91 /* PB24 */ { 0, 0, 0, 0, 0, 0 },
92 /* PB23 */ { 0, 0, 0, 0, 0, 0 },
93 /* PB22 */ { 0, 0, 0, 0, 0, 0 },
94 /* PB21 */ { 0, 0, 0, 0, 0, 0 },
95 /* PB20 */ { 0, 0, 0, 0, 0, 0 },
96 /* PB19 */ { 0, 0, 0, 0, 0, 0 },
97 /* PB18 */ { 0, 0, 0, 0, 0, 0 },
98 /* PB17 */ { 0, 0, 0, 0, 0, 0 },
99 /* PB16 */ { 0, 0, 0, 0, 0, 0 },
100 /* PB15 */ { 0, 0, 0, 0, 0, 0 },
101 /* PB14 */ { 0, 0, 0, 0, 0, 0 },
102 /* PB13 */ { 0, 0, 0, 0, 0, 0 },
103 /* PB12 */ { 0, 0, 0, 0, 0, 0 },
104 /* PB11 */ { 0, 0, 0, 0, 0, 0 },
105 /* PB10 */ { 0, 0, 0, 0, 0, 0 },
106 /* PB9 */ { 0, 0, 0, 0, 0, 0 },
107 /* PB8 */ { 0, 0, 0, 0, 0, 0 },
108 /* PB7 */ { 0, 0, 0, 0, 0, 0 },
109 /* PB6 */ { 0, 0, 0, 0, 0, 0 },
110 /* PB5 */ { 0, 0, 0, 0, 0, 0 },
111 /* PB4 */ { 0, 0, 0, 0, 0, 0 },
112 /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
113 /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
114 /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
115 /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
116 },
117
118
119 { /* conf ppar psor pdir podr pdat */
120 /* PC31 */ { 0, 0, 0, 0, 0, 0 },
121 /* PC30 */ { 0, 0, 0, 0, 0, 0 },
122 /* PC29 */ { 0, 0, 0, 0, 0, 0 },
123 /* PC28 */ { 0, 0, 0, 0, 0, 0 },
124 /* PC27 */ { 0, 0, 0, 0, 0, 0 },
125 /* PC26 */ { 0, 0, 0, 0, 0, 0 },
126 /* PC25 */ { 0, 0, 0, 0, 0, 0 },
127 /* PC24 */ { 0, 0, 0, 0, 0, 0 },
128 /* PC23 */ { 0, 0, 0, 0, 0, 0 },
129 /* PC22 */ { 0, 0, 0, 0, 0, 0 },
130 /* PC21 */ { 0, 0, 0, 0, 0, 0 },
131 /* PC20 */ { 0, 0, 0, 0, 0, 0 },
132 /* PC19 */ { 0, 0, 0, 0, 0, 0 },
133 /* PC18 */ { 0, 0, 0, 0, 0, 0 },
134 /* PC17 */ { 0, 0, 0, 0, 0, 0 },
135 /* PC16 */ { 0, 0, 0, 0, 0, 0 },
136 /* PC15 */ { 0, 0, 0, 0, 0, 0 },
137 /* PC14 */ { 0, 0, 0, 0, 0, 0 },
138 /* PC13 */ { 0, 0, 0, 0, 0, 0 },
139 /* PC12 */ { 0, 0, 0, 0, 0, 0 },
140 /* PC11 */ { 0, 0, 0, 0, 0, 0 },
141 /* PC10 */ { 0, 0, 0, 0, 0, 0 },
142 /* PC9 */ { 0, 0, 0, 0, 0, 0 },
143 /* PC8 */ { 0, 0, 0, 0, 0, 0 },
144 /* PC7 */ { 0, 0, 0, 0, 0, 0 },
145 /* PC6 */ { 0, 0, 0, 0, 0, 0 },
146 /* PC5 */ { 0, 0, 0, 0, 0, 0 },
147 /* PC4 */ { 0, 0, 0, 0, 0, 0 },
148 /* PC3 */ { 0, 0, 0, 0, 0, 0 },
149 /* PC2 */ { 0, 0, 0, 0, 0, 0 },
150 /* PC1 */ { 0, 0, 0, 0, 0, 0 },
151 /* PC0 */ { 0, 0, 0, 0, 0, 0 }
152 },
153
154
155 { /* conf ppar psor pdir podr pdat */
156 /* PD31 */ { 0, 0, 0, 0, 0, 0 },
157 /* PD30 */ { 0, 0, 0, 0, 0, 0 },
158 /* PD29 */ { 0, 0, 0, 0, 0, 0 },
159 /* PD28 */ { 0, 0, 0, 0, 0, 0 },
160 /* PD27 */ { 0, 0, 0, 0, 0, 0 },
161 /* PD26 */ { 0, 0, 0, 0, 0, 0 },
162 /* PD25 */ { 0, 0, 0, 0, 0, 0 },
163 /* PD24 */ { 0, 0, 0, 0, 0, 0 },
164 /* PD23 */ { 0, 0, 0, 0, 0, 0 },
165 /* PD22 */ { 0, 0, 0, 0, 0, 0 },
166 /* PD21 */ { 0, 0, 0, 0, 0, 0 },
167 /* PD20 */ { 0, 0, 0, 0, 0, 0 },
168 /* PD19 */ { 0, 0, 0, 0, 0, 0 },
169 /* PD18 */ { 0, 0, 0, 0, 0, 0 },
170 /* PD17 */ { 0, 0, 0, 0, 0, 0 },
171 /* PD16 */ { 0, 0, 0, 0, 0, 0 },
172 /* PD15 */ { 1, 1, 1, 0, 0, 0 }, /* I2C SDA */
173 /* PD14 */ { 1, 1, 1, 0, 0, 0 }, /* I2C SCL */
174 /* PD13 */ { 0, 0, 0, 0, 0, 0 },
175 /* PD12 */ { 0, 0, 0, 0, 0, 0 },
176 /* PD11 */ { 0, 0, 0, 0, 0, 0 },
177 /* PD10 */ { 0, 0, 0, 0, 0, 0 },
178 /* PD9 */ { 1, 1, 0, 1, 0, 0 }, /* SMC1 TXD */
179 /* PD8 */ { 1, 1, 0, 0, 0, 0 }, /* SMC1 RXD */
180 /* PD7 */ { 0, 0, 0, 0, 0, 0 },
181 /* PD6 */ { 0, 0, 0, 0, 0, 0 },
182 /* PD5 */ { 0, 0, 0, 0, 0, 0 },
183 /* PD4 */ { 0, 0, 0, 0, 0, 0 },
184 /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
185 /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
186 /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
187 /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
188 }
189};
190
191#endif /* CONFIG_8260 */
192
193/* ------------------------------------------------------------------------- */
194
195/*
196 * Check Board Identity:
197 */
198
199int
200checkboard(void)
201{
202 puts ("Board: Cogent " COGENT_MOTHERBOARD " motherboard with a "
203 COGENT_CPU_MODULE " CPU Module\n");
204 return (0);
205}
206
207/* ------------------------------------------------------------------------- */
208
209/*
210 * Miscelaneous platform dependent initialisations while still
211 * running in flash
212 */
213
214int misc_init_f (void)
215{
216 printf ("DIPSW: ");
217 dipsw_init();
218 return (0);
219}
220
221/* ------------------------------------------------------------------------- */
222
223long int
224initdram(int board_type)
225{
226#if CONFIG_CMA111
227 return (32L * 1024L * 1024L);
228#else
229 unsigned char dipsw_val;
230 int dual, size0, size1;
231 long int memsize;
232
233 dipsw_val = dipsw_cooked();
234
235 dual = dipsw_val & 0x01;
236 size0 = (dipsw_val & 0x08) >> 3;
237 size1 = (dipsw_val & 0x04) >> 2;
238
239 if (size0)
240 if (size1)
241 memsize = 16L * 1024L * 1024L;
242 else
243 memsize = 1L * 1024L * 1024L;
244 else
245 if (size1)
246 memsize = 4L * 1024L * 1024L;
247 else {
248 printf("[Illegal dip switch settings - assuming 16Mbyte SIMMs] ");
249 memsize = 16L * 1024L * 1024L; /* shouldn't happen - guess 16M */
250 }
251
252 if (dual)
253 memsize *= 2L;
254
255 return (memsize);
256#endif
257}
258
259/* ------------------------------------------------------------------------- */
260
261/*
262 * Miscelaneous platform dependent initialisations after monitor
263 * has been relocated into ram
264 */
265
266int misc_init_r (void)
267{
268 printf ("LCD: ");
269 lcd_init();
270
271#if 0
272 printf ("RTC: ");
273 rtc_init();
274
275 printf ("PAR: ");
276 par_init();
277
278 printf ("KBM: ");
279 kbm_init();
280
281 printf ("PCI: ");
282 pci_init();
283#endif
284 return (0);
285}