blob: bebd697a83bc13904c1405b963b819303c9e3e24 [file] [log] [blame]
wdenkfe8c2802002-11-03 00:38:21 +00001/*
2 * Memory Setup stuff - taken from blob memsetup.S
3 *
4 * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
5 * Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26
27
28#include <config.h>
29#include <version.h>
30
31
32/* some parameters for the board */
33
34MEM_BASE: .long 0xa0000000
35MEM_START: .long 0xc0000000
36
37#define MDCNFG 0x00
38#define MDCAS0 0x04
39#define MDCAS1 0x08
40#define MDCAS2 0x0c
41#define MSC0 0x10
42#define MSC1 0x14
43#define MECR 0x18
44
45mdcas0: .long 0xc71c703f
46mdcas1: .long 0xffc71c71
47mdcas2: .long 0xffffffff
48/* mdcnfg: .long 0x0bb2bcbf */
49mdcnfg: .long 0x0334b22f @ alt
50/* mcs0: .long 0xfff8fff8 */
51msc0: .long 0xad8c4888 @ alt
52mecr: .long 0x00060006
53/* mecr: .long 0x994a994a @ alt */
54
55/* setting up the memory */
56
57.globl memsetup
58memsetup:
59 ldr r0, MEM_BASE
60
61 /* Setup the flash memory */
62 ldr r1, msc0
63 str r1, [r0, #MSC0]
64
65 /* Set up the DRAM */
66
67 /* MDCAS0 */
68 ldr r1, mdcas0
69 str r1, [r0, #MDCAS0]
70
71 /* MDCAS1 */
72 ldr r1, mdcas1
73 str r1, [r0, #MDCAS1]
74
75 /* MDCAS2 */
76 ldr r1, mdcas2
77 str r1, [r0, #MDCAS2]
78
79 /* MDCNFG */
80 ldr r1, mdcnfg
81 str r1, [r0, #MDCNFG]
82
83 /* Set up PCMCIA space */
84 ldr r1, mecr
85 str r1, [r0, #MECR]
86
87 /* Load something to activate bank */
88 ldr r1, MEM_START
89
90.rept 8
91 ldr r0, [r1]
92.endr
93
94 /* everything is fine now */
95 mov pc, lr
96