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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
goda.yusukec2042f52008-01-25 20:46:36 +09002/*
3 * Configuation settings for the Renesas Solutions Migo-R board
4 *
5 * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
goda.yusukec2042f52008-01-25 20:46:36 +09006 */
7
8#ifndef __MIGO_R_H
9#define __MIGO_R_H
10
goda.yusukec2042f52008-01-25 20:46:36 +090011#define CONFIG_CPU_SH7722 1
goda.yusukec2042f52008-01-25 20:46:36 +090012
Vladimir Zapolskiy18a40e82016-11-28 00:15:30 +020013#define CONFIG_DISPLAY_BOARDINFO
goda.yusukec2042f52008-01-25 20:46:36 +090014#undef CONFIG_SHOW_BOOT_PROGRESS
15
16/* SMC9111 */
Ben Warren7194ab82009-10-04 22:37:03 -070017#define CONFIG_SMC91111
goda.yusukec2042f52008-01-25 20:46:36 +090018#define CONFIG_SMC91111_BASE (0xB0000000)
19
20/* MEMORY */
21#define MIGO_R_SDRAM_BASE (0x8C000000)
22#define MIGO_R_FLASH_BASE_1 (0xA0000000)
23#define MIGO_R_FLASH_BANK_SIZE (64 * 1024 * 1024)
24
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020025#define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020026#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */
goda.yusukec2042f52008-01-25 20:46:36 +090027
28/* SCIF */
goda.yusukec2042f52008-01-25 20:46:36 +090029#define CONFIG_CONS_SCIF0 1
goda.yusukec2042f52008-01-25 20:46:36 +090030
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020031#define CONFIG_SYS_MEMTEST_START (MIGO_R_SDRAM_BASE)
32#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
goda.yusukec2042f52008-01-25 20:46:36 +090033
34/* Enable alternate, more extensive, memory test */
goda.yusukec2042f52008-01-25 20:46:36 +090035/* Scratch address used by the alternate memory test */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020036#undef CONFIG_SYS_MEMTEST_SCRATCH
goda.yusukec2042f52008-01-25 20:46:36 +090037
38/* Enable temporary baudrate change while serial download */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020039#undef CONFIG_SYS_LOADS_BAUD_CHANGE
goda.yusukec2042f52008-01-25 20:46:36 +090040
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020041#define CONFIG_SYS_SDRAM_BASE (MIGO_R_SDRAM_BASE)
goda.yusukec2042f52008-01-25 20:46:36 +090042/* maybe more, but if so u-boot doesn't know about it... */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020043#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024)
goda.yusukec2042f52008-01-25 20:46:36 +090044/* default load address for scripts ?!? */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020045#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
goda.yusukec2042f52008-01-25 20:46:36 +090046
47/* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020048#define CONFIG_SYS_MONITOR_BASE (MIGO_R_FLASH_BASE_1)
goda.yusukec2042f52008-01-25 20:46:36 +090049/* Monitor size */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020050#define CONFIG_SYS_MONITOR_LEN (128 * 1024)
goda.yusukec2042f52008-01-25 20:46:36 +090051/* Size of DRAM reserved for malloc() use */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020052#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020053#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
goda.yusukec2042f52008-01-25 20:46:36 +090054
55/* FLASH */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020056#define CONFIG_SYS_FLASH_CFI
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +020057#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020058#undef CONFIG_SYS_FLASH_QUIET_TEST
goda.yusukec2042f52008-01-25 20:46:36 +090059/* print 'E' for empty sector on flinfo */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020060#define CONFIG_SYS_FLASH_EMPTY_INFO
goda.yusukec2042f52008-01-25 20:46:36 +090061/* Physical start address of Flash memory */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020062#define CONFIG_SYS_FLASH_BASE (MIGO_R_FLASH_BASE_1)
goda.yusukec2042f52008-01-25 20:46:36 +090063/* Max number of sectors on each Flash chip */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020064#define CONFIG_SYS_MAX_FLASH_SECT 512
goda.yusukec2042f52008-01-25 20:46:36 +090065
66/* if you use all NOR Flash , you change dip-switch. Please see MIGO_R01 Manual. */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020067#define CONFIG_SYS_MAX_FLASH_BANKS 1
68#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE + (0 * MIGO_R_FLASH_BANK_SIZE) }
goda.yusukec2042f52008-01-25 20:46:36 +090069
70/* Timeout for Flash erase operations (in ms) */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020071#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
goda.yusukec2042f52008-01-25 20:46:36 +090072/* Timeout for Flash write operations (in ms) */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020073#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
goda.yusukec2042f52008-01-25 20:46:36 +090074/* Timeout for Flash set sector lock bit operations (in ms) */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020075#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
goda.yusukec2042f52008-01-25 20:46:36 +090076/* Timeout for Flash clear lock bit operations (in ms) */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020077#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
goda.yusukec2042f52008-01-25 20:46:36 +090078
79/* Use hardware flash sectors protection instead of U-Boot software protection */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020080#undef CONFIG_SYS_FLASH_PROTECTION
81#undef CONFIG_SYS_DIRECT_FLASH_TFTP
goda.yusukec2042f52008-01-25 20:46:36 +090082
83/* ENV setting */
goda.yusukec2042f52008-01-25 20:46:36 +090084#define CONFIG_ENV_OVERWRITE 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +020085#define CONFIG_ENV_SECT_SIZE (128 * 1024)
86#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020087#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
88/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
89#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +020090#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
goda.yusukec2042f52008-01-25 20:46:36 +090091
92/* Board Clock */
93#define CONFIG_SYS_CLK_FREQ 33333333
Nobuhiro Iwamatsu684a5012013-08-21 16:11:21 +090094#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
95#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
Jean-Christophe PLAGNIOL-VILLARDbe45c632009-06-04 12:06:48 +020096#define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */
goda.yusukec2042f52008-01-25 20:46:36 +090097
98#endif /* __MIGO_R_H */