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Marian Balakowicz6e53e272006-03-14 15:59:25 +01001/*
2 * (C) Copyright 2001, 2002, 2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 * Keith Outwater, keith_outwater@mvis.com`
5 * Steven Scholz, steven.scholz@imc-berlin.de
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26/*
27 * Date & Time support (no alarms) for Dallas Semiconductor (now Maxim)
28 * DS1374 Real Time Clock (RTC).
29 *
30 * based on ds1337.c
31 */
32
33#include <common.h>
34#include <command.h>
35#include <rtc.h>
36#include <i2c.h>
37
Michal Simek871c18d2008-07-14 19:45:37 +020038#if defined(CONFIG_CMD_DATE)
Marian Balakowicz6e53e272006-03-14 15:59:25 +010039
40/*---------------------------------------------------------------------*/
41#undef DEBUG_RTC
42#define DEBUG_RTC
43
44#ifdef DEBUG_RTC
45#define DEBUGR(fmt,args...) printf(fmt ,##args)
46#else
47#define DEBUGR(fmt,args...)
48#endif
49/*---------------------------------------------------------------------*/
50
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020051#ifndef CONFIG_SYS_I2C_RTC_ADDR
52# define CONFIG_SYS_I2C_RTC_ADDR 0x68
Marian Balakowicz6e53e272006-03-14 15:59:25 +010053#endif
54
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020055#if defined(CONFIG_RTC_DS1374) && (CONFIG_SYS_I2C_SPEED > 400000)
Marian Balakowicz6e53e272006-03-14 15:59:25 +010056# error The DS1374 is specified up to 400kHz in fast mode!
57#endif
58
59/*
60 * RTC register addresses
61 */
62#define RTC_TOD_CNT_BYTE0_ADDR 0x00 /* TimeOfDay */
63#define RTC_TOD_CNT_BYTE1_ADDR 0x01
64#define RTC_TOD_CNT_BYTE2_ADDR 0x02
65#define RTC_TOD_CNT_BYTE3_ADDR 0x03
66
67#define RTC_WD_ALM_CNT_BYTE0_ADDR 0x04
68#define RTC_WD_ALM_CNT_BYTE1_ADDR 0x05
69#define RTC_WD_ALM_CNT_BYTE2_ADDR 0x06
70
71#define RTC_CTL_ADDR 0x07 /* RTC-CoNTrol-register */
72#define RTC_SR_ADDR 0x08 /* RTC-StatusRegister */
73#define RTC_TCS_DS_ADDR 0x09 /* RTC-TrickleChargeSelect DiodeSelect-register */
74
75#define RTC_CTL_BIT_AIE (1<<0) /* Bit 0 - Alarm Interrupt enable */
76#define RTC_CTL_BIT_RS1 (1<<1) /* Bit 1/2 - Rate Select square wave output */
77#define RTC_CTL_BIT_RS2 (1<<2) /* Bit 2/2 - Rate Select square wave output */
78#define RTC_CTL_BIT_WDSTR (1<<3) /* Bit 3 - Watchdog Reset Steering */
79#define RTC_CTL_BIT_BBSQW (1<<4) /* Bit 4 - Battery-Backed Square-Wave */
80#define RTC_CTL_BIT_WD_ALM (1<<5) /* Bit 5 - Watchdoc/Alarm Counter Select */
81#define RTC_CTL_BIT_WACE (1<<6) /* Bit 6 - Watchdog/Alarm Counter Enable WACE*/
82#define RTC_CTL_BIT_EN_OSC (1<<7) /* Bit 7 - Enable Oscilator */
83
84#define RTC_SR_BIT_AF 0x01 /* Bit 0 = Alarm Flag */
85#define RTC_SR_BIT_OSF 0x80 /* Bit 7 - Osc Stop Flag */
86
Marian Balakowicz6e53e272006-03-14 15:59:25 +010087const char RtcTodAddr[] = {
88 RTC_TOD_CNT_BYTE0_ADDR,
89 RTC_TOD_CNT_BYTE1_ADDR,
90 RTC_TOD_CNT_BYTE2_ADDR,
91 RTC_TOD_CNT_BYTE3_ADDR
92};
93
94static uchar rtc_read (uchar reg);
York Sun472d5462013-04-01 11:29:11 -070095static void rtc_write(uchar reg, uchar val, bool set);
Marian Balakowicz6e53e272006-03-14 15:59:25 +010096static void rtc_write_raw (uchar reg, uchar val);
97
98/*
99 * Get the current time from the RTC
100 */
Yuri Tikhonovb73a19e2008-03-20 17:56:04 +0300101int rtc_get (struct rtc_time *tm){
102 int rel = 0;
Marian Balakowicz6e53e272006-03-14 15:59:25 +0100103 unsigned long time1, time2;
104 unsigned int limit;
105 unsigned char tmp;
106 unsigned int i;
107
108 /*
109 * Since the reads are being performed one byte at a time,
Wolfgang Denkcf48eb92006-04-16 10:51:58 +0200110 * there is a chance that a carry will occur during the read.
Marian Balakowicz6e53e272006-03-14 15:59:25 +0100111 * To detect this, 2 reads are performed and compared.
112 */
113 limit = 10;
114 do {
115 i = 4;
116 time1 = 0;
117 while (i--) {
118 tmp = rtc_read(RtcTodAddr[i]);
119 time1 = (time1 << 8) | (tmp & 0xff);
120 }
121
122 i = 4;
123 time2 = 0;
124 while (i--) {
125 tmp = rtc_read(RtcTodAddr[i]);
126 time2 = (time2 << 8) | (tmp & 0xff);
127 }
128 } while ((time1 != time2) && limit--);
129
130 if (time1 != time2) {
131 printf("can't get consistent time from rtc chip\n");
Yuri Tikhonovb73a19e2008-03-20 17:56:04 +0300132 rel = -1;
Marian Balakowicz6e53e272006-03-14 15:59:25 +0100133 }
134
Kim Phillips4109df62008-07-10 14:00:15 -0500135 DEBUGR ("Get RTC s since 1.1.1970: %ld\n", time1);
Marian Balakowicz6e53e272006-03-14 15:59:25 +0100136
137 to_tm(time1, tm); /* To Gregorian Date */
138
Yuri Tikhonovb73a19e2008-03-20 17:56:04 +0300139 if (rtc_read(RTC_SR_ADDR) & RTC_SR_BIT_OSF) {
Marian Balakowicz6e53e272006-03-14 15:59:25 +0100140 printf ("### Warning: RTC oscillator has stopped\n");
Yuri Tikhonovb73a19e2008-03-20 17:56:04 +0300141 rel = -1;
142 }
Marian Balakowicz6e53e272006-03-14 15:59:25 +0100143
144 DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
145 tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
146 tm->tm_hour, tm->tm_min, tm->tm_sec);
Yuri Tikhonovb73a19e2008-03-20 17:56:04 +0300147
148 return rel;
Marian Balakowicz6e53e272006-03-14 15:59:25 +0100149}
150
151/*
152 * Set the RTC
153 */
Jean-Christophe PLAGNIOL-VILLARDd1e23192008-09-01 23:06:23 +0200154int rtc_set (struct rtc_time *tmp){
Marian Balakowicz6e53e272006-03-14 15:59:25 +0100155
156 unsigned long time;
157 unsigned i;
158
159 DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
160 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
161 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
162
163 if (tmp->tm_year < 1970 || tmp->tm_year > 2069)
164 printf("WARNING: year should be between 1970 and 2069!\n");
165
166 time = mktime(tmp->tm_year, tmp->tm_mon,
167 tmp->tm_mday, tmp->tm_hour,
168 tmp->tm_min, tmp->tm_sec);
169
Kim Phillips4109df62008-07-10 14:00:15 -0500170 DEBUGR ("Set RTC s since 1.1.1970: %ld (0x%02lx)\n", time, time);
Marian Balakowicz6e53e272006-03-14 15:59:25 +0100171
172 /* write to RTC_TOD_CNT_BYTEn_ADDR */
173 for (i = 0; i <= 3; i++) {
174 rtc_write_raw(RtcTodAddr[i], (unsigned char)(time & 0xff));
175 time = time >> 8;
176 }
177
178 /* Start clock */
York Sun472d5462013-04-01 11:29:11 -0700179 rtc_write(RTC_CTL_ADDR, RTC_CTL_BIT_EN_OSC, false);
Jean-Christophe PLAGNIOL-VILLARDd1e23192008-09-01 23:06:23 +0200180
181 return 0;
Marian Balakowicz6e53e272006-03-14 15:59:25 +0100182}
183
184/*
185 * Reset the RTC. We setting the date back to 1970-01-01.
186 * We also enable the oscillator output on the SQW/OUT pin and program
187 * it for 32,768 Hz output. Note that according to the datasheet, turning
188 * on the square wave output increases the current drain on the backup
189 * battery to something between 480nA and 800nA.
190 */
191void rtc_reset (void){
192
193 struct rtc_time tmp;
194
195 /* clear status flags */
York Sun472d5462013-04-01 11:29:11 -0700196 rtc_write(RTC_SR_ADDR, (RTC_SR_BIT_AF|RTC_SR_BIT_OSF), false); /* clearing OSF and AF */
Marian Balakowicz6e53e272006-03-14 15:59:25 +0100197
198 /* Initialise DS1374 oriented to MPC8349E-ADS */
199 rtc_write (RTC_CTL_ADDR, (RTC_CTL_BIT_EN_OSC
200 |RTC_CTL_BIT_WACE
York Sun472d5462013-04-01 11:29:11 -0700201 |RTC_CTL_BIT_AIE), false);/* start osc, disable WACE, clear AIE
Marian Balakowicz6e53e272006-03-14 15:59:25 +0100202 - set to 0 */
203 rtc_write (RTC_CTL_ADDR, (RTC_CTL_BIT_WD_ALM
204 |RTC_CTL_BIT_WDSTR
205 |RTC_CTL_BIT_RS1
206 |RTC_CTL_BIT_RS2
York Sun472d5462013-04-01 11:29:11 -0700207 |RTC_CTL_BIT_BBSQW), true);/* disable WD/ALM, WDSTR set to INT-pin,
Marian Balakowicz6e53e272006-03-14 15:59:25 +0100208 set BBSQW and SQW to 32k
209 - set to 1 */
210 tmp.tm_year = 1970;
211 tmp.tm_mon = 1;
212 tmp.tm_mday= 1;
213 tmp.tm_hour = 0;
214 tmp.tm_min = 0;
215 tmp.tm_sec = 0;
216
217 rtc_set(&tmp);
218
219 printf("RTC: %4d-%02d-%02d %2d:%02d:%02d UTC\n",
220 tmp.tm_year, tmp.tm_mon, tmp.tm_mday,
221 tmp.tm_hour, tmp.tm_min, tmp.tm_sec);
222
York Sun472d5462013-04-01 11:29:11 -0700223 rtc_write(RTC_WD_ALM_CNT_BYTE2_ADDR, 0xAC, true);
224 rtc_write(RTC_WD_ALM_CNT_BYTE1_ADDR, 0xDE, true);
225 rtc_write(RTC_WD_ALM_CNT_BYTE2_ADDR, 0xAD, true);
Marian Balakowicz6e53e272006-03-14 15:59:25 +0100226}
227
228/*
229 * Helper functions
230 */
231static uchar rtc_read (uchar reg)
232{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200233 return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg));
Marian Balakowicz6e53e272006-03-14 15:59:25 +0100234}
235
York Sun472d5462013-04-01 11:29:11 -0700236static void rtc_write(uchar reg, uchar val, bool set)
Marian Balakowicz6e53e272006-03-14 15:59:25 +0100237{
York Sun472d5462013-04-01 11:29:11 -0700238 if (set == true) {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200239 val |= i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg);
240 i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
Marian Balakowicz6e53e272006-03-14 15:59:25 +0100241 } else {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200242 val = i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg) & ~val;
243 i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
Marian Balakowicz6e53e272006-03-14 15:59:25 +0100244 }
245}
246
247static void rtc_write_raw (uchar reg, uchar val)
248{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200249 i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
Marian Balakowicz6e53e272006-03-14 15:59:25 +0100250}
Jon Loeliger068b60a2007-07-10 10:27:39 -0500251#endif