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Wolfgang Denk932394a2005-08-17 12:55:25 +02001/*
2 * drivers/mtd/nand.c
3 *
4 * Overview:
5 * This is the generic MTD driver for NAND flash devices. It should be
6 * capable of working with almost all NAND chips currently available.
7 * Basic support for AG-AND chips is provided.
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02008 *
Wolfgang Denk932394a2005-08-17 12:55:25 +02009 * Additional technical information is available on
Scott Woodc45912d2008-10-24 16:20:43 -050010 * http://www.linux-mtd.infradead.org/doc/nand.html
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +020011 *
Wolfgang Denk932394a2005-08-17 12:55:25 +020012 * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
William Juulcfa460a2007-10-31 13:53:06 +010013 * 2002-2006 Thomas Gleixner (tglx@linutronix.de)
Wolfgang Denk932394a2005-08-17 12:55:25 +020014 *
William Juulcfa460a2007-10-31 13:53:06 +010015 * Credits:
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +020016 * David Woodhouse for adding multichip support
17 *
Wolfgang Denk932394a2005-08-17 12:55:25 +020018 * Aleph One Ltd. and Toby Churchill Ltd. for supporting the
19 * rework for 2K page size chips
20 *
William Juulcfa460a2007-10-31 13:53:06 +010021 * TODO:
Wolfgang Denk932394a2005-08-17 12:55:25 +020022 * Enable cached programming for 2k page size chips
23 * Check, if mtd->ecctype should be set to MTD_ECC_HW
24 * if we have HW ecc support.
25 * The AG-AND chips have nice features for speed improvement,
26 * which are not supported yet. Read / program 4 pages in one go.
Scott Woodc45912d2008-10-24 16:20:43 -050027 * BBT table is not serialized, has to be fixed
Wolfgang Denk932394a2005-08-17 12:55:25 +020028 *
Wolfgang Denk932394a2005-08-17 12:55:25 +020029 * This program is free software; you can redistribute it and/or modify
30 * it under the terms of the GNU General Public License version 2 as
31 * published by the Free Software Foundation.
32 *
33 */
34
Wolfgang Denk932394a2005-08-17 12:55:25 +020035#include <common.h>
Bartlomiej Siekaaddb2e12006-03-05 18:57:33 +010036
William Juulcfa460a2007-10-31 13:53:06 +010037#define ENOTSUPP 524 /* Operation is not supported */
38
Wolfgang Denk932394a2005-08-17 12:55:25 +020039#include <malloc.h>
40#include <watchdog.h>
William Juulcfa460a2007-10-31 13:53:06 +010041#include <linux/err.h>
Wolfgang Denk932394a2005-08-17 12:55:25 +020042#include <linux/mtd/compat.h>
43#include <linux/mtd/mtd.h>
44#include <linux/mtd/nand.h>
45#include <linux/mtd/nand_ecc.h>
46
Stefan Roese10bb62d2009-04-24 15:58:33 +020047#ifdef CONFIG_MTD_PARTITIONS
48#include <linux/mtd/partitions.h>
49#endif
50
Wolfgang Denk932394a2005-08-17 12:55:25 +020051#include <asm/io.h>
52#include <asm/errno.h>
53
Peter Tyser8da60122009-02-04 13:47:22 -060054/*
55 * CONFIG_SYS_NAND_RESET_CNT is used as a timeout mechanism when resetting
56 * a flash. NAND flash is initialized prior to interrupts so standard timers
57 * can't be used. CONFIG_SYS_NAND_RESET_CNT should be set to a value
58 * which is greater than (max NAND reset time / NAND status read time).
59 * A conservative default of 200000 (500 us / 25 ns) is used as a default.
60 */
61#ifndef CONFIG_SYS_NAND_RESET_CNT
62#define CONFIG_SYS_NAND_RESET_CNT 200000
63#endif
64
Wolfgang Denk932394a2005-08-17 12:55:25 +020065/* Define default oob placement schemes for large and small page devices */
William Juulcfa460a2007-10-31 13:53:06 +010066static struct nand_ecclayout nand_oob_8 = {
Wolfgang Denk932394a2005-08-17 12:55:25 +020067 .eccbytes = 3,
68 .eccpos = {0, 1, 2},
William Juulcfa460a2007-10-31 13:53:06 +010069 .oobfree = {
70 {.offset = 3,
71 .length = 2},
72 {.offset = 6,
73 .length = 2}}
Wolfgang Denk932394a2005-08-17 12:55:25 +020074};
75
William Juulcfa460a2007-10-31 13:53:06 +010076static struct nand_ecclayout nand_oob_16 = {
Wolfgang Denk932394a2005-08-17 12:55:25 +020077 .eccbytes = 6,
78 .eccpos = {0, 1, 2, 3, 6, 7},
William Juulcfa460a2007-10-31 13:53:06 +010079 .oobfree = {
80 {.offset = 8,
81 . length = 8}}
Wolfgang Denk932394a2005-08-17 12:55:25 +020082};
83
William Juulcfa460a2007-10-31 13:53:06 +010084static struct nand_ecclayout nand_oob_64 = {
Wolfgang Denk932394a2005-08-17 12:55:25 +020085 .eccbytes = 24,
86 .eccpos = {
William Juulcfa460a2007-10-31 13:53:06 +010087 40, 41, 42, 43, 44, 45, 46, 47,
88 48, 49, 50, 51, 52, 53, 54, 55,
89 56, 57, 58, 59, 60, 61, 62, 63},
90 .oobfree = {
91 {.offset = 2,
92 .length = 38}}
Wolfgang Denk932394a2005-08-17 12:55:25 +020093};
94
William Juulcfa460a2007-10-31 13:53:06 +010095static struct nand_ecclayout nand_oob_128 = {
Sergei Poselenov248ae5c2008-06-06 15:42:43 +020096 .eccbytes = 48,
97 .eccpos = {
Wolfgang Denkd1a24f02011-02-02 22:36:10 +010098 80, 81, 82, 83, 84, 85, 86, 87,
99 88, 89, 90, 91, 92, 93, 94, 95,
William Juulcfa460a2007-10-31 13:53:06 +0100100 96, 97, 98, 99, 100, 101, 102, 103,
101 104, 105, 106, 107, 108, 109, 110, 111,
102 112, 113, 114, 115, 116, 117, 118, 119,
103 120, 121, 122, 123, 124, 125, 126, 127},
104 .oobfree = {
105 {.offset = 2,
106 .length = 78}}
Wolfgang Denk932394a2005-08-17 12:55:25 +0200107};
108
William Juulcfa460a2007-10-31 13:53:06 +0100109
110static int nand_get_device(struct nand_chip *chip, struct mtd_info *mtd,
111 int new_state);
112
113static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
114 struct mtd_oob_ops *ops);
115
116static int nand_wait(struct mtd_info *mtd, struct nand_chip *this);
Sergei Poselenov248ae5c2008-06-06 15:42:43 +0200117
Wolfgang Denk932394a2005-08-17 12:55:25 +0200118/**
119 * nand_release_device - [GENERIC] release chip
120 * @mtd: MTD device structure
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200121 *
122 * Deselect, release chip lock and wake up anyone waiting on the device
Wolfgang Denk932394a2005-08-17 12:55:25 +0200123 */
Wolfgang Denk8e9655f2005-11-02 14:29:12 +0100124static void nand_release_device (struct mtd_info *mtd)
125{
126 struct nand_chip *this = mtd->priv;
127 this->select_chip(mtd, -1); /* De-select the NAND device */
128}
Wolfgang Denk932394a2005-08-17 12:55:25 +0200129
130/**
131 * nand_read_byte - [DEFAULT] read one byte from the chip
132 * @mtd: MTD device structure
133 *
134 * Default read function for 8bit buswith
135 */
William Juulcfa460a2007-10-31 13:53:06 +0100136static uint8_t nand_read_byte(struct mtd_info *mtd)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200137{
William Juulcfa460a2007-10-31 13:53:06 +0100138 struct nand_chip *chip = mtd->priv;
139 return readb(chip->IO_ADDR_R);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200140}
141
142/**
143 * nand_read_byte16 - [DEFAULT] read one byte endianess aware from the chip
144 * @mtd: MTD device structure
145 *
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200146 * Default read function for 16bit buswith with
Wolfgang Denk932394a2005-08-17 12:55:25 +0200147 * endianess conversion
148 */
William Juulcfa460a2007-10-31 13:53:06 +0100149static uint8_t nand_read_byte16(struct mtd_info *mtd)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200150{
William Juulcfa460a2007-10-31 13:53:06 +0100151 struct nand_chip *chip = mtd->priv;
152 return (uint8_t) cpu_to_le16(readw(chip->IO_ADDR_R));
Wolfgang Denk932394a2005-08-17 12:55:25 +0200153}
154
155/**
156 * nand_read_word - [DEFAULT] read one word from the chip
157 * @mtd: MTD device structure
158 *
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200159 * Default read function for 16bit buswith without
Wolfgang Denk932394a2005-08-17 12:55:25 +0200160 * endianess conversion
161 */
162static u16 nand_read_word(struct mtd_info *mtd)
163{
William Juulcfa460a2007-10-31 13:53:06 +0100164 struct nand_chip *chip = mtd->priv;
165 return readw(chip->IO_ADDR_R);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200166}
167
168/**
169 * nand_select_chip - [DEFAULT] control CE line
170 * @mtd: MTD device structure
William Juulcfa460a2007-10-31 13:53:06 +0100171 * @chipnr: chipnumber to select, -1 for deselect
Wolfgang Denk932394a2005-08-17 12:55:25 +0200172 *
173 * Default select function for 1 chip devices.
174 */
William Juulcfa460a2007-10-31 13:53:06 +0100175static void nand_select_chip(struct mtd_info *mtd, int chipnr)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200176{
William Juulcfa460a2007-10-31 13:53:06 +0100177 struct nand_chip *chip = mtd->priv;
178
179 switch (chipnr) {
Wolfgang Denk932394a2005-08-17 12:55:25 +0200180 case -1:
William Juulcfa460a2007-10-31 13:53:06 +0100181 chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200182 break;
183 case 0:
Wolfgang Denk932394a2005-08-17 12:55:25 +0200184 break;
185
186 default:
187 BUG();
188 }
189}
190
191/**
192 * nand_write_buf - [DEFAULT] write buffer to chip
193 * @mtd: MTD device structure
194 * @buf: data buffer
195 * @len: number of bytes to write
196 *
197 * Default write function for 8bit buswith
198 */
William Juulcfa460a2007-10-31 13:53:06 +0100199static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200200{
201 int i;
William Juulcfa460a2007-10-31 13:53:06 +0100202 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200203
William Juulcfa460a2007-10-31 13:53:06 +0100204 for (i = 0; i < len; i++)
205 writeb(buf[i], chip->IO_ADDR_W);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200206}
207
208/**
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200209 * nand_read_buf - [DEFAULT] read chip data into buffer
Wolfgang Denk932394a2005-08-17 12:55:25 +0200210 * @mtd: MTD device structure
211 * @buf: buffer to store date
212 * @len: number of bytes to read
213 *
214 * Default read function for 8bit buswith
215 */
Simon Schwarz12c2f1e2011-09-14 15:30:16 -0400216void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200217{
218 int i;
William Juulcfa460a2007-10-31 13:53:06 +0100219 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200220
William Juulcfa460a2007-10-31 13:53:06 +0100221 for (i = 0; i < len; i++)
222 buf[i] = readb(chip->IO_ADDR_R);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200223}
224
225/**
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200226 * nand_verify_buf - [DEFAULT] Verify chip data against buffer
Wolfgang Denk932394a2005-08-17 12:55:25 +0200227 * @mtd: MTD device structure
228 * @buf: buffer containing the data to compare
229 * @len: number of bytes to compare
230 *
231 * Default verify function for 8bit buswith
232 */
William Juulcfa460a2007-10-31 13:53:06 +0100233static int nand_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200234{
235 int i;
William Juulcfa460a2007-10-31 13:53:06 +0100236 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200237
William Juulcfa460a2007-10-31 13:53:06 +0100238 for (i = 0; i < len; i++)
239 if (buf[i] != readb(chip->IO_ADDR_R))
Wolfgang Denk932394a2005-08-17 12:55:25 +0200240 return -EFAULT;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200241 return 0;
242}
243
244/**
245 * nand_write_buf16 - [DEFAULT] write buffer to chip
246 * @mtd: MTD device structure
247 * @buf: data buffer
248 * @len: number of bytes to write
249 *
250 * Default write function for 16bit buswith
251 */
William Juulcfa460a2007-10-31 13:53:06 +0100252static void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200253{
254 int i;
William Juulcfa460a2007-10-31 13:53:06 +0100255 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200256 u16 *p = (u16 *) buf;
257 len >>= 1;
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200258
William Juulcfa460a2007-10-31 13:53:06 +0100259 for (i = 0; i < len; i++)
260 writew(p[i], chip->IO_ADDR_W);
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200261
Wolfgang Denk932394a2005-08-17 12:55:25 +0200262}
263
264/**
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200265 * nand_read_buf16 - [DEFAULT] read chip data into buffer
Wolfgang Denk932394a2005-08-17 12:55:25 +0200266 * @mtd: MTD device structure
267 * @buf: buffer to store date
268 * @len: number of bytes to read
269 *
270 * Default read function for 16bit buswith
271 */
Simon Schwarz12c2f1e2011-09-14 15:30:16 -0400272void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200273{
274 int i;
William Juulcfa460a2007-10-31 13:53:06 +0100275 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200276 u16 *p = (u16 *) buf;
277 len >>= 1;
278
William Juulcfa460a2007-10-31 13:53:06 +0100279 for (i = 0; i < len; i++)
280 p[i] = readw(chip->IO_ADDR_R);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200281}
282
283/**
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200284 * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer
Wolfgang Denk932394a2005-08-17 12:55:25 +0200285 * @mtd: MTD device structure
286 * @buf: buffer containing the data to compare
287 * @len: number of bytes to compare
288 *
289 * Default verify function for 16bit buswith
290 */
William Juulcfa460a2007-10-31 13:53:06 +0100291static int nand_verify_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200292{
293 int i;
William Juulcfa460a2007-10-31 13:53:06 +0100294 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200295 u16 *p = (u16 *) buf;
296 len >>= 1;
297
William Juulcfa460a2007-10-31 13:53:06 +0100298 for (i = 0; i < len; i++)
299 if (p[i] != readw(chip->IO_ADDR_R))
Wolfgang Denk932394a2005-08-17 12:55:25 +0200300 return -EFAULT;
301
302 return 0;
303}
304
305/**
306 * nand_block_bad - [DEFAULT] Read bad block marker from the chip
307 * @mtd: MTD device structure
308 * @ofs: offset from device start
309 * @getchip: 0, if the chip is already selected
310 *
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200311 * Check, if the block is bad.
Wolfgang Denk932394a2005-08-17 12:55:25 +0200312 */
313static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip)
314{
315 int page, chipnr, res = 0;
William Juulcfa460a2007-10-31 13:53:06 +0100316 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200317 u16 bad;
318
William Juulcfa460a2007-10-31 13:53:06 +0100319 page = (int)(ofs >> chip->page_shift) & chip->pagemask;
Thomas Knoblocha7988652007-05-05 07:04:42 +0200320
Wolfgang Denk932394a2005-08-17 12:55:25 +0200321 if (getchip) {
William Juulcfa460a2007-10-31 13:53:06 +0100322 chipnr = (int)(ofs >> chip->chip_shift);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200323
William Juulcfa460a2007-10-31 13:53:06 +0100324 nand_get_device(chip, mtd, FL_READING);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200325
326 /* Select the NAND device */
William Juulcfa460a2007-10-31 13:53:06 +0100327 chip->select_chip(mtd, chipnr);
Thomas Knoblocha7988652007-05-05 07:04:42 +0200328 }
Wolfgang Denk932394a2005-08-17 12:55:25 +0200329
William Juulcfa460a2007-10-31 13:53:06 +0100330 if (chip->options & NAND_BUSWIDTH_16) {
331 chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos & 0xFE,
332 page);
333 bad = cpu_to_le16(chip->read_word(mtd));
334 if (chip->badblockpos & 0x1)
335 bad >>= 8;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200336 if ((bad & 0xFF) != 0xff)
337 res = 1;
338 } else {
William Juulcfa460a2007-10-31 13:53:06 +0100339 chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos, page);
340 if (chip->read_byte(mtd) != 0xff)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200341 res = 1;
342 }
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200343
William Juulcfa460a2007-10-31 13:53:06 +0100344 if (getchip)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200345 nand_release_device(mtd);
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200346
Wolfgang Denk932394a2005-08-17 12:55:25 +0200347 return res;
348}
349
350/**
351 * nand_default_block_markbad - [DEFAULT] mark a block bad
352 * @mtd: MTD device structure
353 * @ofs: offset from device start
354 *
355 * This is the default implementation, which can be overridden by
356 * a hardware specific driver.
357*/
358static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
359{
William Juulcfa460a2007-10-31 13:53:06 +0100360 struct nand_chip *chip = mtd->priv;
361 uint8_t buf[2] = { 0, 0 };
362 int block, ret;
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200363
Wolfgang Denk932394a2005-08-17 12:55:25 +0200364 /* Get block number */
William Juulcfa460a2007-10-31 13:53:06 +0100365 block = (int)(ofs >> chip->bbt_erase_shift);
366 if (chip->bbt)
367 chip->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200368
369 /* Do we have a flash based bad block table ? */
William Juulcfa460a2007-10-31 13:53:06 +0100370 if (chip->options & NAND_USE_FLASH_BBT)
371 ret = nand_update_bbt(mtd, ofs);
372 else {
373 /* We write two bytes, so we dont have to mess with 16 bit
374 * access
375 */
Scott Woodc45912d2008-10-24 16:20:43 -0500376 nand_get_device(chip, mtd, FL_WRITING);
William Juulcfa460a2007-10-31 13:53:06 +0100377 ofs += mtd->oobsize;
378 chip->ops.len = chip->ops.ooblen = 2;
379 chip->ops.datbuf = NULL;
380 chip->ops.oobbuf = buf;
381 chip->ops.ooboffs = chip->badblockpos & ~0x01;
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200382
William Juulcfa460a2007-10-31 13:53:06 +0100383 ret = nand_do_write_oob(mtd, ofs, &chip->ops);
Scott Woodc45912d2008-10-24 16:20:43 -0500384 nand_release_device(mtd);
William Juulcfa460a2007-10-31 13:53:06 +0100385 }
386 if (!ret)
387 mtd->ecc_stats.badblocks++;
Scott Woodc45912d2008-10-24 16:20:43 -0500388
William Juulcfa460a2007-10-31 13:53:06 +0100389 return ret;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200390}
391
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200392/**
Wolfgang Denk932394a2005-08-17 12:55:25 +0200393 * nand_check_wp - [GENERIC] check if the chip is write protected
394 * @mtd: MTD device structure
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200395 * Check, if the device is write protected
Wolfgang Denk932394a2005-08-17 12:55:25 +0200396 *
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200397 * The function expects, that the device is already selected
Wolfgang Denk932394a2005-08-17 12:55:25 +0200398 */
William Juulcfa460a2007-10-31 13:53:06 +0100399static int nand_check_wp(struct mtd_info *mtd)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200400{
William Juulcfa460a2007-10-31 13:53:06 +0100401 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200402 /* Check the WP bit */
William Juulcfa460a2007-10-31 13:53:06 +0100403 chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
404 return (chip->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200405}
Markus Klotzbücher43638c62006-03-06 15:04:25 +0100406
Wolfgang Denk932394a2005-08-17 12:55:25 +0200407/**
408 * nand_block_checkbad - [GENERIC] Check if a block is marked bad
409 * @mtd: MTD device structure
410 * @ofs: offset from device start
411 * @getchip: 0, if the chip is already selected
412 * @allowbbt: 1, if its allowed to access the bbt area
413 *
414 * Check, if the block is bad. Either by reading the bad block table or
415 * calling of the scan function.
416 */
William Juulcfa460a2007-10-31 13:53:06 +0100417static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip,
418 int allowbbt)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200419{
William Juulcfa460a2007-10-31 13:53:06 +0100420 struct nand_chip *chip = mtd->priv;
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200421
Ilya Yanok13f0fd92008-06-30 15:34:40 +0200422 if (!(chip->options & NAND_BBT_SCANNED)) {
Ilya Yanok13f0fd92008-06-30 15:34:40 +0200423 chip->options |= NAND_BBT_SCANNED;
Scott Woodff49ea82008-12-16 14:24:16 -0600424 chip->scan_bbt(mtd);
Ilya Yanok13f0fd92008-06-30 15:34:40 +0200425 }
426
William Juulcfa460a2007-10-31 13:53:06 +0100427 if (!chip->bbt)
428 return chip->block_bad(mtd, ofs, getchip);
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200429
Wolfgang Denk932394a2005-08-17 12:55:25 +0200430 /* Return info from the table */
William Juulcfa460a2007-10-31 13:53:06 +0100431 return nand_isbad_bbt(mtd, ofs, allowbbt);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200432}
433
William Juulcfa460a2007-10-31 13:53:06 +0100434/*
435 * Wait for the ready pin, after a command
436 * The timeout is catched later.
437 */
William Juulcfa460a2007-10-31 13:53:06 +0100438void nand_wait_ready(struct mtd_info *mtd)
439{
440 struct nand_chip *chip = mtd->priv;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200441 u32 timeo = (CONFIG_SYS_HZ * 20) / 1000;
Reinhard Meyer7a8fc362010-11-18 03:14:26 +0000442 u32 time_start;
Stefan Roese12072262008-01-05 16:43:25 +0100443
Reinhard Meyer7a8fc362010-11-18 03:14:26 +0000444 time_start = get_timer(0);
Stefan Roese12072262008-01-05 16:43:25 +0100445
446 /* wait until command is processed or timeout occures */
Reinhard Meyer7a8fc362010-11-18 03:14:26 +0000447 while (get_timer(time_start) < timeo) {
Stefan Roese12072262008-01-05 16:43:25 +0100448 if (chip->dev_ready)
449 if (chip->dev_ready(mtd))
450 break;
451 }
William Juulcfa460a2007-10-31 13:53:06 +0100452}
William Juulcfa460a2007-10-31 13:53:06 +0100453
Wolfgang Denk932394a2005-08-17 12:55:25 +0200454/**
455 * nand_command - [DEFAULT] Send command to NAND device
456 * @mtd: MTD device structure
457 * @command: the command to be sent
458 * @column: the column address for this command, -1 if none
459 * @page_addr: the page address for this command, -1 if none
460 *
461 * Send command to NAND device. This function is used for small page
462 * devices (256/512 Bytes per page)
463 */
William Juulcfa460a2007-10-31 13:53:06 +0100464static void nand_command(struct mtd_info *mtd, unsigned int command,
465 int column, int page_addr)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200466{
William Juulcfa460a2007-10-31 13:53:06 +0100467 register struct nand_chip *chip = mtd->priv;
468 int ctrl = NAND_CTRL_CLE | NAND_CTRL_CHANGE;
Peter Tyser8da60122009-02-04 13:47:22 -0600469 uint32_t rst_sts_cnt = CONFIG_SYS_NAND_RESET_CNT;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200470
Wolfgang Denk932394a2005-08-17 12:55:25 +0200471 /*
472 * Write out the command to the device.
473 */
474 if (command == NAND_CMD_SEQIN) {
475 int readcmd;
476
William Juulcfa460a2007-10-31 13:53:06 +0100477 if (column >= mtd->writesize) {
Wolfgang Denk932394a2005-08-17 12:55:25 +0200478 /* OOB area */
William Juulcfa460a2007-10-31 13:53:06 +0100479 column -= mtd->writesize;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200480 readcmd = NAND_CMD_READOOB;
481 } else if (column < 256) {
482 /* First 256 bytes --> READ0 */
483 readcmd = NAND_CMD_READ0;
484 } else {
485 column -= 256;
486 readcmd = NAND_CMD_READ1;
487 }
William Juulcfa460a2007-10-31 13:53:06 +0100488 chip->cmd_ctrl(mtd, readcmd, ctrl);
489 ctrl &= ~NAND_CTRL_CHANGE;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200490 }
William Juulcfa460a2007-10-31 13:53:06 +0100491 chip->cmd_ctrl(mtd, command, ctrl);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200492
William Juulcfa460a2007-10-31 13:53:06 +0100493 /*
494 * Address cycle, when necessary
495 */
496 ctrl = NAND_CTRL_ALE | NAND_CTRL_CHANGE;
497 /* Serially input address */
498 if (column != -1) {
499 /* Adjust columns for 16 bit buswidth */
500 if (chip->options & NAND_BUSWIDTH_16)
501 column >>= 1;
502 chip->cmd_ctrl(mtd, column, ctrl);
503 ctrl &= ~NAND_CTRL_CHANGE;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200504 }
William Juulcfa460a2007-10-31 13:53:06 +0100505 if (page_addr != -1) {
506 chip->cmd_ctrl(mtd, page_addr, ctrl);
507 ctrl &= ~NAND_CTRL_CHANGE;
508 chip->cmd_ctrl(mtd, page_addr >> 8, ctrl);
509 /* One more address cycle for devices > 32MiB */
510 if (chip->chipsize > (32 << 20))
511 chip->cmd_ctrl(mtd, page_addr >> 16, ctrl);
512 }
513 chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200514
515 /*
516 * program and erase have their own busy handlers
Wolfgang Denk932394a2005-08-17 12:55:25 +0200517 * status and sequential in needs no delay
William Juulcfa460a2007-10-31 13:53:06 +0100518 */
Wolfgang Denk932394a2005-08-17 12:55:25 +0200519 switch (command) {
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200520
Wolfgang Denk932394a2005-08-17 12:55:25 +0200521 case NAND_CMD_PAGEPROG:
522 case NAND_CMD_ERASE1:
523 case NAND_CMD_ERASE2:
524 case NAND_CMD_SEQIN:
525 case NAND_CMD_STATUS:
526 return;
527
528 case NAND_CMD_RESET:
William Juulcfa460a2007-10-31 13:53:06 +0100529 if (chip->dev_ready)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200530 break;
William Juulcfa460a2007-10-31 13:53:06 +0100531 udelay(chip->chip_delay);
532 chip->cmd_ctrl(mtd, NAND_CMD_STATUS,
533 NAND_CTRL_CLE | NAND_CTRL_CHANGE);
534 chip->cmd_ctrl(mtd,
535 NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Peter Tyser8da60122009-02-04 13:47:22 -0600536 while (!(chip->read_byte(mtd) & NAND_STATUS_READY) &&
537 (rst_sts_cnt--));
Wolfgang Denk932394a2005-08-17 12:55:25 +0200538 return;
539
William Juulcfa460a2007-10-31 13:53:06 +0100540 /* This applies to read commands */
Wolfgang Denk932394a2005-08-17 12:55:25 +0200541 default:
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200542 /*
Wolfgang Denk932394a2005-08-17 12:55:25 +0200543 * If we don't have access to the busy pin, we apply the given
544 * command delay
William Juulcfa460a2007-10-31 13:53:06 +0100545 */
546 if (!chip->dev_ready) {
547 udelay(chip->chip_delay);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200548 return;
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200549 }
Wolfgang Denk932394a2005-08-17 12:55:25 +0200550 }
Wolfgang Denk932394a2005-08-17 12:55:25 +0200551 /* Apply this short delay always to ensure that we do wait tWB in
552 * any case on any machine. */
William Juulcfa460a2007-10-31 13:53:06 +0100553 ndelay(100);
554
555 nand_wait_ready(mtd);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200556}
557
558/**
559 * nand_command_lp - [DEFAULT] Send command to NAND large page device
560 * @mtd: MTD device structure
561 * @command: the command to be sent
562 * @column: the column address for this command, -1 if none
563 * @page_addr: the page address for this command, -1 if none
564 *
William Juulcfa460a2007-10-31 13:53:06 +0100565 * Send command to NAND device. This is the version for the new large page
566 * devices We dont have the separate regions as we have in the small page
567 * devices. We must emulate NAND_CMD_READOOB to keep the code compatible.
Wolfgang Denk932394a2005-08-17 12:55:25 +0200568 */
William Juulcfa460a2007-10-31 13:53:06 +0100569static void nand_command_lp(struct mtd_info *mtd, unsigned int command,
570 int column, int page_addr)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200571{
William Juulcfa460a2007-10-31 13:53:06 +0100572 register struct nand_chip *chip = mtd->priv;
Peter Tyser8da60122009-02-04 13:47:22 -0600573 uint32_t rst_sts_cnt = CONFIG_SYS_NAND_RESET_CNT;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200574
575 /* Emulate NAND_CMD_READOOB */
576 if (command == NAND_CMD_READOOB) {
William Juulcfa460a2007-10-31 13:53:06 +0100577 column += mtd->writesize;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200578 command = NAND_CMD_READ0;
579 }
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200580
William Juulcfa460a2007-10-31 13:53:06 +0100581 /* Command latch cycle */
582 chip->cmd_ctrl(mtd, command & 0xff,
583 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200584
585 if (column != -1 || page_addr != -1) {
William Juulcfa460a2007-10-31 13:53:06 +0100586 int ctrl = NAND_CTRL_CHANGE | NAND_NCE | NAND_ALE;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200587
588 /* Serially input address */
589 if (column != -1) {
590 /* Adjust columns for 16 bit buswidth */
William Juulcfa460a2007-10-31 13:53:06 +0100591 if (chip->options & NAND_BUSWIDTH_16)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200592 column >>= 1;
William Juulcfa460a2007-10-31 13:53:06 +0100593 chip->cmd_ctrl(mtd, column, ctrl);
594 ctrl &= ~NAND_CTRL_CHANGE;
595 chip->cmd_ctrl(mtd, column >> 8, ctrl);
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200596 }
Wolfgang Denk932394a2005-08-17 12:55:25 +0200597 if (page_addr != -1) {
William Juulcfa460a2007-10-31 13:53:06 +0100598 chip->cmd_ctrl(mtd, page_addr, ctrl);
599 chip->cmd_ctrl(mtd, page_addr >> 8,
600 NAND_NCE | NAND_ALE);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200601 /* One more address cycle for devices > 128MiB */
William Juulcfa460a2007-10-31 13:53:06 +0100602 if (chip->chipsize > (128 << 20))
603 chip->cmd_ctrl(mtd, page_addr >> 16,
604 NAND_NCE | NAND_ALE);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200605 }
Wolfgang Denk932394a2005-08-17 12:55:25 +0200606 }
William Juulcfa460a2007-10-31 13:53:06 +0100607 chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200608
609 /*
610 * program and erase have their own busy handlers
William Juulcfa460a2007-10-31 13:53:06 +0100611 * status, sequential in, and deplete1 need no delay
612 */
Wolfgang Denk932394a2005-08-17 12:55:25 +0200613 switch (command) {
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200614
Wolfgang Denk932394a2005-08-17 12:55:25 +0200615 case NAND_CMD_CACHEDPROG:
616 case NAND_CMD_PAGEPROG:
617 case NAND_CMD_ERASE1:
618 case NAND_CMD_ERASE2:
619 case NAND_CMD_SEQIN:
William Juulcfa460a2007-10-31 13:53:06 +0100620 case NAND_CMD_RNDIN:
Wolfgang Denk932394a2005-08-17 12:55:25 +0200621 case NAND_CMD_STATUS:
William Juulcfa460a2007-10-31 13:53:06 +0100622 case NAND_CMD_DEPLETE1:
Wolfgang Denk932394a2005-08-17 12:55:25 +0200623 return;
624
William Juulcfa460a2007-10-31 13:53:06 +0100625 /*
626 * read error status commands require only a short delay
627 */
628 case NAND_CMD_STATUS_ERROR:
629 case NAND_CMD_STATUS_ERROR0:
630 case NAND_CMD_STATUS_ERROR1:
631 case NAND_CMD_STATUS_ERROR2:
632 case NAND_CMD_STATUS_ERROR3:
633 udelay(chip->chip_delay);
634 return;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200635
636 case NAND_CMD_RESET:
William Juulcfa460a2007-10-31 13:53:06 +0100637 if (chip->dev_ready)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200638 break;
William Juulcfa460a2007-10-31 13:53:06 +0100639 udelay(chip->chip_delay);
640 chip->cmd_ctrl(mtd, NAND_CMD_STATUS,
641 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
642 chip->cmd_ctrl(mtd, NAND_CMD_NONE,
643 NAND_NCE | NAND_CTRL_CHANGE);
Peter Tyser8da60122009-02-04 13:47:22 -0600644 while (!(chip->read_byte(mtd) & NAND_STATUS_READY) &&
645 (rst_sts_cnt--));
William Juulcfa460a2007-10-31 13:53:06 +0100646 return;
647
648 case NAND_CMD_RNDOUT:
649 /* No ready / busy check necessary */
650 chip->cmd_ctrl(mtd, NAND_CMD_RNDOUTSTART,
651 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
652 chip->cmd_ctrl(mtd, NAND_CMD_NONE,
653 NAND_NCE | NAND_CTRL_CHANGE);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200654 return;
655
656 case NAND_CMD_READ0:
William Juulcfa460a2007-10-31 13:53:06 +0100657 chip->cmd_ctrl(mtd, NAND_CMD_READSTART,
658 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
659 chip->cmd_ctrl(mtd, NAND_CMD_NONE,
660 NAND_NCE | NAND_CTRL_CHANGE);
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200661
William Juulcfa460a2007-10-31 13:53:06 +0100662 /* This applies to read commands */
Wolfgang Denk932394a2005-08-17 12:55:25 +0200663 default:
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200664 /*
Wolfgang Denk932394a2005-08-17 12:55:25 +0200665 * If we don't have access to the busy pin, we apply the given
666 * command delay
William Juulcfa460a2007-10-31 13:53:06 +0100667 */
668 if (!chip->dev_ready) {
669 udelay(chip->chip_delay);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200670 return;
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200671 }
Wolfgang Denk932394a2005-08-17 12:55:25 +0200672 }
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200673
Wolfgang Denk932394a2005-08-17 12:55:25 +0200674 /* Apply this short delay always to ensure that we do wait tWB in
675 * any case on any machine. */
William Juulcfa460a2007-10-31 13:53:06 +0100676 ndelay(100);
677
678 nand_wait_ready(mtd);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200679}
680
681/**
682 * nand_get_device - [GENERIC] Get chip for selected access
William Juulcfa460a2007-10-31 13:53:06 +0100683 * @chip: the nand chip descriptor
Wolfgang Denk932394a2005-08-17 12:55:25 +0200684 * @mtd: MTD device structure
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200685 * @new_state: the state which is requested
Wolfgang Denk932394a2005-08-17 12:55:25 +0200686 *
687 * Get the device and lock it for exclusive access
688 */
William Juulcfa460a2007-10-31 13:53:06 +0100689static int nand_get_device (struct nand_chip *this, struct mtd_info *mtd, int new_state)
690{
Marcel Ziswilereafcabd2008-06-22 16:30:06 +0200691 this->state = new_state;
William Juulcfa460a2007-10-31 13:53:06 +0100692 return 0;
693}
Wolfgang Denk932394a2005-08-17 12:55:25 +0200694
695/**
696 * nand_wait - [DEFAULT] wait until the command is done
697 * @mtd: MTD device structure
William Juulcfa460a2007-10-31 13:53:06 +0100698 * @chip: NAND chip structure
Wolfgang Denk932394a2005-08-17 12:55:25 +0200699 *
700 * Wait for command done. This applies to erase and program only
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200701 * Erase can take up to 400ms and program up to 20ms according to
Wolfgang Denk932394a2005-08-17 12:55:25 +0200702 * general NAND and SmartMedia specs
William Juulcfa460a2007-10-31 13:53:06 +0100703 */
William Juulcfa460a2007-10-31 13:53:06 +0100704static int nand_wait(struct mtd_info *mtd, struct nand_chip *this)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200705{
Wolfgang Denk8e9655f2005-11-02 14:29:12 +0100706 unsigned long timeo;
William Juulcfa460a2007-10-31 13:53:06 +0100707 int state = this->state;
Reinhard Meyer7a8fc362010-11-18 03:14:26 +0000708 u32 time_start;
Wolfgang Denk8e9655f2005-11-02 14:29:12 +0100709
710 if (state == FL_ERASING)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200711 timeo = (CONFIG_SYS_HZ * 400) / 1000;
Wolfgang Denk8e9655f2005-11-02 14:29:12 +0100712 else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200713 timeo = (CONFIG_SYS_HZ * 20) / 1000;
Wolfgang Denk8e9655f2005-11-02 14:29:12 +0100714
715 if ((state == FL_ERASING) && (this->options & NAND_IS_AND))
716 this->cmdfunc(mtd, NAND_CMD_STATUS_MULTI, -1, -1);
717 else
718 this->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
719
Reinhard Meyer7a8fc362010-11-18 03:14:26 +0000720 time_start = get_timer(0);
Wolfgang Denk8e9655f2005-11-02 14:29:12 +0100721
722 while (1) {
Reinhard Meyer7a8fc362010-11-18 03:14:26 +0000723 if (get_timer(time_start) > timeo) {
Bartlomiej Sieka038ccac2006-02-24 09:37:22 +0100724 printf("Timeout!");
Stefan Roese15784862006-11-27 17:22:19 +0100725 return 0x01;
726 }
Wolfgang Denk8e9655f2005-11-02 14:29:12 +0100727
728 if (this->dev_ready) {
729 if (this->dev_ready(mtd))
730 break;
731 } else {
732 if (this->read_byte(mtd) & NAND_STATUS_READY)
733 break;
734 }
735 }
Bartlomiej Siekaaddb2e12006-03-05 18:57:33 +0100736#ifdef PPCHAMELON_NAND_TIMER_HACK
Reinhard Meyer7a8fc362010-11-18 03:14:26 +0000737 time_start = get_timer(0);
738 while (get_timer(time_start) < 10)
739 ;
Bartlomiej Siekaaddb2e12006-03-05 18:57:33 +0100740#endif /* PPCHAMELON_NAND_TIMER_HACK */
Bartlomiej Sieka038ccac2006-02-24 09:37:22 +0100741
Wolfgang Denk8e9655f2005-11-02 14:29:12 +0100742 return this->read_byte(mtd);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200743}
Wolfgang Denk932394a2005-08-17 12:55:25 +0200744
745/**
William Juulcfa460a2007-10-31 13:53:06 +0100746 * nand_read_page_raw - [Intern] read raw page data without ecc
747 * @mtd: mtd info structure
748 * @chip: nand chip info structure
749 * @buf: buffer to store read data
Sandeep Paulraje25ee032009-11-07 14:24:50 -0500750 * @page: page number to read
David Brownell7e866612009-11-07 16:27:01 -0500751 *
752 * Not for syndrome calculating ecc controllers, which use a special oob layout
Wolfgang Denk932394a2005-08-17 12:55:25 +0200753 */
William Juulcfa460a2007-10-31 13:53:06 +0100754static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
Sandeep Paulraja2c65b42009-08-10 13:27:46 -0400755 uint8_t *buf, int page)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200756{
William Juulcfa460a2007-10-31 13:53:06 +0100757 chip->read_buf(mtd, buf, mtd->writesize);
758 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
759 return 0;
760}
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200761
William Juulcfa460a2007-10-31 13:53:06 +0100762/**
David Brownell7e866612009-11-07 16:27:01 -0500763 * nand_read_page_raw_syndrome - [Intern] read raw page data without ecc
764 * @mtd: mtd info structure
765 * @chip: nand chip info structure
766 * @buf: buffer to store read data
767 * @page: page number to read
768 *
769 * We need a special oob layout and handling even when OOB isn't used.
770 */
771static int nand_read_page_raw_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
772 uint8_t *buf, int page)
773{
774 int eccsize = chip->ecc.size;
775 int eccbytes = chip->ecc.bytes;
776 uint8_t *oob = chip->oob_poi;
777 int steps, size;
778
779 for (steps = chip->ecc.steps; steps > 0; steps--) {
780 chip->read_buf(mtd, buf, eccsize);
781 buf += eccsize;
782
783 if (chip->ecc.prepad) {
784 chip->read_buf(mtd, oob, chip->ecc.prepad);
785 oob += chip->ecc.prepad;
786 }
787
788 chip->read_buf(mtd, oob, eccbytes);
789 oob += eccbytes;
790
791 if (chip->ecc.postpad) {
792 chip->read_buf(mtd, oob, chip->ecc.postpad);
793 oob += chip->ecc.postpad;
794 }
795 }
796
797 size = mtd->oobsize - (oob - chip->oob_poi);
798 if (size)
799 chip->read_buf(mtd, oob, size);
800
801 return 0;
802}
803
804/**
William Juulcfa460a2007-10-31 13:53:06 +0100805 * nand_read_page_swecc - [REPLACABLE] software ecc based page read function
806 * @mtd: mtd info structure
807 * @chip: nand chip info structure
808 * @buf: buffer to store read data
Sandeep Paulraje25ee032009-11-07 14:24:50 -0500809 * @page: page number to read
William Juulcfa460a2007-10-31 13:53:06 +0100810 */
811static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
Sandeep Paulraja2c65b42009-08-10 13:27:46 -0400812 uint8_t *buf, int page)
William Juulcfa460a2007-10-31 13:53:06 +0100813{
814 int i, eccsize = chip->ecc.size;
815 int eccbytes = chip->ecc.bytes;
816 int eccsteps = chip->ecc.steps;
817 uint8_t *p = buf;
818 uint8_t *ecc_calc = chip->buffers->ecccalc;
819 uint8_t *ecc_code = chip->buffers->ecccode;
820 uint32_t *eccpos = chip->ecc.layout->eccpos;
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200821
Sandeep Paulraja2c65b42009-08-10 13:27:46 -0400822 chip->ecc.read_page_raw(mtd, chip, buf, page);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200823
William Juulcfa460a2007-10-31 13:53:06 +0100824 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)
825 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200826
William Juulcfa460a2007-10-31 13:53:06 +0100827 for (i = 0; i < chip->ecc.total; i++)
828 ecc_code[i] = chip->oob_poi[eccpos[i]];
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200829
William Juulcfa460a2007-10-31 13:53:06 +0100830 eccsteps = chip->ecc.steps;
831 p = buf;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200832
William Juulcfa460a2007-10-31 13:53:06 +0100833 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
834 int stat;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200835
William Juulcfa460a2007-10-31 13:53:06 +0100836 stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
Scott Woodc45912d2008-10-24 16:20:43 -0500837 if (stat < 0)
838 mtd->ecc_stats.failed++;
839 else
840 mtd->ecc_stats.corrected += stat;
841 }
842 return 0;
843}
844
845/**
846 * nand_read_subpage - [REPLACABLE] software ecc based sub-page read function
847 * @mtd: mtd info structure
848 * @chip: nand chip info structure
Sandeep Paulraje25ee032009-11-07 14:24:50 -0500849 * @data_offs: offset of requested data within the page
850 * @readlen: data length
851 * @bufpoi: buffer to store read data
Scott Woodc45912d2008-10-24 16:20:43 -0500852 */
853static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip, uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi)
854{
855 int start_step, end_step, num_steps;
856 uint32_t *eccpos = chip->ecc.layout->eccpos;
857 uint8_t *p;
858 int data_col_addr, i, gaps = 0;
859 int datafrag_len, eccfrag_len, aligned_len, aligned_pos;
860 int busw = (chip->options & NAND_BUSWIDTH_16) ? 2 : 1;
861
862 /* Column address wihin the page aligned to ECC size (256bytes). */
863 start_step = data_offs / chip->ecc.size;
864 end_step = (data_offs + readlen - 1) / chip->ecc.size;
865 num_steps = end_step - start_step + 1;
866
867 /* Data size aligned to ECC ecc.size*/
868 datafrag_len = num_steps * chip->ecc.size;
869 eccfrag_len = num_steps * chip->ecc.bytes;
870
871 data_col_addr = start_step * chip->ecc.size;
872 /* If we read not a page aligned data */
873 if (data_col_addr != 0)
874 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_col_addr, -1);
875
876 p = bufpoi + data_col_addr;
877 chip->read_buf(mtd, p, datafrag_len);
878
879 /* Calculate ECC */
880 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size)
881 chip->ecc.calculate(mtd, p, &chip->buffers->ecccalc[i]);
882
883 /* The performance is faster if to position offsets
884 according to ecc.pos. Let make sure here that
885 there are no gaps in ecc positions */
886 for (i = 0; i < eccfrag_len - 1; i++) {
887 if (eccpos[i + start_step * chip->ecc.bytes] + 1 !=
888 eccpos[i + start_step * chip->ecc.bytes + 1]) {
889 gaps = 1;
890 break;
891 }
892 }
893 if (gaps) {
894 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, mtd->writesize, -1);
895 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
896 } else {
897 /* send the command to read the particular ecc bytes */
898 /* take care about buswidth alignment in read_buf */
899 aligned_pos = eccpos[start_step * chip->ecc.bytes] & ~(busw - 1);
900 aligned_len = eccfrag_len;
901 if (eccpos[start_step * chip->ecc.bytes] & (busw - 1))
902 aligned_len++;
903 if (eccpos[(start_step + num_steps) * chip->ecc.bytes] & (busw - 1))
904 aligned_len++;
905
906 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, mtd->writesize + aligned_pos, -1);
907 chip->read_buf(mtd, &chip->oob_poi[aligned_pos], aligned_len);
908 }
909
910 for (i = 0; i < eccfrag_len; i++)
911 chip->buffers->ecccode[i] = chip->oob_poi[eccpos[i + start_step * chip->ecc.bytes]];
912
913 p = bufpoi + data_col_addr;
914 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) {
915 int stat;
916
917 stat = chip->ecc.correct(mtd, p, &chip->buffers->ecccode[i], &chip->buffers->ecccalc[i]);
Sandeep Paulraj6cd752f2009-11-16 13:32:01 -0500918 if (stat == -1)
William Juulcfa460a2007-10-31 13:53:06 +0100919 mtd->ecc_stats.failed++;
920 else
921 mtd->ecc_stats.corrected += stat;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200922 }
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +0200923 return 0;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200924}
925
Wolfgang Denk932394a2005-08-17 12:55:25 +0200926/**
William Juulcfa460a2007-10-31 13:53:06 +0100927 * nand_read_page_hwecc - [REPLACABLE] hardware ecc based page read function
928 * @mtd: mtd info structure
929 * @chip: nand chip info structure
930 * @buf: buffer to store read data
Sandeep Paulraje25ee032009-11-07 14:24:50 -0500931 * @page: page number to read
Wolfgang Denk932394a2005-08-17 12:55:25 +0200932 *
William Juulcfa460a2007-10-31 13:53:06 +0100933 * Not for syndrome calculating ecc controllers which need a special oob layout
Wolfgang Denk932394a2005-08-17 12:55:25 +0200934 */
William Juulcfa460a2007-10-31 13:53:06 +0100935static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
Sandeep Paulraja2c65b42009-08-10 13:27:46 -0400936 uint8_t *buf, int page)
Wolfgang Denk932394a2005-08-17 12:55:25 +0200937{
William Juulcfa460a2007-10-31 13:53:06 +0100938 int i, eccsize = chip->ecc.size;
939 int eccbytes = chip->ecc.bytes;
940 int eccsteps = chip->ecc.steps;
941 uint8_t *p = buf;
942 uint8_t *ecc_calc = chip->buffers->ecccalc;
943 uint8_t *ecc_code = chip->buffers->ecccode;
944 uint32_t *eccpos = chip->ecc.layout->eccpos;
Wolfgang Denk932394a2005-08-17 12:55:25 +0200945
William Juulcfa460a2007-10-31 13:53:06 +0100946 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
947 chip->ecc.hwctl(mtd, NAND_ECC_READ);
948 chip->read_buf(mtd, p, eccsize);
949 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
950 }
951 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
Wolfgang Denk932394a2005-08-17 12:55:25 +0200952
William Juulcfa460a2007-10-31 13:53:06 +0100953 for (i = 0; i < chip->ecc.total; i++)
954 ecc_code[i] = chip->oob_poi[eccpos[i]];
Wolfgang Denk932394a2005-08-17 12:55:25 +0200955
William Juulcfa460a2007-10-31 13:53:06 +0100956 eccsteps = chip->ecc.steps;
957 p = buf;
958
959 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
960 int stat;
961
962 stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
Sandeep Paulraj18b5a4b2009-11-07 14:25:03 -0500963 if (stat < 0)
William Juulcfa460a2007-10-31 13:53:06 +0100964 mtd->ecc_stats.failed++;
965 else
966 mtd->ecc_stats.corrected += stat;
967 }
968 return 0;
969}
970
971/**
Sandeep Paulrajf83b7f92009-08-10 13:27:56 -0400972 * nand_read_page_hwecc_oob_first - [REPLACABLE] hw ecc, read oob first
973 * @mtd: mtd info structure
974 * @chip: nand chip info structure
975 * @buf: buffer to store read data
Sandeep Paulraje25ee032009-11-07 14:24:50 -0500976 * @page: page number to read
Sandeep Paulrajf83b7f92009-08-10 13:27:56 -0400977 *
978 * Hardware ECC for large page chips, require OOB to be read first.
979 * For this ECC mode, the write_page method is re-used from ECC_HW.
980 * These methods read/write ECC from the OOB area, unlike the
981 * ECC_HW_SYNDROME support with multiple ECC steps, follows the
982 * "infix ECC" scheme and reads/writes ECC from the data area, by
983 * overwriting the NAND manufacturer bad block markings.
984 */
985static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd,
986 struct nand_chip *chip, uint8_t *buf, int page)
987{
988 int i, eccsize = chip->ecc.size;
989 int eccbytes = chip->ecc.bytes;
990 int eccsteps = chip->ecc.steps;
991 uint8_t *p = buf;
992 uint8_t *ecc_code = chip->buffers->ecccode;
993 uint32_t *eccpos = chip->ecc.layout->eccpos;
994 uint8_t *ecc_calc = chip->buffers->ecccalc;
995
996 /* Read the OOB area first */
997 chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
998 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
999 chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
1000
1001 for (i = 0; i < chip->ecc.total; i++)
1002 ecc_code[i] = chip->oob_poi[eccpos[i]];
1003
1004 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1005 int stat;
1006
1007 chip->ecc.hwctl(mtd, NAND_ECC_READ);
1008 chip->read_buf(mtd, p, eccsize);
1009 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
1010
1011 stat = chip->ecc.correct(mtd, p, &ecc_code[i], NULL);
1012 if (stat < 0)
1013 mtd->ecc_stats.failed++;
1014 else
1015 mtd->ecc_stats.corrected += stat;
1016 }
1017 return 0;
1018}
1019
1020/**
William Juulcfa460a2007-10-31 13:53:06 +01001021 * nand_read_page_syndrome - [REPLACABLE] hardware ecc syndrom based page read
1022 * @mtd: mtd info structure
1023 * @chip: nand chip info structure
1024 * @buf: buffer to store read data
Sandeep Paulraje25ee032009-11-07 14:24:50 -05001025 * @page: page number to read
William Juulcfa460a2007-10-31 13:53:06 +01001026 *
1027 * The hw generator calculates the error syndrome automatically. Therefor
1028 * we need a special oob layout and handling.
1029 */
1030static int nand_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
Sandeep Paulraja2c65b42009-08-10 13:27:46 -04001031 uint8_t *buf, int page)
William Juulcfa460a2007-10-31 13:53:06 +01001032{
1033 int i, eccsize = chip->ecc.size;
1034 int eccbytes = chip->ecc.bytes;
1035 int eccsteps = chip->ecc.steps;
1036 uint8_t *p = buf;
1037 uint8_t *oob = chip->oob_poi;
1038
1039 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1040 int stat;
1041
1042 chip->ecc.hwctl(mtd, NAND_ECC_READ);
1043 chip->read_buf(mtd, p, eccsize);
1044
1045 if (chip->ecc.prepad) {
1046 chip->read_buf(mtd, oob, chip->ecc.prepad);
1047 oob += chip->ecc.prepad;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001048 }
1049
William Juulcfa460a2007-10-31 13:53:06 +01001050 chip->ecc.hwctl(mtd, NAND_ECC_READSYN);
1051 chip->read_buf(mtd, oob, eccbytes);
1052 stat = chip->ecc.correct(mtd, p, oob, NULL);
1053
Scott Woodc45912d2008-10-24 16:20:43 -05001054 if (stat < 0)
William Juulcfa460a2007-10-31 13:53:06 +01001055 mtd->ecc_stats.failed++;
1056 else
1057 mtd->ecc_stats.corrected += stat;
1058
1059 oob += eccbytes;
1060
1061 if (chip->ecc.postpad) {
1062 chip->read_buf(mtd, oob, chip->ecc.postpad);
1063 oob += chip->ecc.postpad;
1064 }
1065 }
1066
1067 /* Calculate remaining oob bytes */
1068 i = mtd->oobsize - (oob - chip->oob_poi);
1069 if (i)
1070 chip->read_buf(mtd, oob, i);
1071
1072 return 0;
1073}
1074
1075/**
1076 * nand_transfer_oob - [Internal] Transfer oob to client buffer
1077 * @chip: nand chip structure
1078 * @oob: oob destination address
1079 * @ops: oob ops structure
1080 * @len: size of oob to transfer
1081 */
1082static uint8_t *nand_transfer_oob(struct nand_chip *chip, uint8_t *oob,
1083 struct mtd_oob_ops *ops, size_t len)
1084{
1085 switch(ops->mode) {
1086
1087 case MTD_OOB_PLACE:
1088 case MTD_OOB_RAW:
1089 memcpy(oob, chip->oob_poi + ops->ooboffs, len);
1090 return oob + len;
1091
1092 case MTD_OOB_AUTO: {
1093 struct nand_oobfree *free = chip->ecc.layout->oobfree;
1094 uint32_t boffs = 0, roffs = ops->ooboffs;
1095 size_t bytes = 0;
1096
1097 for(; free->length && len; free++, len -= bytes) {
1098 /* Read request not from offset 0 ? */
1099 if (unlikely(roffs)) {
1100 if (roffs >= free->length) {
1101 roffs -= free->length;
1102 continue;
1103 }
1104 boffs = free->offset + roffs;
1105 bytes = min_t(size_t, len,
1106 (free->length - roffs));
1107 roffs = 0;
1108 } else {
1109 bytes = min_t(size_t, len, free->length);
1110 boffs = free->offset;
1111 }
1112 memcpy(oob, chip->oob_poi + boffs, bytes);
1113 oob += bytes;
1114 }
1115 return oob;
1116 }
1117 default:
1118 BUG();
1119 }
1120 return NULL;
1121}
1122
1123/**
1124 * nand_do_read_ops - [Internal] Read data with ECC
1125 *
1126 * @mtd: MTD device structure
1127 * @from: offset to read from
1128 * @ops: oob ops structure
1129 *
1130 * Internal function. Called with chip held.
1131 */
1132static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
1133 struct mtd_oob_ops *ops)
1134{
1135 int chipnr, page, realpage, col, bytes, aligned;
1136 struct nand_chip *chip = mtd->priv;
1137 struct mtd_ecc_stats stats;
1138 int blkcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1;
1139 int sndcmd = 1;
1140 int ret = 0;
1141 uint32_t readlen = ops->len;
1142 uint32_t oobreadlen = ops->ooblen;
1143 uint8_t *bufpoi, *oob, *buf;
1144
1145 stats = mtd->ecc_stats;
1146
1147 chipnr = (int)(from >> chip->chip_shift);
1148 chip->select_chip(mtd, chipnr);
1149
1150 realpage = (int)(from >> chip->page_shift);
1151 page = realpage & chip->pagemask;
1152
1153 col = (int)(from & (mtd->writesize - 1));
1154
1155 buf = ops->datbuf;
1156 oob = ops->oobbuf;
1157
1158 while(1) {
Scott Wood6f2ffc32011-02-02 18:15:57 -06001159 WATCHDOG_RESET();
1160
William Juulcfa460a2007-10-31 13:53:06 +01001161 bytes = min(mtd->writesize - col, readlen);
1162 aligned = (bytes == mtd->writesize);
1163
1164 /* Is the current page in the buffer ? */
1165 if (realpage != chip->pagebuf || oob) {
1166 bufpoi = aligned ? buf : chip->buffers->databuf;
1167
1168 if (likely(sndcmd)) {
1169 chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
1170 sndcmd = 0;
1171 }
1172
1173 /* Now read the page into the buffer */
1174 if (unlikely(ops->mode == MTD_OOB_RAW))
Sandeep Paulraja2c65b42009-08-10 13:27:46 -04001175 ret = chip->ecc.read_page_raw(mtd, chip,
1176 bufpoi, page);
Scott Woodc45912d2008-10-24 16:20:43 -05001177 else if (!aligned && NAND_SUBPAGE_READ(chip) && !oob)
1178 ret = chip->ecc.read_subpage(mtd, chip, col, bytes, bufpoi);
William Juulcfa460a2007-10-31 13:53:06 +01001179 else
Sandeep Paulraja2c65b42009-08-10 13:27:46 -04001180 ret = chip->ecc.read_page(mtd, chip, bufpoi,
1181 page);
William Juulcfa460a2007-10-31 13:53:06 +01001182 if (ret < 0)
1183 break;
1184
1185 /* Transfer not aligned data */
1186 if (!aligned) {
Scott Woodc45912d2008-10-24 16:20:43 -05001187 if (!NAND_SUBPAGE_READ(chip) && !oob)
1188 chip->pagebuf = realpage;
William Juulcfa460a2007-10-31 13:53:06 +01001189 memcpy(buf, chip->buffers->databuf + col, bytes);
1190 }
1191
1192 buf += bytes;
1193
1194 if (unlikely(oob)) {
1195 /* Raw mode does data:oob:data:oob */
1196 if (ops->mode != MTD_OOB_RAW) {
1197 int toread = min(oobreadlen,
1198 chip->ecc.layout->oobavail);
1199 if (toread) {
1200 oob = nand_transfer_oob(chip,
1201 oob, ops, toread);
1202 oobreadlen -= toread;
1203 }
1204 } else
1205 buf = nand_transfer_oob(chip,
1206 buf, ops, mtd->oobsize);
1207 }
1208
1209 if (!(chip->options & NAND_NO_READRDY)) {
1210 /*
1211 * Apply delay or wait for ready/busy pin. Do
1212 * this before the AUTOINCR check, so no
1213 * problems arise if a chip which does auto
1214 * increment is marked as NOAUTOINCR by the
1215 * board driver.
1216 */
1217 if (!chip->dev_ready)
1218 udelay(chip->chip_delay);
1219 else
1220 nand_wait_ready(mtd);
Wolfgang Denk932394a2005-08-17 12:55:25 +02001221 }
1222 } else {
William Juulcfa460a2007-10-31 13:53:06 +01001223 memcpy(buf, chip->buffers->databuf + col, bytes);
1224 buf += bytes;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001225 }
1226
William Juulcfa460a2007-10-31 13:53:06 +01001227 readlen -= bytes;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001228
William Juulcfa460a2007-10-31 13:53:06 +01001229 if (!readlen)
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02001230 break;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001231
1232 /* For subsequent reads align to page boundary. */
1233 col = 0;
1234 /* Increment page address */
1235 realpage++;
1236
William Juulcfa460a2007-10-31 13:53:06 +01001237 page = realpage & chip->pagemask;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001238 /* Check, if we cross a chip boundary */
1239 if (!page) {
1240 chipnr++;
William Juulcfa460a2007-10-31 13:53:06 +01001241 chip->select_chip(mtd, -1);
1242 chip->select_chip(mtd, chipnr);
Wolfgang Denk932394a2005-08-17 12:55:25 +02001243 }
William Juulcfa460a2007-10-31 13:53:06 +01001244
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02001245 /* Check, if the chip supports auto page increment
1246 * or if we have hit a block boundary.
William Juulcfa460a2007-10-31 13:53:06 +01001247 */
1248 if (!NAND_CANAUTOINCR(chip) || !(page & blkcheck))
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02001249 sndcmd = 1;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001250 }
1251
William Juulcfa460a2007-10-31 13:53:06 +01001252 ops->retlen = ops->len - (size_t) readlen;
1253 if (oob)
1254 ops->oobretlen = ops->ooblen - oobreadlen;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001255
William Juulcfa460a2007-10-31 13:53:06 +01001256 if (ret)
1257 return ret;
1258
1259 if (mtd->ecc_stats.failed - stats.failed)
1260 return -EBADMSG;
1261
Wolfgang Denkd1a24f02011-02-02 22:36:10 +01001262 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001263}
1264
1265/**
William Juulcfa460a2007-10-31 13:53:06 +01001266 * nand_read - [MTD Interface] MTD compability function for nand_do_read_ecc
Wolfgang Denk932394a2005-08-17 12:55:25 +02001267 * @mtd: MTD device structure
1268 * @from: offset to read from
1269 * @len: number of bytes to read
1270 * @retlen: pointer to variable to store the number of read bytes
1271 * @buf: the databuffer to put data
1272 *
William Juulcfa460a2007-10-31 13:53:06 +01001273 * Get hold of the chip and call nand_do_read
Wolfgang Denk932394a2005-08-17 12:55:25 +02001274 */
William Juulcfa460a2007-10-31 13:53:06 +01001275static int nand_read(struct mtd_info *mtd, loff_t from, size_t len,
1276 size_t *retlen, uint8_t *buf)
Wolfgang Denk932394a2005-08-17 12:55:25 +02001277{
William Juulcfa460a2007-10-31 13:53:06 +01001278 struct nand_chip *chip = mtd->priv;
1279 int ret;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001280
1281 /* Do not allow reads past end of device */
William Juulcfa460a2007-10-31 13:53:06 +01001282 if ((from + len) > mtd->size)
Wolfgang Denk932394a2005-08-17 12:55:25 +02001283 return -EINVAL;
William Juulcfa460a2007-10-31 13:53:06 +01001284 if (!len)
1285 return 0;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001286
William Juulcfa460a2007-10-31 13:53:06 +01001287 nand_get_device(chip, mtd, FL_READING);
Wolfgang Denk932394a2005-08-17 12:55:25 +02001288
William Juulcfa460a2007-10-31 13:53:06 +01001289 chip->ops.len = len;
1290 chip->ops.datbuf = buf;
1291 chip->ops.oobbuf = NULL;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001292
William Juulcfa460a2007-10-31 13:53:06 +01001293 ret = nand_do_read_ops(mtd, from, &chip->ops);
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02001294
William Juulcfa460a2007-10-31 13:53:06 +01001295 *retlen = chip->ops.retlen;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001296
Wolfgang Denk932394a2005-08-17 12:55:25 +02001297 nand_release_device(mtd);
1298
1299 return ret;
1300}
1301
William Juulcfa460a2007-10-31 13:53:06 +01001302/**
1303 * nand_read_oob_std - [REPLACABLE] the most common OOB data read function
1304 * @mtd: mtd info structure
1305 * @chip: nand chip info structure
1306 * @page: page number to read
1307 * @sndcmd: flag whether to issue read command or not
1308 */
1309static int nand_read_oob_std(struct mtd_info *mtd, struct nand_chip *chip,
1310 int page, int sndcmd)
1311{
1312 if (sndcmd) {
1313 chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
1314 sndcmd = 0;
1315 }
1316 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
1317 return sndcmd;
1318}
Wolfgang Denk932394a2005-08-17 12:55:25 +02001319
1320/**
William Juulcfa460a2007-10-31 13:53:06 +01001321 * nand_read_oob_syndrome - [REPLACABLE] OOB data read function for HW ECC
1322 * with syndromes
1323 * @mtd: mtd info structure
1324 * @chip: nand chip info structure
1325 * @page: page number to read
1326 * @sndcmd: flag whether to issue read command or not
1327 */
1328static int nand_read_oob_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
1329 int page, int sndcmd)
1330{
1331 uint8_t *buf = chip->oob_poi;
1332 int length = mtd->oobsize;
1333 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
1334 int eccsize = chip->ecc.size;
1335 uint8_t *bufpoi = buf;
1336 int i, toread, sndrnd = 0, pos;
1337
1338 chip->cmdfunc(mtd, NAND_CMD_READ0, chip->ecc.size, page);
1339 for (i = 0; i < chip->ecc.steps; i++) {
1340 if (sndrnd) {
1341 pos = eccsize + i * (eccsize + chunk);
1342 if (mtd->writesize > 512)
1343 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, pos, -1);
1344 else
1345 chip->cmdfunc(mtd, NAND_CMD_READ0, pos, page);
1346 } else
1347 sndrnd = 1;
1348 toread = min_t(int, length, chunk);
1349 chip->read_buf(mtd, bufpoi, toread);
1350 bufpoi += toread;
1351 length -= toread;
1352 }
1353 if (length > 0)
1354 chip->read_buf(mtd, bufpoi, length);
1355
1356 return 1;
1357}
1358
1359/**
1360 * nand_write_oob_std - [REPLACABLE] the most common OOB data write function
1361 * @mtd: mtd info structure
1362 * @chip: nand chip info structure
1363 * @page: page number to write
1364 */
1365static int nand_write_oob_std(struct mtd_info *mtd, struct nand_chip *chip,
1366 int page)
1367{
1368 int status = 0;
1369 const uint8_t *buf = chip->oob_poi;
1370 int length = mtd->oobsize;
1371
1372 chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize, page);
1373 chip->write_buf(mtd, buf, length);
1374 /* Send command to program the OOB data */
1375 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1376
1377 status = chip->waitfunc(mtd, chip);
1378
1379 return status & NAND_STATUS_FAIL ? -EIO : 0;
1380}
1381
1382/**
1383 * nand_write_oob_syndrome - [REPLACABLE] OOB data write function for HW ECC
1384 * with syndrome - only for large page flash !
1385 * @mtd: mtd info structure
1386 * @chip: nand chip info structure
1387 * @page: page number to write
1388 */
1389static int nand_write_oob_syndrome(struct mtd_info *mtd,
1390 struct nand_chip *chip, int page)
1391{
1392 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
1393 int eccsize = chip->ecc.size, length = mtd->oobsize;
1394 int i, len, pos, status = 0, sndcmd = 0, steps = chip->ecc.steps;
1395 const uint8_t *bufpoi = chip->oob_poi;
1396
1397 /*
1398 * data-ecc-data-ecc ... ecc-oob
1399 * or
1400 * data-pad-ecc-pad-data-pad .... ecc-pad-oob
1401 */
1402 if (!chip->ecc.prepad && !chip->ecc.postpad) {
1403 pos = steps * (eccsize + chunk);
1404 steps = 0;
1405 } else
1406 pos = eccsize;
1407
1408 chip->cmdfunc(mtd, NAND_CMD_SEQIN, pos, page);
1409 for (i = 0; i < steps; i++) {
1410 if (sndcmd) {
1411 if (mtd->writesize <= 512) {
1412 uint32_t fill = 0xFFFFFFFF;
1413
1414 len = eccsize;
1415 while (len > 0) {
1416 int num = min_t(int, len, 4);
1417 chip->write_buf(mtd, (uint8_t *)&fill,
1418 num);
1419 len -= num;
1420 }
1421 } else {
1422 pos = eccsize + i * (eccsize + chunk);
1423 chip->cmdfunc(mtd, NAND_CMD_RNDIN, pos, -1);
1424 }
1425 } else
1426 sndcmd = 1;
1427 len = min_t(int, length, chunk);
1428 chip->write_buf(mtd, bufpoi, len);
1429 bufpoi += len;
1430 length -= len;
1431 }
1432 if (length > 0)
1433 chip->write_buf(mtd, bufpoi, length);
1434
1435 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1436 status = chip->waitfunc(mtd, chip);
1437
1438 return status & NAND_STATUS_FAIL ? -EIO : 0;
1439}
1440
1441/**
1442 * nand_do_read_oob - [Intern] NAND read out-of-band
1443 * @mtd: MTD device structure
1444 * @from: offset to read from
1445 * @ops: oob operations description structure
1446 *
1447 * NAND read out-of-band data from the spare area
1448 */
1449static int nand_do_read_oob(struct mtd_info *mtd, loff_t from,
1450 struct mtd_oob_ops *ops)
1451{
1452 int page, realpage, chipnr, sndcmd = 1;
1453 struct nand_chip *chip = mtd->priv;
1454 int blkcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1;
1455 int readlen = ops->ooblen;
1456 int len;
1457 uint8_t *buf = ops->oobbuf;
1458
1459 MTDDEBUG (MTD_DEBUG_LEVEL3, "nand_read_oob: from = 0x%08Lx, len = %i\n",
Wolfgang Denkd1a24f02011-02-02 22:36:10 +01001460 (unsigned long long)from, readlen);
William Juulcfa460a2007-10-31 13:53:06 +01001461
1462 if (ops->mode == MTD_OOB_AUTO)
1463 len = chip->ecc.layout->oobavail;
1464 else
1465 len = mtd->oobsize;
1466
1467 if (unlikely(ops->ooboffs >= len)) {
1468 MTDDEBUG (MTD_DEBUG_LEVEL0, "nand_read_oob: "
Wolfgang Denkd1a24f02011-02-02 22:36:10 +01001469 "Attempt to start read outside oob\n");
William Juulcfa460a2007-10-31 13:53:06 +01001470 return -EINVAL;
1471 }
1472
1473 /* Do not allow reads past end of device */
1474 if (unlikely(from >= mtd->size ||
1475 ops->ooboffs + readlen > ((mtd->size >> chip->page_shift) -
1476 (from >> chip->page_shift)) * len)) {
1477 MTDDEBUG (MTD_DEBUG_LEVEL0, "nand_read_oob: "
Wolfgang Denkd1a24f02011-02-02 22:36:10 +01001478 "Attempt read beyond end of device\n");
William Juulcfa460a2007-10-31 13:53:06 +01001479 return -EINVAL;
1480 }
1481
1482 chipnr = (int)(from >> chip->chip_shift);
1483 chip->select_chip(mtd, chipnr);
1484
1485 /* Shift to get page */
1486 realpage = (int)(from >> chip->page_shift);
1487 page = realpage & chip->pagemask;
1488
1489 while(1) {
Scott Wood6f2ffc32011-02-02 18:15:57 -06001490 WATCHDOG_RESET();
William Juulcfa460a2007-10-31 13:53:06 +01001491 sndcmd = chip->ecc.read_oob(mtd, chip, page, sndcmd);
1492
1493 len = min(len, readlen);
1494 buf = nand_transfer_oob(chip, buf, ops, len);
1495
1496 if (!(chip->options & NAND_NO_READRDY)) {
1497 /*
1498 * Apply delay or wait for ready/busy pin. Do this
1499 * before the AUTOINCR check, so no problems arise if a
1500 * chip which does auto increment is marked as
1501 * NOAUTOINCR by the board driver.
1502 */
1503 if (!chip->dev_ready)
1504 udelay(chip->chip_delay);
1505 else
1506 nand_wait_ready(mtd);
1507 }
1508
1509 readlen -= len;
1510 if (!readlen)
1511 break;
1512
1513 /* Increment page address */
1514 realpage++;
1515
1516 page = realpage & chip->pagemask;
1517 /* Check, if we cross a chip boundary */
1518 if (!page) {
1519 chipnr++;
1520 chip->select_chip(mtd, -1);
1521 chip->select_chip(mtd, chipnr);
1522 }
1523
1524 /* Check, if the chip supports auto page increment
1525 * or if we have hit a block boundary.
1526 */
1527 if (!NAND_CANAUTOINCR(chip) || !(page & blkcheck))
1528 sndcmd = 1;
1529 }
1530
1531 ops->oobretlen = ops->ooblen;
1532 return 0;
1533}
1534
1535/**
1536 * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band
1537 * @mtd: MTD device structure
1538 * @from: offset to read from
1539 * @ops: oob operation description structure
1540 *
1541 * NAND read data and/or out-of-band data
1542 */
1543static int nand_read_oob(struct mtd_info *mtd, loff_t from,
1544 struct mtd_oob_ops *ops)
1545{
1546 struct nand_chip *chip = mtd->priv;
1547 int ret = -ENOTSUPP;
1548
1549 ops->retlen = 0;
1550
1551 /* Do not allow reads past end of device */
1552 if (ops->datbuf && (from + ops->len) > mtd->size) {
1553 MTDDEBUG (MTD_DEBUG_LEVEL0, "nand_read_oob: "
Wolfgang Denkd1a24f02011-02-02 22:36:10 +01001554 "Attempt read beyond end of device\n");
William Juulcfa460a2007-10-31 13:53:06 +01001555 return -EINVAL;
1556 }
1557
1558 nand_get_device(chip, mtd, FL_READING);
1559
1560 switch(ops->mode) {
1561 case MTD_OOB_PLACE:
1562 case MTD_OOB_AUTO:
1563 case MTD_OOB_RAW:
1564 break;
1565
1566 default:
1567 goto out;
1568 }
1569
1570 if (!ops->datbuf)
1571 ret = nand_do_read_oob(mtd, from, ops);
1572 else
1573 ret = nand_do_read_ops(mtd, from, ops);
1574
1575 out:
1576 nand_release_device(mtd);
1577 return ret;
1578}
1579
1580
1581/**
1582 * nand_write_page_raw - [Intern] raw page write function
1583 * @mtd: mtd info structure
1584 * @chip: nand chip info structure
1585 * @buf: data buffer
David Brownell7e866612009-11-07 16:27:01 -05001586 *
1587 * Not for syndrome calculating ecc controllers, which use a special oob layout
William Juulcfa460a2007-10-31 13:53:06 +01001588 */
1589static void nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
1590 const uint8_t *buf)
1591{
1592 chip->write_buf(mtd, buf, mtd->writesize);
1593 chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
1594}
1595
1596/**
David Brownell7e866612009-11-07 16:27:01 -05001597 * nand_write_page_raw_syndrome - [Intern] raw page write function
1598 * @mtd: mtd info structure
1599 * @chip: nand chip info structure
1600 * @buf: data buffer
1601 *
1602 * We need a special oob layout and handling even when ECC isn't checked.
1603 */
1604static void nand_write_page_raw_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
1605 const uint8_t *buf)
1606{
1607 int eccsize = chip->ecc.size;
1608 int eccbytes = chip->ecc.bytes;
1609 uint8_t *oob = chip->oob_poi;
1610 int steps, size;
1611
1612 for (steps = chip->ecc.steps; steps > 0; steps--) {
1613 chip->write_buf(mtd, buf, eccsize);
1614 buf += eccsize;
1615
1616 if (chip->ecc.prepad) {
1617 chip->write_buf(mtd, oob, chip->ecc.prepad);
1618 oob += chip->ecc.prepad;
1619 }
1620
1621 chip->read_buf(mtd, oob, eccbytes);
1622 oob += eccbytes;
1623
1624 if (chip->ecc.postpad) {
1625 chip->write_buf(mtd, oob, chip->ecc.postpad);
1626 oob += chip->ecc.postpad;
1627 }
1628 }
1629
1630 size = mtd->oobsize - (oob - chip->oob_poi);
1631 if (size)
1632 chip->write_buf(mtd, oob, size);
1633}
1634/**
William Juulcfa460a2007-10-31 13:53:06 +01001635 * nand_write_page_swecc - [REPLACABLE] software ecc based page write function
1636 * @mtd: mtd info structure
1637 * @chip: nand chip info structure
1638 * @buf: data buffer
1639 */
1640static void nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
1641 const uint8_t *buf)
1642{
1643 int i, eccsize = chip->ecc.size;
1644 int eccbytes = chip->ecc.bytes;
1645 int eccsteps = chip->ecc.steps;
1646 uint8_t *ecc_calc = chip->buffers->ecccalc;
1647 const uint8_t *p = buf;
1648 uint32_t *eccpos = chip->ecc.layout->eccpos;
1649
1650 /* Software ecc calculation */
1651 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)
1652 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
1653
1654 for (i = 0; i < chip->ecc.total; i++)
1655 chip->oob_poi[eccpos[i]] = ecc_calc[i];
1656
1657 chip->ecc.write_page_raw(mtd, chip, buf);
1658}
1659
1660/**
1661 * nand_write_page_hwecc - [REPLACABLE] hardware ecc based page write function
1662 * @mtd: mtd info structure
1663 * @chip: nand chip info structure
1664 * @buf: data buffer
1665 */
1666static void nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
1667 const uint8_t *buf)
1668{
1669 int i, eccsize = chip->ecc.size;
1670 int eccbytes = chip->ecc.bytes;
1671 int eccsteps = chip->ecc.steps;
1672 uint8_t *ecc_calc = chip->buffers->ecccalc;
1673 const uint8_t *p = buf;
1674 uint32_t *eccpos = chip->ecc.layout->eccpos;
1675
1676 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1677 chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
1678 chip->write_buf(mtd, p, eccsize);
1679 chip->ecc.calculate(mtd, p, &ecc_calc[i]);
1680 }
1681
1682 for (i = 0; i < chip->ecc.total; i++)
1683 chip->oob_poi[eccpos[i]] = ecc_calc[i];
1684
1685 chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
1686}
1687
1688/**
1689 * nand_write_page_syndrome - [REPLACABLE] hardware ecc syndrom based page write
1690 * @mtd: mtd info structure
1691 * @chip: nand chip info structure
1692 * @buf: data buffer
1693 *
1694 * The hw generator calculates the error syndrome automatically. Therefor
1695 * we need a special oob layout and handling.
1696 */
1697static void nand_write_page_syndrome(struct mtd_info *mtd,
1698 struct nand_chip *chip, const uint8_t *buf)
1699{
1700 int i, eccsize = chip->ecc.size;
1701 int eccbytes = chip->ecc.bytes;
1702 int eccsteps = chip->ecc.steps;
1703 const uint8_t *p = buf;
1704 uint8_t *oob = chip->oob_poi;
1705
1706 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
1707
1708 chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
1709 chip->write_buf(mtd, p, eccsize);
1710
1711 if (chip->ecc.prepad) {
1712 chip->write_buf(mtd, oob, chip->ecc.prepad);
1713 oob += chip->ecc.prepad;
1714 }
1715
1716 chip->ecc.calculate(mtd, p, oob);
1717 chip->write_buf(mtd, oob, eccbytes);
1718 oob += eccbytes;
1719
1720 if (chip->ecc.postpad) {
1721 chip->write_buf(mtd, oob, chip->ecc.postpad);
1722 oob += chip->ecc.postpad;
1723 }
1724 }
1725
1726 /* Calculate remaining oob bytes */
1727 i = mtd->oobsize - (oob - chip->oob_poi);
1728 if (i)
1729 chip->write_buf(mtd, oob, i);
1730}
1731
1732/**
1733 * nand_write_page - [REPLACEABLE] write one page
1734 * @mtd: MTD device structure
1735 * @chip: NAND chip descriptor
1736 * @buf: the data to write
1737 * @page: page number to write
1738 * @cached: cached programming
1739 * @raw: use _raw version of write_page
1740 */
1741static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
1742 const uint8_t *buf, int page, int cached, int raw)
1743{
1744 int status;
1745
1746 chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);
1747
1748 if (unlikely(raw))
1749 chip->ecc.write_page_raw(mtd, chip, buf);
1750 else
1751 chip->ecc.write_page(mtd, chip, buf);
1752
1753 /*
1754 * Cached progamming disabled for now, Not sure if its worth the
1755 * trouble. The speed gain is not very impressive. (2.3->2.6Mib/s)
1756 */
1757 cached = 0;
1758
1759 if (!cached || !(chip->options & NAND_CACHEPRG)) {
1760
1761 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1762 status = chip->waitfunc(mtd, chip);
1763 /*
1764 * See if operation failed and additional status checks are
1765 * available
1766 */
1767 if ((status & NAND_STATUS_FAIL) && (chip->errstat))
1768 status = chip->errstat(mtd, chip, FL_WRITING, status,
1769 page);
1770
1771 if (status & NAND_STATUS_FAIL)
1772 return -EIO;
1773 } else {
1774 chip->cmdfunc(mtd, NAND_CMD_CACHEDPROG, -1, -1);
1775 status = chip->waitfunc(mtd, chip);
1776 }
1777
1778#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
1779 /* Send command to read back the data */
1780 chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
1781
1782 if (chip->verify_buf(mtd, buf, mtd->writesize))
1783 return -EIO;
1784#endif
1785 return 0;
1786}
1787
1788/**
1789 * nand_fill_oob - [Internal] Transfer client buffer to oob
1790 * @chip: nand chip structure
1791 * @oob: oob data buffer
1792 * @ops: oob ops structure
1793 */
1794static uint8_t *nand_fill_oob(struct nand_chip *chip, uint8_t *oob,
1795 struct mtd_oob_ops *ops)
1796{
1797 size_t len = ops->ooblen;
1798
1799 switch(ops->mode) {
1800
1801 case MTD_OOB_PLACE:
1802 case MTD_OOB_RAW:
1803 memcpy(chip->oob_poi + ops->ooboffs, oob, len);
1804 return oob + len;
1805
1806 case MTD_OOB_AUTO: {
1807 struct nand_oobfree *free = chip->ecc.layout->oobfree;
1808 uint32_t boffs = 0, woffs = ops->ooboffs;
1809 size_t bytes = 0;
1810
1811 for(; free->length && len; free++, len -= bytes) {
1812 /* Write request not from offset 0 ? */
1813 if (unlikely(woffs)) {
1814 if (woffs >= free->length) {
1815 woffs -= free->length;
1816 continue;
1817 }
1818 boffs = free->offset + woffs;
1819 bytes = min_t(size_t, len,
1820 (free->length - woffs));
1821 woffs = 0;
1822 } else {
1823 bytes = min_t(size_t, len, free->length);
1824 boffs = free->offset;
1825 }
1826 memcpy(chip->oob_poi + boffs, oob, bytes);
1827 oob += bytes;
1828 }
1829 return oob;
1830 }
1831 default:
1832 BUG();
1833 }
1834 return NULL;
1835}
1836
1837#define NOTALIGNED(x) (x & (chip->subpagesize - 1)) != 0
1838
1839/**
1840 * nand_do_write_ops - [Internal] NAND write with ECC
1841 * @mtd: MTD device structure
1842 * @to: offset to write to
1843 * @ops: oob operations description structure
1844 *
1845 * NAND write with ECC
1846 */
1847static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,
1848 struct mtd_oob_ops *ops)
1849{
1850 int chipnr, realpage, page, blockmask, column;
1851 struct nand_chip *chip = mtd->priv;
1852 uint32_t writelen = ops->len;
1853 uint8_t *oob = ops->oobbuf;
1854 uint8_t *buf = ops->datbuf;
1855 int ret, subpage;
1856
1857 ops->retlen = 0;
1858 if (!writelen)
1859 return 0;
1860
William Juulcfa460a2007-10-31 13:53:06 +01001861 column = to & (mtd->writesize - 1);
1862 subpage = column || (writelen & (mtd->writesize - 1));
1863
1864 if (subpage && oob)
1865 return -EINVAL;
1866
1867 chipnr = (int)(to >> chip->chip_shift);
1868 chip->select_chip(mtd, chipnr);
1869
1870 /* Check, if it is write protected */
1871 if (nand_check_wp(mtd)) {
1872 printk (KERN_NOTICE "nand_do_write_ops: Device is write protected\n");
1873 return -EIO;
1874 }
1875
1876 realpage = (int)(to >> chip->page_shift);
1877 page = realpage & chip->pagemask;
1878 blockmask = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1;
1879
1880 /* Invalidate the page cache, when we write to the cached page */
1881 if (to <= (chip->pagebuf << chip->page_shift) &&
1882 (chip->pagebuf << chip->page_shift) < (to + ops->len))
1883 chip->pagebuf = -1;
1884
1885 /* If we're not given explicit OOB data, let it be 0xFF */
1886 if (likely(!oob))
1887 memset(chip->oob_poi, 0xff, mtd->oobsize);
1888
1889 while(1) {
Scott Wood6f2ffc32011-02-02 18:15:57 -06001890 WATCHDOG_RESET();
1891
William Juulcfa460a2007-10-31 13:53:06 +01001892 int bytes = mtd->writesize;
1893 int cached = writelen > bytes && page != blockmask;
1894 uint8_t *wbuf = buf;
1895
1896 /* Partial page write ? */
1897 if (unlikely(column || writelen < (mtd->writesize - 1))) {
1898 cached = 0;
1899 bytes = min_t(int, bytes - column, (int) writelen);
1900 chip->pagebuf = -1;
1901 memset(chip->buffers->databuf, 0xff, mtd->writesize);
1902 memcpy(&chip->buffers->databuf[column], buf, bytes);
1903 wbuf = chip->buffers->databuf;
1904 }
1905
1906 if (unlikely(oob))
1907 oob = nand_fill_oob(chip, oob, ops);
1908
1909 ret = chip->write_page(mtd, chip, wbuf, page, cached,
1910 (ops->mode == MTD_OOB_RAW));
1911 if (ret)
1912 break;
1913
1914 writelen -= bytes;
1915 if (!writelen)
1916 break;
1917
1918 column = 0;
1919 buf += bytes;
1920 realpage++;
1921
1922 page = realpage & chip->pagemask;
1923 /* Check, if we cross a chip boundary */
1924 if (!page) {
1925 chipnr++;
1926 chip->select_chip(mtd, -1);
1927 chip->select_chip(mtd, chipnr);
1928 }
1929 }
1930
1931 ops->retlen = ops->len - writelen;
1932 if (unlikely(oob))
1933 ops->oobretlen = ops->ooblen;
1934 return ret;
1935}
1936
1937/**
1938 * nand_write - [MTD Interface] NAND write with ECC
Wolfgang Denk932394a2005-08-17 12:55:25 +02001939 * @mtd: MTD device structure
1940 * @to: offset to write to
1941 * @len: number of bytes to write
1942 * @retlen: pointer to variable to store the number of written bytes
1943 * @buf: the data to write
1944 *
William Juulcfa460a2007-10-31 13:53:06 +01001945 * NAND write with ECC
1946 */
1947static int nand_write(struct mtd_info *mtd, loff_t to, size_t len,
1948 size_t *retlen, const uint8_t *buf)
1949{
1950 struct nand_chip *chip = mtd->priv;
1951 int ret;
1952
Ben Gardinerbee038e2011-05-24 10:18:34 -04001953 /* Do not allow writes past end of device */
William Juulcfa460a2007-10-31 13:53:06 +01001954 if ((to + len) > mtd->size)
1955 return -EINVAL;
1956 if (!len)
1957 return 0;
1958
1959 nand_get_device(chip, mtd, FL_WRITING);
1960
1961 chip->ops.len = len;
1962 chip->ops.datbuf = (uint8_t *)buf;
1963 chip->ops.oobbuf = NULL;
1964
1965 ret = nand_do_write_ops(mtd, to, &chip->ops);
1966
1967 *retlen = chip->ops.retlen;
1968
1969 nand_release_device(mtd);
1970
1971 return ret;
1972}
1973
1974/**
1975 * nand_do_write_oob - [MTD Interface] NAND write out-of-band
1976 * @mtd: MTD device structure
1977 * @to: offset to write to
1978 * @ops: oob operation description structure
1979 *
Wolfgang Denk932394a2005-08-17 12:55:25 +02001980 * NAND write out-of-band
1981 */
William Juulcfa460a2007-10-31 13:53:06 +01001982static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
1983 struct mtd_oob_ops *ops)
Wolfgang Denk932394a2005-08-17 12:55:25 +02001984{
William Juulcfa460a2007-10-31 13:53:06 +01001985 int chipnr, page, status, len;
1986 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001987
Scott Wood3167c532008-06-20 12:38:57 -05001988 MTDDEBUG (MTD_DEBUG_LEVEL3, "nand_write_oob: to = 0x%08x, len = %i\n",
Wolfgang Denkd1a24f02011-02-02 22:36:10 +01001989 (unsigned int)to, (int)ops->ooblen);
Wolfgang Denk932394a2005-08-17 12:55:25 +02001990
William Juulcfa460a2007-10-31 13:53:06 +01001991 if (ops->mode == MTD_OOB_AUTO)
1992 len = chip->ecc.layout->oobavail;
1993 else
1994 len = mtd->oobsize;
Wolfgang Denk932394a2005-08-17 12:55:25 +02001995
1996 /* Do not allow write past end of page */
William Juulcfa460a2007-10-31 13:53:06 +01001997 if ((ops->ooboffs + ops->ooblen) > len) {
Scott Wood3167c532008-06-20 12:38:57 -05001998 MTDDEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: "
Wolfgang Denkd1a24f02011-02-02 22:36:10 +01001999 "Attempt to write past end of page\n");
Wolfgang Denk932394a2005-08-17 12:55:25 +02002000 return -EINVAL;
2001 }
2002
William Juulcfa460a2007-10-31 13:53:06 +01002003 if (unlikely(ops->ooboffs >= len)) {
2004 MTDDEBUG (MTD_DEBUG_LEVEL0, "nand_read_oob: "
Wolfgang Denkd1a24f02011-02-02 22:36:10 +01002005 "Attempt to start write outside oob\n");
Wolfgang Denk932394a2005-08-17 12:55:25 +02002006 return -EINVAL;
2007 }
2008
William Juulcfa460a2007-10-31 13:53:06 +01002009 /* Do not allow reads past end of device */
2010 if (unlikely(to >= mtd->size ||
2011 ops->ooboffs + ops->ooblen >
2012 ((mtd->size >> chip->page_shift) -
2013 (to >> chip->page_shift)) * len)) {
2014 MTDDEBUG (MTD_DEBUG_LEVEL0, "nand_read_oob: "
Wolfgang Denkd1a24f02011-02-02 22:36:10 +01002015 "Attempt write beyond end of device\n");
Wolfgang Denk932394a2005-08-17 12:55:25 +02002016 return -EINVAL;
2017 }
2018
William Juulcfa460a2007-10-31 13:53:06 +01002019 chipnr = (int)(to >> chip->chip_shift);
2020 chip->select_chip(mtd, chipnr);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002021
William Juulcfa460a2007-10-31 13:53:06 +01002022 /* Shift to get page */
2023 page = (int)(to >> chip->page_shift);
2024
2025 /*
2026 * Reset the chip. Some chips (like the Toshiba TC5832DC found in one
2027 * of my DiskOnChip 2000 test units) will clear the whole data page too
2028 * if we don't do this. I have no clue why, but I seem to have 'fixed'
2029 * it in the doc2000 driver in August 1999. dwmw2.
2030 */
2031 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002032
2033 /* Check, if it is write protected */
2034 if (nand_check_wp(mtd))
William Juulcfa460a2007-10-31 13:53:06 +01002035 return -EROFS;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002036
Wolfgang Denk932394a2005-08-17 12:55:25 +02002037 /* Invalidate the page cache, if we write to the cached page */
William Juulcfa460a2007-10-31 13:53:06 +01002038 if (page == chip->pagebuf)
2039 chip->pagebuf = -1;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002040
William Juulcfa460a2007-10-31 13:53:06 +01002041 memset(chip->oob_poi, 0xff, mtd->oobsize);
2042 nand_fill_oob(chip, ops->oobbuf, ops);
2043 status = chip->ecc.write_oob(mtd, chip, page & chip->pagemask);
2044 memset(chip->oob_poi, 0xff, mtd->oobsize);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002045
William Juulcfa460a2007-10-31 13:53:06 +01002046 if (status)
2047 return status;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002048
William Juulcfa460a2007-10-31 13:53:06 +01002049 ops->oobretlen = ops->ooblen;
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02002050
William Juulcfa460a2007-10-31 13:53:06 +01002051 return 0;
2052}
Wolfgang Denk932394a2005-08-17 12:55:25 +02002053
William Juulcfa460a2007-10-31 13:53:06 +01002054/**
2055 * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band
2056 * @mtd: MTD device structure
2057 * @to: offset to write to
2058 * @ops: oob operation description structure
2059 */
2060static int nand_write_oob(struct mtd_info *mtd, loff_t to,
2061 struct mtd_oob_ops *ops)
2062{
2063 struct nand_chip *chip = mtd->priv;
2064 int ret = -ENOTSUPP;
2065
2066 ops->retlen = 0;
2067
2068 /* Do not allow writes past end of device */
2069 if (ops->datbuf && (to + ops->len) > mtd->size) {
2070 MTDDEBUG (MTD_DEBUG_LEVEL0, "nand_read_oob: "
Wolfgang Denkd1a24f02011-02-02 22:36:10 +01002071 "Attempt read beyond end of device\n");
William Juulcfa460a2007-10-31 13:53:06 +01002072 return -EINVAL;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002073 }
Wolfgang Denk932394a2005-08-17 12:55:25 +02002074
William Juulcfa460a2007-10-31 13:53:06 +01002075 nand_get_device(chip, mtd, FL_WRITING);
2076
2077 switch(ops->mode) {
2078 case MTD_OOB_PLACE:
2079 case MTD_OOB_AUTO:
2080 case MTD_OOB_RAW:
2081 break;
2082
2083 default:
2084 goto out;
2085 }
2086
2087 if (!ops->datbuf)
2088 ret = nand_do_write_oob(mtd, to, ops);
2089 else
2090 ret = nand_do_write_ops(mtd, to, ops);
2091
2092 out:
2093 nand_release_device(mtd);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002094 return ret;
2095}
Wolfgang Denk932394a2005-08-17 12:55:25 +02002096
2097/**
2098 * single_erease_cmd - [GENERIC] NAND standard block erase command function
2099 * @mtd: MTD device structure
2100 * @page: the page address of the block which will be erased
2101 *
2102 * Standard erase command for NAND chips
2103 */
William Juulcfa460a2007-10-31 13:53:06 +01002104static void single_erase_cmd(struct mtd_info *mtd, int page)
Wolfgang Denk932394a2005-08-17 12:55:25 +02002105{
William Juulcfa460a2007-10-31 13:53:06 +01002106 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002107 /* Send commands to erase a block */
William Juulcfa460a2007-10-31 13:53:06 +01002108 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
2109 chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002110}
2111
2112/**
2113 * multi_erease_cmd - [GENERIC] AND specific block erase command function
2114 * @mtd: MTD device structure
2115 * @page: the page address of the block which will be erased
2116 *
2117 * AND multi block erase command function
2118 * Erase 4 consecutive blocks
2119 */
William Juulcfa460a2007-10-31 13:53:06 +01002120static void multi_erase_cmd(struct mtd_info *mtd, int page)
Wolfgang Denk932394a2005-08-17 12:55:25 +02002121{
William Juulcfa460a2007-10-31 13:53:06 +01002122 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002123 /* Send commands to erase a block */
William Juulcfa460a2007-10-31 13:53:06 +01002124 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++);
2125 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++);
2126 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++);
2127 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
2128 chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002129}
2130
2131/**
2132 * nand_erase - [MTD Interface] erase block(s)
2133 * @mtd: MTD device structure
2134 * @instr: erase instruction
2135 *
2136 * Erase one ore more blocks
2137 */
William Juulcfa460a2007-10-31 13:53:06 +01002138static int nand_erase(struct mtd_info *mtd, struct erase_info *instr)
Wolfgang Denk932394a2005-08-17 12:55:25 +02002139{
William Juulcfa460a2007-10-31 13:53:06 +01002140 return nand_erase_nand(mtd, instr, 0);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002141}
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02002142
William Juulcfa460a2007-10-31 13:53:06 +01002143#define BBT_PAGE_MASK 0xffffff3f
Wolfgang Denk932394a2005-08-17 12:55:25 +02002144/**
William Juulcfa460a2007-10-31 13:53:06 +01002145 * nand_erase_nand - [Internal] erase block(s)
Wolfgang Denk932394a2005-08-17 12:55:25 +02002146 * @mtd: MTD device structure
2147 * @instr: erase instruction
2148 * @allowbbt: allow erasing the bbt area
2149 *
2150 * Erase one ore more blocks
2151 */
William Juulcfa460a2007-10-31 13:53:06 +01002152int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
2153 int allowbbt)
Wolfgang Denk932394a2005-08-17 12:55:25 +02002154{
Sandeep Paulrajaaa8eec2009-10-30 13:51:23 -04002155 int page, status, pages_per_block, ret, chipnr;
William Juulcfa460a2007-10-31 13:53:06 +01002156 struct nand_chip *chip = mtd->priv;
Sandeep Paulrajaaa8eec2009-10-30 13:51:23 -04002157 loff_t rewrite_bbt[CONFIG_SYS_NAND_MAX_CHIPS] = {0};
William Juulcfa460a2007-10-31 13:53:06 +01002158 unsigned int bbt_masked_page = 0xffffffff;
Sandeep Paulrajaaa8eec2009-10-30 13:51:23 -04002159 loff_t len;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002160
Sandeep Paulrajaaa8eec2009-10-30 13:51:23 -04002161 MTDDEBUG(MTD_DEBUG_LEVEL3, "nand_erase: start = 0x%012llx, "
2162 "len = %llu\n", (unsigned long long) instr->addr,
2163 (unsigned long long) instr->len);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002164
2165 /* Start address must align on block boundary */
William Juulcfa460a2007-10-31 13:53:06 +01002166 if (instr->addr & ((1 << chip->phys_erase_shift) - 1)) {
Scott Wood3167c532008-06-20 12:38:57 -05002167 MTDDEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Unaligned address\n");
Wolfgang Denk932394a2005-08-17 12:55:25 +02002168 return -EINVAL;
2169 }
2170
2171 /* Length must align on block boundary */
William Juulcfa460a2007-10-31 13:53:06 +01002172 if (instr->len & ((1 << chip->phys_erase_shift) - 1)) {
Scott Wood3167c532008-06-20 12:38:57 -05002173 MTDDEBUG (MTD_DEBUG_LEVEL0,
Wolfgang Denkd1a24f02011-02-02 22:36:10 +01002174 "nand_erase: Length not block aligned\n");
Wolfgang Denk932394a2005-08-17 12:55:25 +02002175 return -EINVAL;
2176 }
2177
2178 /* Do not allow erase past end of device */
2179 if ((instr->len + instr->addr) > mtd->size) {
Scott Wood3167c532008-06-20 12:38:57 -05002180 MTDDEBUG (MTD_DEBUG_LEVEL0,
Wolfgang Denkd1a24f02011-02-02 22:36:10 +01002181 "nand_erase: Erase past end of device\n");
Wolfgang Denk932394a2005-08-17 12:55:25 +02002182 return -EINVAL;
2183 }
2184
2185 instr->fail_addr = 0xffffffff;
2186
2187 /* Grab the lock and see if the device is available */
William Juulcfa460a2007-10-31 13:53:06 +01002188 nand_get_device(chip, mtd, FL_ERASING);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002189
2190 /* Shift to get first page */
William Juulcfa460a2007-10-31 13:53:06 +01002191 page = (int)(instr->addr >> chip->page_shift);
2192 chipnr = (int)(instr->addr >> chip->chip_shift);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002193
2194 /* Calculate pages in each block */
William Juulcfa460a2007-10-31 13:53:06 +01002195 pages_per_block = 1 << (chip->phys_erase_shift - chip->page_shift);
William Juul4cbb6512007-11-08 10:39:53 +01002196
Wolfgang Denk932394a2005-08-17 12:55:25 +02002197 /* Select the NAND device */
William Juulcfa460a2007-10-31 13:53:06 +01002198 chip->select_chip(mtd, chipnr);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002199
Wolfgang Denk932394a2005-08-17 12:55:25 +02002200 /* Check, if it is write protected */
2201 if (nand_check_wp(mtd)) {
Scott Wood3167c532008-06-20 12:38:57 -05002202 MTDDEBUG (MTD_DEBUG_LEVEL0,
Wolfgang Denkd1a24f02011-02-02 22:36:10 +01002203 "nand_erase: Device is write protected!!!\n");
Wolfgang Denk932394a2005-08-17 12:55:25 +02002204 instr->state = MTD_ERASE_FAILED;
2205 goto erase_exit;
2206 }
2207
William Juulcfa460a2007-10-31 13:53:06 +01002208 /*
2209 * If BBT requires refresh, set the BBT page mask to see if the BBT
2210 * should be rewritten. Otherwise the mask is set to 0xffffffff which
2211 * can not be matched. This is also done when the bbt is actually
2212 * erased to avoid recusrsive updates
2213 */
2214 if (chip->options & BBT_AUTO_REFRESH && !allowbbt)
2215 bbt_masked_page = chip->bbt_td->pages[chipnr] & BBT_PAGE_MASK;
2216
Wolfgang Denk932394a2005-08-17 12:55:25 +02002217 /* Loop through the pages */
2218 len = instr->len;
2219
2220 instr->state = MTD_ERASING;
2221
2222 while (len) {
Scott Wood6f2ffc32011-02-02 18:15:57 -06002223 WATCHDOG_RESET();
William Juulcfa460a2007-10-31 13:53:06 +01002224 /*
2225 * heck if we have a bad block, we do not erase bad blocks !
2226 */
2227 if (nand_block_checkbad(mtd, ((loff_t) page) <<
2228 chip->page_shift, 0, allowbbt)) {
2229 printk(KERN_WARNING "nand_erase: attempt to erase a "
2230 "bad block at page 0x%08x\n", page);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002231 instr->state = MTD_ERASE_FAILED;
2232 goto erase_exit;
2233 }
Wolfgang Denk932394a2005-08-17 12:55:25 +02002234
William Juulcfa460a2007-10-31 13:53:06 +01002235 /*
2236 * Invalidate the page cache, if we erase the block which
2237 * contains the current cached page
2238 */
2239 if (page <= chip->pagebuf && chip->pagebuf <
2240 (page + pages_per_block))
2241 chip->pagebuf = -1;
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02002242
William Juulcfa460a2007-10-31 13:53:06 +01002243 chip->erase_cmd(mtd, page & chip->pagemask);
2244
2245 status = chip->waitfunc(mtd, chip);
2246
2247 /*
2248 * See if operation failed and additional status checks are
2249 * available
2250 */
2251 if ((status & NAND_STATUS_FAIL) && (chip->errstat))
2252 status = chip->errstat(mtd, chip, FL_ERASING,
2253 status, page);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002254
2255 /* See if block erase succeeded */
William Juulcfa460a2007-10-31 13:53:06 +01002256 if (status & NAND_STATUS_FAIL) {
Scott Wood3167c532008-06-20 12:38:57 -05002257 MTDDEBUG (MTD_DEBUG_LEVEL0, "nand_erase: "
Wolfgang Denkd1a24f02011-02-02 22:36:10 +01002258 "Failed erase, page 0x%08x\n", page);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002259 instr->state = MTD_ERASE_FAILED;
Sandeep Paulrajaaa8eec2009-10-30 13:51:23 -04002260 instr->fail_addr = ((loff_t)page << chip->page_shift);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002261 goto erase_exit;
2262 }
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02002263
William Juulcfa460a2007-10-31 13:53:06 +01002264 /*
2265 * If BBT requires refresh, set the BBT rewrite flag to the
2266 * page being erased
2267 */
2268 if (bbt_masked_page != 0xffffffff &&
2269 (page & BBT_PAGE_MASK) == bbt_masked_page)
Sandeep Paulrajaaa8eec2009-10-30 13:51:23 -04002270 rewrite_bbt[chipnr] =
2271 ((loff_t)page << chip->page_shift);
William Juulcfa460a2007-10-31 13:53:06 +01002272
Wolfgang Denk932394a2005-08-17 12:55:25 +02002273 /* Increment page address and decrement length */
William Juulcfa460a2007-10-31 13:53:06 +01002274 len -= (1 << chip->phys_erase_shift);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002275 page += pages_per_block;
2276
2277 /* Check, if we cross a chip boundary */
William Juulcfa460a2007-10-31 13:53:06 +01002278 if (len && !(page & chip->pagemask)) {
Wolfgang Denk932394a2005-08-17 12:55:25 +02002279 chipnr++;
William Juulcfa460a2007-10-31 13:53:06 +01002280 chip->select_chip(mtd, -1);
2281 chip->select_chip(mtd, chipnr);
2282
2283 /*
2284 * If BBT requires refresh and BBT-PERCHIP, set the BBT
2285 * page mask to see if this BBT should be rewritten
2286 */
2287 if (bbt_masked_page != 0xffffffff &&
2288 (chip->bbt_td->options & NAND_BBT_PERCHIP))
2289 bbt_masked_page = chip->bbt_td->pages[chipnr] &
2290 BBT_PAGE_MASK;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002291 }
2292 }
2293 instr->state = MTD_ERASE_DONE;
2294
William Juulcfa460a2007-10-31 13:53:06 +01002295 erase_exit:
Wolfgang Denk932394a2005-08-17 12:55:25 +02002296
2297 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002298
2299 /* Deselect and wake up anyone waiting on the device */
2300 nand_release_device(mtd);
2301
Scott Woodc45912d2008-10-24 16:20:43 -05002302 /* Do call back function */
2303 if (!ret)
2304 mtd_erase_callback(instr);
2305
William Juulcfa460a2007-10-31 13:53:06 +01002306 /*
2307 * If BBT requires refresh and erase was successful, rewrite any
2308 * selected bad block tables
2309 */
2310 if (bbt_masked_page == 0xffffffff || ret)
2311 return ret;
2312
2313 for (chipnr = 0; chipnr < chip->numchips; chipnr++) {
2314 if (!rewrite_bbt[chipnr])
2315 continue;
2316 /* update the BBT for chip */
2317 MTDDEBUG (MTD_DEBUG_LEVEL0, "nand_erase_nand: nand_update_bbt "
Sandeep Paulrajaaa8eec2009-10-30 13:51:23 -04002318 "(%d:0x%0llx 0x%0x)\n", chipnr, rewrite_bbt[chipnr],
2319 chip->bbt_td->pages[chipnr]);
William Juulcfa460a2007-10-31 13:53:06 +01002320 nand_update_bbt(mtd, rewrite_bbt[chipnr]);
2321 }
2322
Wolfgang Denk932394a2005-08-17 12:55:25 +02002323 /* Return more or less happy */
2324 return ret;
2325}
2326
2327/**
2328 * nand_sync - [MTD Interface] sync
2329 * @mtd: MTD device structure
2330 *
2331 * Sync is actually a wait for chip ready function
2332 */
William Juulcfa460a2007-10-31 13:53:06 +01002333static void nand_sync(struct mtd_info *mtd)
Wolfgang Denk932394a2005-08-17 12:55:25 +02002334{
William Juulcfa460a2007-10-31 13:53:06 +01002335 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002336
Scott Wood3167c532008-06-20 12:38:57 -05002337 MTDDEBUG (MTD_DEBUG_LEVEL3, "nand_sync: called\n");
Wolfgang Denk932394a2005-08-17 12:55:25 +02002338
2339 /* Grab the lock and see if the device is available */
William Juulcfa460a2007-10-31 13:53:06 +01002340 nand_get_device(chip, mtd, FL_SYNCING);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002341 /* Release it and go back */
William Juulcfa460a2007-10-31 13:53:06 +01002342 nand_release_device(mtd);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002343}
2344
Wolfgang Denk932394a2005-08-17 12:55:25 +02002345/**
William Juulcfa460a2007-10-31 13:53:06 +01002346 * nand_block_isbad - [MTD Interface] Check if block at offset is bad
Wolfgang Denk932394a2005-08-17 12:55:25 +02002347 * @mtd: MTD device structure
William Juulcfa460a2007-10-31 13:53:06 +01002348 * @offs: offset relative to mtd start
Wolfgang Denk932394a2005-08-17 12:55:25 +02002349 */
William Juulcfa460a2007-10-31 13:53:06 +01002350static int nand_block_isbad(struct mtd_info *mtd, loff_t offs)
Wolfgang Denk932394a2005-08-17 12:55:25 +02002351{
2352 /* Check for invalid offset */
William Juulcfa460a2007-10-31 13:53:06 +01002353 if (offs > mtd->size)
Wolfgang Denk932394a2005-08-17 12:55:25 +02002354 return -EINVAL;
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02002355
William Juulcfa460a2007-10-31 13:53:06 +01002356 return nand_block_checkbad(mtd, offs, 1, 0);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002357}
2358
2359/**
William Juulcfa460a2007-10-31 13:53:06 +01002360 * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad
Wolfgang Denk932394a2005-08-17 12:55:25 +02002361 * @mtd: MTD device structure
2362 * @ofs: offset relative to mtd start
2363 */
William Juulcfa460a2007-10-31 13:53:06 +01002364static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs)
Wolfgang Denk932394a2005-08-17 12:55:25 +02002365{
William Juulcfa460a2007-10-31 13:53:06 +01002366 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002367 int ret;
2368
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02002369 if ((ret = nand_block_isbad(mtd, ofs))) {
2370 /* If it was bad already, return success and do nothing. */
Wolfgang Denk932394a2005-08-17 12:55:25 +02002371 if (ret > 0)
2372 return 0;
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02002373 return ret;
2374 }
Wolfgang Denk932394a2005-08-17 12:55:25 +02002375
William Juulcfa460a2007-10-31 13:53:06 +01002376 return chip->block_markbad(mtd, ofs);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002377}
2378
William Juulcfa460a2007-10-31 13:53:06 +01002379/*
2380 * Set default functions
2381 */
2382static void nand_set_defaults(struct nand_chip *chip, int busw)
2383{
2384 /* check for proper chip_delay setup, set 20us if not */
2385 if (!chip->chip_delay)
2386 chip->chip_delay = 20;
2387
2388 /* check, if a user supplied command function given */
2389 if (chip->cmdfunc == NULL)
2390 chip->cmdfunc = nand_command;
2391
2392 /* check, if a user supplied wait function given */
2393 if (chip->waitfunc == NULL)
2394 chip->waitfunc = nand_wait;
2395
2396 if (!chip->select_chip)
2397 chip->select_chip = nand_select_chip;
2398 if (!chip->read_byte)
2399 chip->read_byte = busw ? nand_read_byte16 : nand_read_byte;
2400 if (!chip->read_word)
2401 chip->read_word = nand_read_word;
2402 if (!chip->block_bad)
2403 chip->block_bad = nand_block_bad;
2404 if (!chip->block_markbad)
2405 chip->block_markbad = nand_default_block_markbad;
2406 if (!chip->write_buf)
2407 chip->write_buf = busw ? nand_write_buf16 : nand_write_buf;
2408 if (!chip->read_buf)
2409 chip->read_buf = busw ? nand_read_buf16 : nand_read_buf;
2410 if (!chip->verify_buf)
2411 chip->verify_buf = busw ? nand_verify_buf16 : nand_verify_buf;
2412 if (!chip->scan_bbt)
2413 chip->scan_bbt = nand_default_bbt;
Scott Wood5b8e6bb2010-08-25 17:42:49 -05002414 if (!chip->controller)
William Juulcfa460a2007-10-31 13:53:06 +01002415 chip->controller = &chip->hwcontrol;
William Juulcfa460a2007-10-31 13:53:06 +01002416}
2417
Florian Fainelli0272c712011-02-25 00:01:34 +00002418#ifdef CONFIG_SYS_NAND_ONFI_DETECTION
2419static u16 onfi_crc16(u16 crc, u8 const *p, size_t len)
William Juulcfa460a2007-10-31 13:53:06 +01002420{
Florian Fainelli0272c712011-02-25 00:01:34 +00002421 int i;
William Juulcfa460a2007-10-31 13:53:06 +01002422
Florian Fainelli0272c712011-02-25 00:01:34 +00002423 while (len--) {
2424 crc ^= *p++ << 8;
2425 for (i = 0; i < 8; i++)
2426 crc = (crc << 1) ^ ((crc & 0x8000) ? 0x8005 : 0);
Scott Woodc45912d2008-10-24 16:20:43 -05002427 }
2428
Florian Fainelli0272c712011-02-25 00:01:34 +00002429 return crc;
2430}
William Juulcfa460a2007-10-31 13:53:06 +01002431
Florian Fainelli0272c712011-02-25 00:01:34 +00002432/*
2433 * Check if the NAND chip is ONFI compliant, returns 1 if it is, 0 otherwise
2434 */
2435static int nand_flash_detect_onfi(struct mtd_info *mtd,
2436 struct nand_chip *chip,
2437 int *busw)
2438{
2439 struct nand_onfi_params *p = &chip->onfi_params;
2440 int i;
2441 int val;
2442
2443 chip->cmdfunc(mtd, NAND_CMD_READID, 0x20, -1);
2444 if (chip->read_byte(mtd) != 'O' || chip->read_byte(mtd) != 'N' ||
2445 chip->read_byte(mtd) != 'F' || chip->read_byte(mtd) != 'I')
2446 return 0;
2447
2448 printk(KERN_INFO "ONFI flash detected\n");
2449 chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1);
2450 for (i = 0; i < 3; i++) {
2451 chip->read_buf(mtd, (uint8_t *)p, sizeof(*p));
2452 if (onfi_crc16(ONFI_CRC_BASE, (uint8_t *)p, 254) ==
2453 le16_to_cpu(p->crc)) {
2454 printk(KERN_INFO "ONFI param page %d valid\n", i);
Wolfgang Denkd1a24f02011-02-02 22:36:10 +01002455 break;
Florian Fainelli0272c712011-02-25 00:01:34 +00002456 }
Florian Fainelli3e9b3492010-06-12 20:59:25 +02002457 }
William Juulcfa460a2007-10-31 13:53:06 +01002458
Florian Fainelli0272c712011-02-25 00:01:34 +00002459 if (i == 3)
2460 return 0;
2461
2462 /* check version */
2463 val = le16_to_cpu(p->revision);
Florian Fainelliaad99bb2011-04-03 18:23:56 +02002464 if (val & (1 << 5))
2465 chip->onfi_version = 23;
2466 else if (val & (1 << 4))
Florian Fainelli0272c712011-02-25 00:01:34 +00002467 chip->onfi_version = 22;
2468 else if (val & (1 << 3))
2469 chip->onfi_version = 21;
2470 else if (val & (1 << 2))
2471 chip->onfi_version = 20;
Florian Fainelliaad99bb2011-04-03 18:23:56 +02002472 else if (val & (1 << 1))
Florian Fainelli0272c712011-02-25 00:01:34 +00002473 chip->onfi_version = 10;
Florian Fainelliaad99bb2011-04-03 18:23:56 +02002474 else
2475 chip->onfi_version = 0;
2476
2477 if (!chip->onfi_version) {
2478 printk(KERN_INFO "%s: unsupported ONFI "
2479 "version: %d\n", __func__, val);
2480 return 0;
2481 }
Florian Fainelli0272c712011-02-25 00:01:34 +00002482
William Juulcfa460a2007-10-31 13:53:06 +01002483 if (!mtd->name)
Florian Fainelli0272c712011-02-25 00:01:34 +00002484 mtd->name = p->model;
William Juulcfa460a2007-10-31 13:53:06 +01002485
Florian Fainelli0272c712011-02-25 00:01:34 +00002486 mtd->writesize = le32_to_cpu(p->byte_per_page);
2487 mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize;
2488 mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);
Florian Fainellia931f492011-04-03 18:23:52 +02002489 chip->chipsize = (uint64_t)le32_to_cpu(p->blocks_per_lun) * mtd->erasesize;
Florian Fainelli0272c712011-02-25 00:01:34 +00002490 *busw = 0;
2491 if (le16_to_cpu(p->features) & 1)
2492 *busw = NAND_BUSWIDTH_16;
William Juulcfa460a2007-10-31 13:53:06 +01002493
Florian Fainelli0272c712011-02-25 00:01:34 +00002494 return 1;
2495}
2496#else
2497static inline int nand_flash_detect_onfi(struct mtd_info *mtd,
2498 struct nand_chip *chip,
2499 int *busw)
2500{
2501 return 0;
2502}
2503#endif
2504
2505static void nand_flash_detect_non_onfi(struct mtd_info *mtd,
2506 struct nand_chip *chip,
2507 const struct nand_flash_dev *type,
2508 int *busw)
2509{
William Juulcfa460a2007-10-31 13:53:06 +01002510 /* Newer devices have all the information in additional id bytes */
2511 if (!type->pagesize) {
2512 int extid;
2513 /* The 3rd id byte holds MLC / multichip data */
2514 chip->cellinfo = chip->read_byte(mtd);
2515 /* The 4th id byte is the important one */
2516 extid = chip->read_byte(mtd);
2517 /* Calc pagesize */
2518 mtd->writesize = 1024 << (extid & 0x3);
2519 extid >>= 2;
2520 /* Calc oobsize */
2521 mtd->oobsize = (8 << (extid & 0x01)) * (mtd->writesize >> 9);
2522 extid >>= 2;
2523 /* Calc blocksize. Blocksize is multiples of 64KiB */
2524 mtd->erasesize = (64 * 1024) << (extid & 0x03);
2525 extid >>= 2;
2526 /* Get buswidth information */
Florian Fainelli0272c712011-02-25 00:01:34 +00002527 *busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0;
William Juulcfa460a2007-10-31 13:53:06 +01002528
2529 } else {
2530 /*
2531 * Old devices have chip data hardcoded in the device id table
2532 */
2533 mtd->erasesize = type->erasesize;
2534 mtd->writesize = type->pagesize;
2535 mtd->oobsize = mtd->writesize / 32;
Florian Fainelli0272c712011-02-25 00:01:34 +00002536 *busw = type->options & NAND_BUSWIDTH_16;
William Juulcfa460a2007-10-31 13:53:06 +01002537 }
Florian Fainelli0272c712011-02-25 00:01:34 +00002538}
2539
2540/*
2541 * Get the flash and manufacturer id and lookup if the type is supported
2542 */
2543static const struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
2544 struct nand_chip *chip,
2545 int busw,
2546 int *maf_id, int *dev_id,
2547 const struct nand_flash_dev *type)
2548{
2549 int ret, maf_idx;
2550 int tmp_id, tmp_manf;
2551
2552 /* Select the device */
2553 chip->select_chip(mtd, 0);
2554
2555 /*
2556 * Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx)
2557 * after power-up
2558 */
2559 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
2560
2561 /* Send the command for reading device ID */
2562 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
2563
2564 /* Read manufacturer and device IDs */
2565 *maf_id = chip->read_byte(mtd);
2566 *dev_id = chip->read_byte(mtd);
2567
2568 /* Try again to make sure, as some systems the bus-hold or other
2569 * interface concerns can cause random data which looks like a
2570 * possibly credible NAND flash to appear. If the two results do
2571 * not match, ignore the device completely.
2572 */
2573
2574 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
2575
2576 /* Read manufacturer and device IDs */
2577
2578 tmp_manf = chip->read_byte(mtd);
2579 tmp_id = chip->read_byte(mtd);
2580
2581 if (tmp_manf != *maf_id || tmp_id != *dev_id) {
2582 printk(KERN_INFO "%s: second ID read did not match "
2583 "%02x,%02x against %02x,%02x\n", __func__,
2584 *maf_id, *dev_id, tmp_manf, tmp_id);
2585 return ERR_PTR(-ENODEV);
2586 }
2587
2588 if (!type)
2589 type = nand_flash_ids;
2590
2591 for (; type->name != NULL; type++)
2592 if (*dev_id == type->id)
2593 break;
2594
2595 if (!type->name) {
2596 /* supress warning if there is no nand */
2597 if (*maf_id != 0x00 && *maf_id != 0xff &&
2598 *dev_id != 0x00 && *dev_id != 0xff)
2599 printk(KERN_INFO "%s: unknown NAND device: "
2600 "Manufacturer ID: 0x%02x, Chip ID: 0x%02x\n",
2601 __func__, *maf_id, *dev_id);
2602 return ERR_PTR(-ENODEV);
2603 }
2604
2605 if (!mtd->name)
2606 mtd->name = type->name;
2607
2608 chip->chipsize = (uint64_t)type->chipsize << 20;
2609 chip->onfi_version = 0;
2610
2611 ret = nand_flash_detect_onfi(mtd, chip, &busw);
2612 if (!ret)
2613 nand_flash_detect_non_onfi(mtd, chip, type, &busw);
2614
2615 /* Get chip options, preserve non chip based options */
2616 chip->options &= ~NAND_CHIPOPTIONS_MSK;
2617 chip->options |= type->options & NAND_CHIPOPTIONS_MSK;
2618
2619 /*
2620 * Set chip as a default. Board drivers can override it, if necessary
2621 */
2622 chip->options |= NAND_NO_AUTOINCR;
William Juulcfa460a2007-10-31 13:53:06 +01002623
2624 /* Try to identify manufacturer */
2625 for (maf_idx = 0; nand_manuf_ids[maf_idx].id != 0x0; maf_idx++) {
2626 if (nand_manuf_ids[maf_idx].id == *maf_id)
2627 break;
2628 }
2629
2630 /*
2631 * Check, if buswidth is correct. Hardware drivers should set
2632 * chip correct !
2633 */
2634 if (busw != (chip->options & NAND_BUSWIDTH_16)) {
2635 printk(KERN_INFO "NAND device: Manufacturer ID:"
2636 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id,
Florian Fainelli0272c712011-02-25 00:01:34 +00002637 *dev_id, nand_manuf_ids[maf_idx].name, mtd->name);
William Juulcfa460a2007-10-31 13:53:06 +01002638 printk(KERN_WARNING "NAND bus width %d instead %d bit\n",
2639 (chip->options & NAND_BUSWIDTH_16) ? 16 : 8,
2640 busw ? 16 : 8);
2641 return ERR_PTR(-EINVAL);
2642 }
2643
2644 /* Calculate the address shift from the page size */
2645 chip->page_shift = ffs(mtd->writesize) - 1;
2646 /* Convert chipsize to number of pages per chip -1. */
2647 chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
2648
2649 chip->bbt_erase_shift = chip->phys_erase_shift =
2650 ffs(mtd->erasesize) - 1;
Sandeep Paulrajaaa8eec2009-10-30 13:51:23 -04002651 if (chip->chipsize & 0xffffffff)
Sandeep Paulraj4f41e7e2009-11-07 14:24:06 -05002652 chip->chip_shift = ffs((unsigned)chip->chipsize) - 1;
Sandeep Paulrajaaa8eec2009-10-30 13:51:23 -04002653 else
2654 chip->chip_shift = ffs((unsigned)(chip->chipsize >> 32)) + 31;
William Juulcfa460a2007-10-31 13:53:06 +01002655
2656 /* Set the bad block position */
2657 chip->badblockpos = mtd->writesize > 512 ?
2658 NAND_LARGE_BADBLOCK_POS : NAND_SMALL_BADBLOCK_POS;
2659
William Juulcfa460a2007-10-31 13:53:06 +01002660 /* Check if chip is a not a samsung device. Do not clear the
2661 * options for chips which are not having an extended id.
2662 */
2663 if (*maf_id != NAND_MFR_SAMSUNG && !type->pagesize)
2664 chip->options &= ~NAND_SAMSUNG_LP_OPTIONS;
2665
2666 /* Check for AND chips with 4 page planes */
2667 if (chip->options & NAND_4PAGE_ARRAY)
2668 chip->erase_cmd = multi_erase_cmd;
2669 else
2670 chip->erase_cmd = single_erase_cmd;
2671
2672 /* Do not replace user supplied command function ! */
2673 if (mtd->writesize > 512 && chip->cmdfunc == nand_command)
2674 chip->cmdfunc = nand_command_lp;
2675
Stefan Roesee52b34d2008-01-10 18:47:33 +01002676 MTDDEBUG (MTD_DEBUG_LEVEL0, "NAND device: Manufacturer ID:"
Florian Fainelli0272c712011-02-25 00:01:34 +00002677 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id, *dev_id,
Wolfgang Denkd1a24f02011-02-02 22:36:10 +01002678 nand_manuf_ids[maf_idx].name, type->name);
William Juulcfa460a2007-10-31 13:53:06 +01002679
2680 return type;
2681}
2682
2683/**
2684 * nand_scan_ident - [NAND Interface] Scan for the NAND device
2685 * @mtd: MTD device structure
2686 * @maxchips: Number of chips to scan for
Lei Wen245eb902011-01-06 09:48:18 +08002687 * @table: Alternative NAND ID table
William Juulcfa460a2007-10-31 13:53:06 +01002688 *
2689 * This is the first phase of the normal nand_scan() function. It
2690 * reads the flash ID and sets up MTD fields accordingly.
2691 *
2692 * The mtd->owner field must be set to the module of the caller.
2693 */
Lei Wen245eb902011-01-06 09:48:18 +08002694int nand_scan_ident(struct mtd_info *mtd, int maxchips,
2695 const struct nand_flash_dev *table)
William Juulcfa460a2007-10-31 13:53:06 +01002696{
Florian Fainelli0272c712011-02-25 00:01:34 +00002697 int i, busw, nand_maf_id, nand_dev_id;
William Juulcfa460a2007-10-31 13:53:06 +01002698 struct nand_chip *chip = mtd->priv;
Mike Frysinger0bdecd82010-10-20 01:15:21 +00002699 const struct nand_flash_dev *type;
William Juulcfa460a2007-10-31 13:53:06 +01002700
2701 /* Get buswidth to select the correct functions */
2702 busw = chip->options & NAND_BUSWIDTH_16;
2703 /* Set the default functions */
2704 nand_set_defaults(chip, busw);
2705
2706 /* Read the flash type */
Florian Fainelli0272c712011-02-25 00:01:34 +00002707 type = nand_get_flash_type(mtd, chip, busw, &nand_maf_id, &nand_dev_id, table);
William Juulcfa460a2007-10-31 13:53:06 +01002708
2709 if (IS_ERR(type)) {
Peter Tyser10dc6a92009-02-04 13:39:40 -06002710#ifndef CONFIG_SYS_NAND_QUIET_TEST
William Juulcfa460a2007-10-31 13:53:06 +01002711 printk(KERN_WARNING "No NAND device found!!!\n");
Peter Tyser10dc6a92009-02-04 13:39:40 -06002712#endif
William Juulcfa460a2007-10-31 13:53:06 +01002713 chip->select_chip(mtd, -1);
2714 return PTR_ERR(type);
2715 }
2716
2717 /* Check for a chip array */
2718 for (i = 1; i < maxchips; i++) {
2719 chip->select_chip(mtd, i);
Karl Beldan33efde52008-09-15 16:08:03 +02002720 /* See comment in nand_get_flash_type for reset */
2721 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
William Juulcfa460a2007-10-31 13:53:06 +01002722 /* Send the command for reading device ID */
2723 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
2724 /* Read manufacturer and device IDs */
2725 if (nand_maf_id != chip->read_byte(mtd) ||
Florian Fainelli0272c712011-02-25 00:01:34 +00002726 nand_dev_id != chip->read_byte(mtd))
William Juulcfa460a2007-10-31 13:53:06 +01002727 break;
2728 }
Wolfgang Grandegger672ed2a2009-02-11 18:38:20 +01002729#ifdef DEBUG
William Juulcfa460a2007-10-31 13:53:06 +01002730 if (i > 1)
2731 printk(KERN_INFO "%d NAND chips detected\n", i);
Wolfgang Grandegger672ed2a2009-02-11 18:38:20 +01002732#endif
William Juulcfa460a2007-10-31 13:53:06 +01002733
2734 /* Store the number of chips and calc total size for mtd */
2735 chip->numchips = i;
2736 mtd->size = i * chip->chipsize;
2737
2738 return 0;
2739}
2740
2741
2742/**
2743 * nand_scan_tail - [NAND Interface] Scan for the NAND device
2744 * @mtd: MTD device structure
William Juulcfa460a2007-10-31 13:53:06 +01002745 *
2746 * This is the second phase of the normal nand_scan() function. It
2747 * fills out all the uninitialized function pointers with the defaults
2748 * and scans for a bad block table if appropriate.
2749 */
2750int nand_scan_tail(struct mtd_info *mtd)
2751{
2752 int i;
2753 struct nand_chip *chip = mtd->priv;
2754
2755 if (!(chip->options & NAND_OWN_BUFFERS))
2756 chip->buffers = kmalloc(sizeof(*chip->buffers), GFP_KERNEL);
2757 if (!chip->buffers)
2758 return -ENOMEM;
2759
2760 /* Set the internal oob buffer location, just after the page data */
2761 chip->oob_poi = chip->buffers->databuf + mtd->writesize;
2762
2763 /*
2764 * If no default placement scheme is given, select an appropriate one
2765 */
2766 if (!chip->ecc.layout) {
2767 switch (mtd->oobsize) {
2768 case 8:
2769 chip->ecc.layout = &nand_oob_8;
2770 break;
2771 case 16:
2772 chip->ecc.layout = &nand_oob_16;
2773 break;
2774 case 64:
2775 chip->ecc.layout = &nand_oob_64;
2776 break;
2777 case 128:
2778 chip->ecc.layout = &nand_oob_128;
2779 break;
2780 default:
2781 printk(KERN_WARNING "No oob scheme defined for "
2782 "oobsize %d\n", mtd->oobsize);
William Juulcfa460a2007-10-31 13:53:06 +01002783 }
2784 }
2785
2786 if (!chip->write_page)
2787 chip->write_page = nand_write_page;
2788
2789 /*
2790 * check ECC mode, default to software if 3byte/512byte hardware ECC is
2791 * selected and we have 256 byte pagesize fallback to software ECC
2792 */
William Juulcfa460a2007-10-31 13:53:06 +01002793
2794 switch (chip->ecc.mode) {
Sandeep Paulrajf83b7f92009-08-10 13:27:56 -04002795 case NAND_ECC_HW_OOB_FIRST:
2796 /* Similar to NAND_ECC_HW, but a separate read_page handle */
2797 if (!chip->ecc.calculate || !chip->ecc.correct ||
2798 !chip->ecc.hwctl) {
2799 printk(KERN_WARNING "No ECC functions supplied, "
2800 "Hardware ECC not possible\n");
2801 BUG();
2802 }
2803 if (!chip->ecc.read_page)
2804 chip->ecc.read_page = nand_read_page_hwecc_oob_first;
2805
William Juulcfa460a2007-10-31 13:53:06 +01002806 case NAND_ECC_HW:
2807 /* Use standard hwecc read page function ? */
2808 if (!chip->ecc.read_page)
2809 chip->ecc.read_page = nand_read_page_hwecc;
2810 if (!chip->ecc.write_page)
2811 chip->ecc.write_page = nand_write_page_hwecc;
David Brownell7e866612009-11-07 16:27:01 -05002812 if (!chip->ecc.read_page_raw)
2813 chip->ecc.read_page_raw = nand_read_page_raw;
2814 if (!chip->ecc.write_page_raw)
2815 chip->ecc.write_page_raw = nand_write_page_raw;
William Juulcfa460a2007-10-31 13:53:06 +01002816 if (!chip->ecc.read_oob)
2817 chip->ecc.read_oob = nand_read_oob_std;
2818 if (!chip->ecc.write_oob)
2819 chip->ecc.write_oob = nand_write_oob_std;
2820
2821 case NAND_ECC_HW_SYNDROME:
Scott Wood41ef8c72008-03-18 15:29:14 -05002822 if ((!chip->ecc.calculate || !chip->ecc.correct ||
2823 !chip->ecc.hwctl) &&
2824 (!chip->ecc.read_page ||
2825 chip->ecc.read_page == nand_read_page_hwecc ||
2826 !chip->ecc.write_page ||
2827 chip->ecc.write_page == nand_write_page_hwecc)) {
William Juulcfa460a2007-10-31 13:53:06 +01002828 printk(KERN_WARNING "No ECC functions supplied, "
2829 "Hardware ECC not possible\n");
2830 BUG();
2831 }
2832 /* Use standard syndrome read/write page function ? */
2833 if (!chip->ecc.read_page)
2834 chip->ecc.read_page = nand_read_page_syndrome;
2835 if (!chip->ecc.write_page)
2836 chip->ecc.write_page = nand_write_page_syndrome;
David Brownell7e866612009-11-07 16:27:01 -05002837 if (!chip->ecc.read_page_raw)
2838 chip->ecc.read_page_raw = nand_read_page_raw_syndrome;
2839 if (!chip->ecc.write_page_raw)
2840 chip->ecc.write_page_raw = nand_write_page_raw_syndrome;
William Juulcfa460a2007-10-31 13:53:06 +01002841 if (!chip->ecc.read_oob)
2842 chip->ecc.read_oob = nand_read_oob_syndrome;
2843 if (!chip->ecc.write_oob)
2844 chip->ecc.write_oob = nand_write_oob_syndrome;
2845
2846 if (mtd->writesize >= chip->ecc.size)
2847 break;
2848 printk(KERN_WARNING "%d byte HW ECC not possible on "
2849 "%d byte page size, fallback to SW ECC\n",
2850 chip->ecc.size, mtd->writesize);
2851 chip->ecc.mode = NAND_ECC_SOFT;
2852
2853 case NAND_ECC_SOFT:
2854 chip->ecc.calculate = nand_calculate_ecc;
2855 chip->ecc.correct = nand_correct_data;
2856 chip->ecc.read_page = nand_read_page_swecc;
Scott Woodc45912d2008-10-24 16:20:43 -05002857 chip->ecc.read_subpage = nand_read_subpage;
William Juulcfa460a2007-10-31 13:53:06 +01002858 chip->ecc.write_page = nand_write_page_swecc;
David Brownell7e866612009-11-07 16:27:01 -05002859 chip->ecc.read_page_raw = nand_read_page_raw;
2860 chip->ecc.write_page_raw = nand_write_page_raw;
William Juulcfa460a2007-10-31 13:53:06 +01002861 chip->ecc.read_oob = nand_read_oob_std;
2862 chip->ecc.write_oob = nand_write_oob_std;
2863 chip->ecc.size = 256;
2864 chip->ecc.bytes = 3;
2865 break;
2866
2867 case NAND_ECC_NONE:
2868 printk(KERN_WARNING "NAND_ECC_NONE selected by board driver. "
2869 "This is not recommended !!\n");
2870 chip->ecc.read_page = nand_read_page_raw;
2871 chip->ecc.write_page = nand_write_page_raw;
2872 chip->ecc.read_oob = nand_read_oob_std;
David Brownell7e866612009-11-07 16:27:01 -05002873 chip->ecc.read_page_raw = nand_read_page_raw;
2874 chip->ecc.write_page_raw = nand_write_page_raw;
William Juulcfa460a2007-10-31 13:53:06 +01002875 chip->ecc.write_oob = nand_write_oob_std;
2876 chip->ecc.size = mtd->writesize;
2877 chip->ecc.bytes = 0;
2878 break;
2879
2880 default:
2881 printk(KERN_WARNING "Invalid NAND_ECC_MODE %d\n",
2882 chip->ecc.mode);
2883 BUG();
2884 }
2885
2886 /*
2887 * The number of bytes available for a client to place data into
2888 * the out of band area
2889 */
2890 chip->ecc.layout->oobavail = 0;
Sandeep Paulraj5df3c2b2009-11-07 14:25:18 -05002891 for (i = 0; chip->ecc.layout->oobfree[i].length
2892 && i < ARRAY_SIZE(chip->ecc.layout->oobfree); i++)
William Juulcfa460a2007-10-31 13:53:06 +01002893 chip->ecc.layout->oobavail +=
2894 chip->ecc.layout->oobfree[i].length;
2895 mtd->oobavail = chip->ecc.layout->oobavail;
2896
2897 /*
2898 * Set the number of read / write steps for one page depending on ECC
2899 * mode
2900 */
2901 chip->ecc.steps = mtd->writesize / chip->ecc.size;
2902 if(chip->ecc.steps * chip->ecc.size != mtd->writesize) {
2903 printk(KERN_WARNING "Invalid ecc parameters\n");
2904 BUG();
2905 }
2906 chip->ecc.total = chip->ecc.steps * chip->ecc.bytes;
2907
2908 /*
2909 * Allow subpage writes up to ecc.steps. Not possible for MLC
2910 * FLASH.
2911 */
2912 if (!(chip->options & NAND_NO_SUBPAGE_WRITE) &&
2913 !(chip->cellinfo & NAND_CI_CELLTYPE_MSK)) {
2914 switch(chip->ecc.steps) {
2915 case 2:
2916 mtd->subpage_sft = 1;
2917 break;
2918 case 4:
2919 case 8:
Sandeep Paulrajaad4a282009-11-07 14:24:34 -05002920 case 16:
William Juulcfa460a2007-10-31 13:53:06 +01002921 mtd->subpage_sft = 2;
2922 break;
2923 }
2924 }
2925 chip->subpagesize = mtd->writesize >> mtd->subpage_sft;
2926
2927 /* Initialize state */
2928 chip->state = FL_READY;
2929
2930 /* De-select the device */
2931 chip->select_chip(mtd, -1);
2932
2933 /* Invalidate the pagebuffer reference */
2934 chip->pagebuf = -1;
2935
2936 /* Fill in remaining MTD driver data */
2937 mtd->type = MTD_NANDFLASH;
2938 mtd->flags = MTD_CAP_NANDFLASH;
2939 mtd->erase = nand_erase;
2940 mtd->point = NULL;
2941 mtd->unpoint = NULL;
2942 mtd->read = nand_read;
2943 mtd->write = nand_write;
2944 mtd->read_oob = nand_read_oob;
2945 mtd->write_oob = nand_write_oob;
2946 mtd->sync = nand_sync;
2947 mtd->lock = NULL;
2948 mtd->unlock = NULL;
William Juulcfa460a2007-10-31 13:53:06 +01002949 mtd->block_isbad = nand_block_isbad;
2950 mtd->block_markbad = nand_block_markbad;
2951
2952 /* propagate ecc.layout to mtd_info */
2953 mtd->ecclayout = chip->ecc.layout;
2954
2955 /* Check, if we should skip the bad block table scan */
2956 if (chip->options & NAND_SKIP_BBTSCAN)
Ilya Yanok13f0fd92008-06-30 15:34:40 +02002957 chip->options |= NAND_BBT_SCANNED;
William Juulcfa460a2007-10-31 13:53:06 +01002958
Ilya Yanok13f0fd92008-06-30 15:34:40 +02002959 return 0;
William Juulcfa460a2007-10-31 13:53:06 +01002960}
2961
William Juulcfa460a2007-10-31 13:53:06 +01002962/**
Wolfgang Denk932394a2005-08-17 12:55:25 +02002963 * nand_scan - [NAND Interface] Scan for the NAND device
2964 * @mtd: MTD device structure
2965 * @maxchips: Number of chips to scan for
2966 *
William Juulcfa460a2007-10-31 13:53:06 +01002967 * This fills out all the uninitialized function pointers
Wolfgang Denk932394a2005-08-17 12:55:25 +02002968 * with the defaults.
2969 * The flash ID is read and the mtd/chip structures are
William Juulcfa460a2007-10-31 13:53:06 +01002970 * filled with the appropriate values.
2971 * The mtd->owner field must be set to the module of the caller
Wolfgang Denk932394a2005-08-17 12:55:25 +02002972 *
2973 */
William Juulcfa460a2007-10-31 13:53:06 +01002974int nand_scan(struct mtd_info *mtd, int maxchips)
Wolfgang Denk932394a2005-08-17 12:55:25 +02002975{
William Juulcfa460a2007-10-31 13:53:06 +01002976 int ret;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002977
Lei Wen245eb902011-01-06 09:48:18 +08002978 ret = nand_scan_ident(mtd, maxchips, NULL);
William Juulcfa460a2007-10-31 13:53:06 +01002979 if (!ret)
2980 ret = nand_scan_tail(mtd);
2981 return ret;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002982}
2983
2984/**
Wolfgang Denkac7eb8a2005-09-14 23:53:32 +02002985 * nand_release - [NAND Interface] Free resources held by the NAND device
Wolfgang Denk932394a2005-08-17 12:55:25 +02002986 * @mtd: MTD device structure
William Juulcfa460a2007-10-31 13:53:06 +01002987*/
2988void nand_release(struct mtd_info *mtd)
Wolfgang Denk932394a2005-08-17 12:55:25 +02002989{
William Juulcfa460a2007-10-31 13:53:06 +01002990 struct nand_chip *chip = mtd->priv;
Wolfgang Denk932394a2005-08-17 12:55:25 +02002991
2992#ifdef CONFIG_MTD_PARTITIONS
2993 /* Deregister partitions */
William Juulcfa460a2007-10-31 13:53:06 +01002994 del_mtd_partitions(mtd);
Wolfgang Denk932394a2005-08-17 12:55:25 +02002995#endif
William Juulcfa460a2007-10-31 13:53:06 +01002996
2997 /* Free bad block table memory */
2998 kfree(chip->bbt);
2999 if (!(chip->options & NAND_OWN_BUFFERS))
3000 kfree(chip->buffers);
Wolfgang Denk932394a2005-08-17 12:55:25 +02003001}