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TsiChungLiew1ac559d2008-01-14 17:19:54 -06001/*
2 * (C) Copyright 2000-2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Alison Wangaa0d99f2012-03-26 21:49:05 +00005 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
TsiChungLiew1ac559d2008-01-14 17:19:54 -06006 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
7 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02008 * SPDX-License-Identifier: GPL-2.0+
TsiChungLiew1ac559d2008-01-14 17:19:54 -06009 */
10
11#include <config.h>
12#include <common.h>
13#include <asm/io.h>
14#include <asm/immap.h>
15
16DECLARE_GLOBAL_DATA_PTR;
17
18#if defined(CONFIG_CMD_NAND)
19#include <nand.h>
20#include <linux/mtd/mtd.h>
21
22#define SET_CLE 0x10
TsiChungLiew1ac559d2008-01-14 17:19:54 -060023#define SET_ALE 0x08
TsiChungLiew1ac559d2008-01-14 17:19:54 -060024
Scott Woodf64cb652008-08-13 17:53:48 -050025static void nand_hwcontrol(struct mtd_info *mtdinfo, int cmd, unsigned int ctrl)
TsiChungLiew1ac559d2008-01-14 17:19:54 -060026{
Scott Wood17cb4b82016-05-30 13:57:56 -050027 struct nand_chip *this = mtd_to_nand(mtdinfo);
TsiChung Liewe4f69d12008-10-24 12:59:12 +000028 volatile u16 *nCE = (u16 *) CONFIG_SYS_LATCH_ADDR;
TsiChungLiew1ac559d2008-01-14 17:19:54 -060029
Scott Woodf64cb652008-08-13 17:53:48 -050030 if (ctrl & NAND_CTRL_CHANGE) {
31 ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
Scott Woodf64cb652008-08-13 17:53:48 -050032
TsiChung Liewe4f69d12008-10-24 12:59:12 +000033 IO_ADDR_W &= ~(SET_ALE | SET_CLE);
TsiChung Liewe4f69d12008-10-24 12:59:12 +000034
35 if (ctrl & NAND_NCE)
TsiChung Liew9017d932009-03-02 19:16:45 +000036 *nCE &= 0xFFFB;
37 else
TsiChung Liewe4f69d12008-10-24 12:59:12 +000038 *nCE |= 0x0004;
TsiChung Liew9017d932009-03-02 19:16:45 +000039
Scott Woodf64cb652008-08-13 17:53:48 -050040 if (ctrl & NAND_CLE)
41 IO_ADDR_W |= SET_CLE;
42 if (ctrl & NAND_ALE)
43 IO_ADDR_W |= SET_ALE;
44
Scott Woodf64cb652008-08-13 17:53:48 -050045 this->IO_ADDR_W = (void *)IO_ADDR_W;
46
TsiChungLiew1ac559d2008-01-14 17:19:54 -060047 }
TsiChungLiew1ac559d2008-01-14 17:19:54 -060048
Scott Woodf64cb652008-08-13 17:53:48 -050049 if (cmd != NAND_CMD_NONE)
50 writeb(cmd, this->IO_ADDR_W);
TsiChungLiew1ac559d2008-01-14 17:19:54 -060051}
52
53int board_nand_init(struct nand_chip *nand)
54{
Alison Wangaa0d99f2012-03-26 21:49:05 +000055 gpio_t *gpio = (gpio_t *) MMAP_GPIO;
56 fbcs_t *fbcs = (fbcs_t *) MMAP_FBCS;
TsiChungLiew1ac559d2008-01-14 17:19:54 -060057
Alison Wangaa0d99f2012-03-26 21:49:05 +000058 clrbits_be32(&fbcs->csmr2, FBCS_CSMR_WP);
TsiChungLiew1ac559d2008-01-14 17:19:54 -060059
TsiChung Liewe4f69d12008-10-24 12:59:12 +000060 /*
61 * set up pin configuration - enabled 2nd output buffer's signals
62 * (nand_ngpio - nCE USB1/2_PWR_EN, LATCH_GPIOs, LCD_VEEEN, etc)
63 * to use nCE signal
64 */
Alison Wangaa0d99f2012-03-26 21:49:05 +000065 clrbits_8(&gpio->par_timer, GPIO_PAR_TIN3_TIN3);
66 setbits_8(&gpio->pddr_timer, 0x08);
67 setbits_8(&gpio->ppd_timer, 0x08);
68 out_8(&gpio->pclrr_timer, 0);
69 out_8(&gpio->podr_timer, 0);
TsiChungLiew1ac559d2008-01-14 17:19:54 -060070
TsiChung Liew9017d932009-03-02 19:16:45 +000071 nand->chip_delay = 60;
Scott Woodf64cb652008-08-13 17:53:48 -050072 nand->ecc.mode = NAND_ECC_SOFT;
73 nand->cmd_ctrl = nand_hwcontrol;
TsiChungLiew1ac559d2008-01-14 17:19:54 -060074
75 return 0;
76}
77#endif