blob: ae462579e27d61d147d9d18eb6995794b817a721 [file] [log] [blame]
TsiChungLiew4a442d32007-08-16 19:23:50 -05001/*
2 *
3 * (C) Copyright 2000-2003
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
Alison Wangc6d88632012-03-26 21:49:06 +00006 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
TsiChungLiew4a442d32007-08-16 19:23:50 -05007 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28#include <common.h>
29#include <asm/processor.h>
30
31#include <asm/immap.h>
Alison Wangc6d88632012-03-26 21:49:06 +000032#include <asm/io.h>
TsiChungLiew4a442d32007-08-16 19:23:50 -050033
34DECLARE_GLOBAL_DATA_PTR;
35/*
36 * get_clocks() fills in gd->cpu_clock and gd->bus_clk
37 */
38int get_clocks(void)
39{
Alison Wangc6d88632012-03-26 21:49:06 +000040 pll_t *pll = (pll_t *)(MMAP_PLL);
TsiChungLiew4a442d32007-08-16 19:23:50 -050041
Alison Wangc6d88632012-03-26 21:49:06 +000042 out_be32(&pll->syncr, PLL_SYNCR_MFD(1));
TsiChungLiew4a442d32007-08-16 19:23:50 -050043
Alison Wangc6d88632012-03-26 21:49:06 +000044 while (!(in_be32(&pll->synsr) & PLL_SYNSR_LOCK))
45 ;
Stefan Roese8280f6a2007-08-18 14:33:02 +020046
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020047 gd->bus_clk = CONFIG_SYS_CLK;
TsiChungLiew4a442d32007-08-16 19:23:50 -050048 gd->cpu_clk = (gd->bus_clk * 2);
Stefan Roese8280f6a2007-08-18 14:33:02 +020049
TsiChung Lieweec567a2008-08-19 03:01:19 +060050#ifdef CONFIG_FSL_I2C
Simon Glass609e6ec2012-12-13 20:48:49 +000051 gd->arch.i2c1_clk = gd->bus_clk;
TsiChung Lieweec567a2008-08-19 03:01:19 +060052#endif
53
TsiChungLiew4a442d32007-08-16 19:23:50 -050054 return (0);
55}