Phil Edworthy | 7fbeb64 | 2011-06-01 07:35:13 +0100 | [diff] [blame] | 1 | /* |
Phil Edworthy | efa4e1b | 2011-06-09 16:22:43 +0100 | [diff] [blame] | 2 | * Configuation settings for the Renesas RSK2+SH7264 board |
Phil Edworthy | 7fbeb64 | 2011-06-01 07:35:13 +0100 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2011 Renesas Electronics Europe Ltd. |
| 5 | * Copyright (C) 2008 Nobuhiro Iwamatsu |
| 6 | * Copyright (C) 2008 Renesas Solutions Corp. |
| 7 | * |
| 8 | * This file is released under the terms of GPL v2 and any later version. |
| 9 | * See the file COPYING in the root directory of the source tree for details. |
| 10 | */ |
| 11 | |
| 12 | #ifndef __RSK7264_H |
| 13 | #define __RSK7264_H |
| 14 | |
| 15 | #undef DEBUG |
| 16 | #define CONFIG_SH 1 |
| 17 | #define CONFIG_SH2 1 |
| 18 | #define CONFIG_SH2A 1 |
| 19 | #define CONFIG_CPU_SH7264 1 |
Phil Edworthy | efa4e1b | 2011-06-09 16:22:43 +0100 | [diff] [blame] | 20 | #define CONFIG_RSK7264 1 |
Phil Edworthy | 7fbeb64 | 2011-06-01 07:35:13 +0100 | [diff] [blame] | 21 | |
Phil Edworthy | efa4e1b | 2011-06-09 16:22:43 +0100 | [diff] [blame] | 22 | #ifndef _CONFIG_CMD_DEFAULT_H |
| 23 | # include <config_cmd_default.h> |
| 24 | #endif |
Phil Edworthy | 7fbeb64 | 2011-06-01 07:35:13 +0100 | [diff] [blame] | 25 | |
| 26 | #define CONFIG_BAUDRATE 115200 |
| 27 | #define CONFIG_BOOTARGS "console=ttySC3,115200" |
| 28 | #define CONFIG_BOOTDELAY 3 |
Phil Edworthy | efa4e1b | 2011-06-09 16:22:43 +0100 | [diff] [blame] | 29 | #define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } |
Phil Edworthy | 7fbeb64 | 2011-06-01 07:35:13 +0100 | [diff] [blame] | 30 | |
Phil Edworthy | efa4e1b | 2011-06-09 16:22:43 +0100 | [diff] [blame] | 31 | #define CONFIG_SYS_LONGHELP 1 /* undef to save memory */ |
Phil Edworthy | 7fbeb64 | 2011-06-01 07:35:13 +0100 | [diff] [blame] | 32 | #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ |
| 33 | #define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */ |
| 34 | #define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ |
| 35 | #define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */ |
Phil Edworthy | 7fbeb64 | 2011-06-01 07:35:13 +0100 | [diff] [blame] | 36 | |
Phil Edworthy | efa4e1b | 2011-06-09 16:22:43 +0100 | [diff] [blame] | 37 | /* Serial */ |
Phil Edworthy | 7fbeb64 | 2011-06-01 07:35:13 +0100 | [diff] [blame] | 38 | #define CONFIG_SCIF_CONSOLE 1 |
| 39 | #define CONFIG_CONS_SCIF3 1 |
| 40 | |
Phil Edworthy | efa4e1b | 2011-06-09 16:22:43 +0100 | [diff] [blame] | 41 | /* Memory */ |
| 42 | /* u-boot relocated to top 256KB of ram */ |
| 43 | #define CONFIG_SYS_TEXT_BASE 0x0CFC0000 |
| 44 | #define CONFIG_SYS_SDRAM_BASE 0x0C000000 |
Phil Edworthy | 7fbeb64 | 2011-06-01 07:35:13 +0100 | [diff] [blame] | 45 | #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) |
| 46 | |
Phil Edworthy | efa4e1b | 2011-06-09 16:22:43 +0100 | [diff] [blame] | 47 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
| 48 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000) |
Phil Edworthy | 7fbeb64 | 2011-06-01 07:35:13 +0100 | [diff] [blame] | 49 | #define CONFIG_SYS_MALLOC_LEN (256 * 1024) |
Phil Edworthy | efa4e1b | 2011-06-09 16:22:43 +0100 | [diff] [blame] | 50 | #define CONFIG_SYS_MONITOR_LEN (128 * 1024) |
| 51 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4*1024*1024) |
Phil Edworthy | 7fbeb64 | 2011-06-01 07:35:13 +0100 | [diff] [blame] | 52 | |
Phil Edworthy | efa4e1b | 2011-06-09 16:22:43 +0100 | [diff] [blame] | 53 | /* Flash */ |
Phil Edworthy | 7fbeb64 | 2011-06-01 07:35:13 +0100 | [diff] [blame] | 54 | #define CONFIG_FLASH_CFI_DRIVER |
| 55 | #define CONFIG_SYS_FLASH_CFI |
| 56 | #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT |
Phil Edworthy | efa4e1b | 2011-06-09 16:22:43 +0100 | [diff] [blame] | 57 | #define CONFIG_SYS_FLASH_BASE 0x20000000 /* Non-cached */ |
Phil Edworthy | 7fbeb64 | 2011-06-01 07:35:13 +0100 | [diff] [blame] | 58 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
Phil Edworthy | efa4e1b | 2011-06-09 16:22:43 +0100 | [diff] [blame] | 59 | #define CONFIG_SYS_MAX_FLASH_SECT 512 |
Phil Edworthy | 7fbeb64 | 2011-06-01 07:35:13 +0100 | [diff] [blame] | 60 | |
Phil Edworthy | efa4e1b | 2011-06-09 16:22:43 +0100 | [diff] [blame] | 61 | #define CONFIG_ENV_IS_IN_FLASH 1 |
| 62 | #define CONFIG_ENV_OFFSET (128 * 1024) |
| 63 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) |
Phil Edworthy | 7fbeb64 | 2011-06-01 07:35:13 +0100 | [diff] [blame] | 64 | #define CONFIG_ENV_SECT_SIZE (128 * 1024) |
| 65 | #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE |
Phil Edworthy | 7fbeb64 | 2011-06-01 07:35:13 +0100 | [diff] [blame] | 66 | |
| 67 | /* Board Clock */ |
| 68 | #define CONFIG_SYS_CLK_FREQ 33333333 |
Phil Edworthy | efa4e1b | 2011-06-09 16:22:43 +0100 | [diff] [blame] | 69 | #define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */ |
Phil Edworthy | 7fbeb64 | 2011-06-01 07:35:13 +0100 | [diff] [blame] | 70 | #define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) |
| 71 | |
| 72 | /* Network interface */ |
Phil Edworthy | 7fbeb64 | 2011-06-01 07:35:13 +0100 | [diff] [blame] | 73 | #define CONFIG_SMC911X |
| 74 | #define CONFIG_SMC911X_16_BIT |
Phil Edworthy | efa4e1b | 2011-06-09 16:22:43 +0100 | [diff] [blame] | 75 | #define CONFIG_SMC911X_BASE 0x28000000 |
Phil Edworthy | 7fbeb64 | 2011-06-01 07:35:13 +0100 | [diff] [blame] | 76 | |
| 77 | #endif /* __RSK7264_H */ |