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wdenkaa245092004-06-09 12:47:02 +00001/*
2 * (C) Copyright 2004
3 * Tolunay Orkun, Nextio Inc., torkun@nextio.com
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * board/config.h - configuration options, board specific
26 */
27
28#ifndef __CONFIG_H
29#define __CONFIG_H
30
31/*
32 * High Level Configuration Options
33 * (easy to change)
34 */
35
Wolfgang Denk53677ef2008-05-20 16:00:29 +020036#define CONFIG_405GP 1 /* This is a PPC405GP CPU */
wdenkaa245092004-06-09 12:47:02 +000037#define CONFIG_4xx 1 /* ...member of PPC4xx family */
38#define CONFIG_CSB472 1 /* on a Cogent CSB472 board */
39#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f() */
40#define CONFIG_LAST_STAGE_INIT 1 /* Call last_stage_init() */
41#define CONFIG_SYS_CLK_FREQ 25000000 /* external frequency to pll */
42
Wolfgang Denk2ae18242010-10-06 09:05:45 +020043#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
44
wdenkaa245092004-06-09 12:47:02 +000045/*
46 * OS Bootstrap configuration
47 *
48 */
49
50#if 0
51#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
52#else
53#define CONFIG_BOOTDELAY 3 /* autoboot after X seconds */
54#endif
55
56#define CONFIG_ZERO_BOOTDELAY_CHECK /* check keypress when bootdelay = 0 */
57
58#if 1
59#undef CONFIG_BOOTARGS
60#define CONFIG_BOOTCOMMAND \
61 "setenv bootargs console=ttyS0,38400 debug " \
62 "root=/dev/ram rw ramdisk_size=4096 " \
Wolfgang Denkfe126d82005-11-20 21:40:11 +010063 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; " \
wdenkaa245092004-06-09 12:47:02 +000064 "bootm ff800000 ff900000"
65#endif
66
67#if 0
68#undef CONFIG_BOOTARGS
69#define CONFIG_BOOTCOMMAND \
70 "bootp; " \
71 "setenv bootargs console=ttyS0,38400 debug " \
Wolfgang Denkfe126d82005-11-20 21:40:11 +010072 "root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \
73 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; " \
wdenkaa245092004-06-09 12:47:02 +000074 "bootm"
75#endif
76
77/*
Jon Loeliger2fd90ce2007-07-09 21:48:26 -050078 * BOOTP options
wdenkaa245092004-06-09 12:47:02 +000079 */
Jon Loeliger2fd90ce2007-07-09 21:48:26 -050080#define CONFIG_BOOTP_SUBNETMASK
81#define CONFIG_BOOTP_GATEWAY
82#define CONFIG_BOOTP_HOSTNAME
83#define CONFIG_BOOTP_BOOTPATH
84#define CONFIG_BOOTP_BOOTFILESIZE
85#define CONFIG_BOOTP_DNS2
86
wdenkaa245092004-06-09 12:47:02 +000087
Jon Loeliger37e4f242007-07-04 22:31:56 -050088/*
89 * Command line configuration.
90 */
91#include <config_cmd_default.h>
92
93#define CONFIG_CMD_ASKENV
94#define CONFIG_CMD_BEDBUG
95#define CONFIG_CMD_ELF
96#define CONFIG_CMD_IRQ
97#define CONFIG_CMD_I2C
98#define CONFIG_CMD_PCI
99#define CONFIG_CMD_DATE
100#define CONFIG_CMD_MII
101#define CONFIG_CMD_PING
102#define CONFIG_CMD_DHCP
103
wdenkaa245092004-06-09 12:47:02 +0000104/*
105 * Serial download configuration
106 *
107 */
108#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200109#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
wdenkaa245092004-06-09 12:47:02 +0000110
111/*
112 * KGDB Configuration
113 *
114 */
Jon Loeliger37e4f242007-07-04 22:31:56 -0500115#if defined(CONFIG_CMD_KGDB)
wdenkaa245092004-06-09 12:47:02 +0000116#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
117#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
118#endif
119
120/*
121 * Miscellaneous configurable options
122 *
123 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200124#undef CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
125#ifdef CONFIG_SYS_HUSH_PARSER
126#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " /* hush shell secondary prompt */
wdenkaa245092004-06-09 12:47:02 +0000127#endif
128
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200129#define CONFIG_SYS_LONGHELP /* undef to save memory */
130#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
Jon Loeliger37e4f242007-07-04 22:31:56 -0500131#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200132#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
wdenkaa245092004-06-09 12:47:02 +0000133#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200134#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
wdenkaa245092004-06-09 12:47:02 +0000135#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200136#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
137#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
138#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
wdenkaa245092004-06-09 12:47:02 +0000139
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200140#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
141#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
wdenkaa245092004-06-09 12:47:02 +0000142
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200143#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200144#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_info (bd_t) */
145#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
wdenkaa245092004-06-09 12:47:02 +0000146
147/*
148 * For booting Linux, the board info and command line data
149 * have to be in the first 8 MB of memory, since this is
150 * the maximum mapped by the Linux kernel during initialization.
151 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200152#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
wdenkaa245092004-06-09 12:47:02 +0000153
154/*
155 * watchdog configuration
156 *
157 */
158#undef CONFIG_WATCHDOG /* watchdog disabled */
159
160/*
161 * UART configuration
162 *
163 */
Stefan Roese550650d2010-09-20 16:05:31 +0200164#define CONFIG_CONS_INDEX 1 /* Use UART0 */
165#define CONFIG_SYS_NS16550
166#define CONFIG_SYS_NS16550_SERIAL
167#define CONFIG_SYS_NS16550_REG_SIZE 1
168#define CONFIG_SYS_NS16550_CLK get_serial_clock()
169
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200170#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* use internal serial clock */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200171#define CONFIG_SYS_BASE_BAUD 691200
wdenkaa245092004-06-09 12:47:02 +0000172#define CONFIG_BAUDRATE 38400 /* Default baud rate */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200173#define CONFIG_SYS_BAUDRATE_TABLE \
wdenkaa245092004-06-09 12:47:02 +0000174 { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400 }
175
176/*
177 * I2C configuration
178 *
179 */
180#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
Stefan Roesed0b0dca2010-04-01 14:37:24 +0200181#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200182#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed */
183#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */
wdenkaa245092004-06-09 12:47:02 +0000184
185/*
186 * MII PHY configuration
187 *
188 */
Ben Warren96e21f82008-10-27 23:50:15 -0700189#define CONFIG_PPC4xx_EMAC
wdenkaa245092004-06-09 12:47:02 +0000190#define CONFIG_MII 1 /* MII PHY management */
191#define CONFIG_PHY_ADDR 0 /* PHY address */
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200192#define CONFIG_PHY_CMD_DELAY 40 /* PHY COMMAND delay */
wdenkaa245092004-06-09 12:47:02 +0000193 /* 32usec min. for LXT971A */
194#define CONFIG_PHY_RESET_DELAY 300 /* PHY RESET recovery delay */
Ben Warren18cc7af2009-04-28 16:50:53 -0700195#define CONFIG_NET_MULTI
wdenkaa245092004-06-09 12:47:02 +0000196
197/*
198 * RTC configuration
199 *
200 * Note that DS1307 RTC is limited to 100Khz I2C bus.
201 *
202 */
203#define CONFIG_RTC_DS1307 /* Use Dallas 1307 RTC */
204
205/*
206 * PCI stuff
207 *
208 */
209#define CONFIG_PCI /* include pci support */
210#define PCI_HOST_ADAPTER 0 /* configure ar pci adapter */
211#define PCI_HOST_FORCE 1 /* configure as pci host */
212#define PCI_HOST_AUTO 2 /* detected via arbiter enable */
213
214#define CONFIG_PCI_HOST PCI_HOST_FORCE /* select pci host function */
215#define CONFIG_PCI_PNP /* do pci plug-and-play */
216 /* resource configuration */
217#undef CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */
218#define CONFIG_PCI_BOOTDELAY 0 /* enable pci bootdelay variable*/
219
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200220#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x0000 /* PCI Vendor ID: to-do!!! */
221#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0x0000 /* PCI Device ID: to-do!!! */
222#define CONFIG_SYS_PCI_PTM1LA 0x00000000 /* point to sdram */
223#define CONFIG_SYS_PCI_PTM1MS 0x80000001 /* 2GB, enable hard-wired to 1 */
224#define CONFIG_SYS_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */
225#define CONFIG_SYS_PCI_PTM2LA 0x00000000 /* disabled */
226#define CONFIG_SYS_PCI_PTM2MS 0x00000000 /* disabled */
227#define CONFIG_SYS_PCI_PTM2PCI 0x04000000 /* Host: use this pci address */
wdenkaa245092004-06-09 12:47:02 +0000228
229/*
230 * IDE stuff
231 *
232 */
233#undef CONFIG_IDE_PCMCIA /* no pcmcia interface required */
234#undef CONFIG_IDE_LED /* no led for ide supported */
235#undef CONFIG_IDE_RESET /* no reset for ide supported */
236
237/*
238 * Environment configuration
239 *
240 */
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200241#define CONFIG_ENV_IS_IN_FLASH 1 /* environment is in FLASH */
Jean-Christophe PLAGNIOL-VILLARD9314cee2008-09-10 22:47:59 +0200242#undef CONFIG_ENV_IS_IN_NVRAM
Jean-Christophe PLAGNIOL-VILLARDbb1f8b42008-09-05 09:19:30 +0200243#undef CONFIG_ENV_IS_IN_EEPROM
wdenkaa245092004-06-09 12:47:02 +0000244
245/*
246 * General Memory organization
247 *
248 * Start addresses for the final memory configuration
249 * (Set up by the startup code)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200250 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
wdenkaa245092004-06-09 12:47:02 +0000251 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200252#define CONFIG_SYS_SDRAM_BASE 0x00000000
253#define CONFIG_SYS_FLASH_BASE 0xFF800000
254#define CONFIG_SYS_FLASH_SIZE 0x00800000
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200255#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200256#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 KB for Monitor */
257#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 KB for malloc() */
wdenkaa245092004-06-09 12:47:02 +0000258
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200259#if CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE
260#define CONFIG_SYS_RAMSTART
wdenkaa245092004-06-09 12:47:02 +0000261#endif
262
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200263#if defined(CONFIG_ENV_IS_IN_FLASH)
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200264#define CONFIG_ENV_IN_OWN_SECTOR 1 /* Give Environment own sector */
265#define CONFIG_ENV_ADDR 0xFFF00000 /* Address of Environment Sector */
266#define CONFIG_ENV_SIZE 0x00001000 /* Size of Environment */
267#define CONFIG_ENV_SECT_SIZE 0x00040000 /* Size of Environment Sector */
wdenkaa245092004-06-09 12:47:02 +0000268#endif
269
270/*
271 * FLASH Device configuration
272 *
273 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200274#define CONFIG_SYS_FLASH_CFI 1 /* flash is CFI conformant */
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200275#define CONFIG_FLASH_CFI_DRIVER 1 /* use common cfi driver */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200276#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
277#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max # of memory banks */
278#define CONFIG_SYS_FLASH_INCREMENT 0 /* there is only one bank */
279#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max # of sectors on one chip */
280#define CONFIG_SYS_FLASH_PROTECTION 1 /* hardware flash protection */
281#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
wdenkaa245092004-06-09 12:47:02 +0000282
283/*
284 * On Chip Memory location/size
285 *
286 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200287#define CONFIG_SYS_OCM_DATA_ADDR 0xF8000000
288#define CONFIG_SYS_OCM_DATA_SIZE 0x1000
wdenkaa245092004-06-09 12:47:02 +0000289
290/*
291 * Global info and initial stack
292 *
293 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200294#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* inside of on-chip SRAM */
Wolfgang Denk553f0982010-10-26 13:32:32 +0200295#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_OCM_DATA_SIZE /* Size of used area in RAM */
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200296#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200297#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
wdenkaa245092004-06-09 12:47:02 +0000298
299/*
wdenkaa245092004-06-09 12:47:02 +0000300 * Miscellaneous board specific definitions
301 *
302 */
303#define CONFIG_I2CFAST 1 /* enable "i2cfast" env. setting */
304
wdenkaa245092004-06-09 12:47:02 +0000305#endif /* __CONFIG_H */