Masahiro Yamada | 6c5431a | 2014-08-31 07:11:04 +0900 | [diff] [blame] | 1 | if OMAP54XX |
| 2 | |
Tom Rini | d5c7753 | 2022-11-19 18:45:21 -0500 | [diff] [blame] | 3 | config IODELAY_RECALIBRATION |
| 4 | bool |
| 5 | |
Uri Mashiach | 67566ab | 2017-02-23 15:39:35 +0200 | [diff] [blame] | 6 | config DRA7XX |
| 7 | bool |
Tom Rini | d5c7753 | 2022-11-19 18:45:21 -0500 | [diff] [blame] | 8 | select IODELAY_RECALIBRATION |
Tom Rini | 789bb95 | 2022-11-16 13:10:32 -0500 | [diff] [blame] | 9 | select SYS_OMAP_ABE_SYSCK |
Uri Mashiach | 67566ab | 2017-02-23 15:39:35 +0200 | [diff] [blame] | 10 | help |
| 11 | DRA7xx is an OMAP based SOC with Dual Core A-15s. |
| 12 | |
Masahiro Yamada | 6c5431a | 2014-08-31 07:11:04 +0900 | [diff] [blame] | 13 | choice |
| 14 | prompt "OMAP5 board select" |
Joe Hershberger | a26cd04 | 2015-05-12 14:46:23 -0500 | [diff] [blame] | 15 | optional |
Masahiro Yamada | 6c5431a | 2014-08-31 07:11:04 +0900 | [diff] [blame] | 16 | |
| 17 | config TARGET_CM_T54 |
| 18 | bool "CompuLab CM-T54" |
| 19 | |
| 20 | config TARGET_OMAP5_UEVM |
| 21 | bool "TI OMAP5 uEVM board" |
| 22 | |
| 23 | config TARGET_DRA7XX_EVM |
| 24 | bool "TI DRA7XX" |
Tom Rini | e5ec481 | 2017-01-22 19:43:11 -0500 | [diff] [blame] | 25 | select BOARD_LATE_INIT |
Uri Mashiach | 67566ab | 2017-02-23 15:39:35 +0200 | [diff] [blame] | 26 | select DRA7XX |
Masahiro Yamada | bb6b142 | 2016-07-25 19:56:03 +0900 | [diff] [blame] | 27 | select PHYS_64BIT |
Michal Simek | 58008cb | 2018-07-23 15:55:15 +0200 | [diff] [blame] | 28 | select TI_I2C_BOARD_DETECT |
Lokesh Vutla | 0537e09 | 2017-08-21 12:50:51 +0530 | [diff] [blame] | 29 | imply DM_PMIC |
Lokesh Vutla | 0537e09 | 2017-08-21 12:50:51 +0530 | [diff] [blame] | 30 | imply DM_REGULATOR |
| 31 | imply DM_REGULATOR_LP87565 |
Faiz Abbas | 16fa2eb | 2017-11-14 16:12:33 +0530 | [diff] [blame] | 32 | imply DM_THERMAL |
Michal Simek | 58008cb | 2018-07-23 15:55:15 +0200 | [diff] [blame] | 33 | imply PMIC_LP87565 |
| 34 | imply SCSI |
| 35 | imply SPL_THERMAL |
Faiz Abbas | 16fa2eb | 2017-11-14 16:12:33 +0530 | [diff] [blame] | 36 | imply TI_DRA7_THERMAL |
Masahiro Yamada | 6c5431a | 2014-08-31 07:11:04 +0900 | [diff] [blame] | 37 | |
Lokesh Vutla | 165bd7a | 2016-06-10 09:35:42 +0530 | [diff] [blame] | 38 | config TARGET_AM57XX_EVM |
| 39 | bool "AM57XX" |
Tom Rini | e5ec481 | 2017-01-22 19:43:11 -0500 | [diff] [blame] | 40 | select BOARD_LATE_INIT |
Michal Simek | 58008cb | 2018-07-23 15:55:15 +0200 | [diff] [blame] | 41 | select CMD_DDR3 |
Uri Mashiach | 67566ab | 2017-02-23 15:39:35 +0200 | [diff] [blame] | 42 | select DRA7XX |
Kipisz, Steven | 212f96f | 2016-02-24 12:30:58 -0600 | [diff] [blame] | 43 | select TI_I2C_BOARD_DETECT |
Kory Maincent | 0705e25 | 2021-05-04 19:31:25 +0200 | [diff] [blame] | 44 | select SUPPORT_EXTENSION_SCAN |
Michal Simek | 58008cb | 2018-07-23 15:55:15 +0200 | [diff] [blame] | 45 | imply DM_THERMAL |
Simon Glass | fedb428 | 2017-06-14 21:28:21 -0600 | [diff] [blame] | 46 | imply SCSI |
Faiz Abbas | 16fa2eb | 2017-11-14 16:12:33 +0530 | [diff] [blame] | 47 | imply SPL_THERMAL |
Faiz Abbas | 16fa2eb | 2017-11-14 16:12:33 +0530 | [diff] [blame] | 48 | imply TI_DRA7_THERMAL |
Felipe Balbi | 1e4ad74 | 2014-11-10 14:02:44 -0600 | [diff] [blame] | 49 | |
Masahiro Yamada | 6c5431a | 2014-08-31 07:11:04 +0900 | [diff] [blame] | 50 | endchoice |
| 51 | |
Masahiro Yamada | 6c5431a | 2014-08-31 07:11:04 +0900 | [diff] [blame] | 52 | config SYS_SOC |
Masahiro Yamada | 6c5431a | 2014-08-31 07:11:04 +0900 | [diff] [blame] | 53 | default "omap5" |
| 54 | |
Tom Rini | d87f829 | 2017-05-12 22:33:17 -0400 | [diff] [blame] | 55 | config OMAP_PLATFORM_RESET_TIME_MAX_USEC |
| 56 | int "Something" |
| 57 | range 0 31219 |
| 58 | default 31219 |
| 59 | help |
| 60 | Most OMAPs' provide a way to specify the time for which the reset |
| 61 | should be held low while the voltages and Oscillator outputs |
| 62 | stabilize. |
| 63 | This time is mostly board and PMIC dependent. Hence the boards are |
| 64 | expected to specify a pre-computed time using the above option. |
| 65 | This value can be computed using a summation of the below 3 |
| 66 | parameters |
| 67 | 1: Time taken by the Osciallator to stop and restart |
| 68 | 2: PMIC OTP time |
| 69 | 3: Voltage ramp time, which can be derived using the PMIC slew rate |
| 70 | and value of voltage ramp needed. |
| 71 | |
Suman Anna | fba82eb | 2016-11-23 12:54:40 +0530 | [diff] [blame] | 72 | if TARGET_DRA7XX_EVM || TARGET_AM57XX_EVM |
| 73 | menu "Voltage Domain OPP selections" |
| 74 | |
| 75 | choice |
| 76 | prompt "MPU Voltage Domain" |
| 77 | default DRA7_MPU_OPP_NOM |
| 78 | help |
| 79 | Select the Operating Performance Point(OPP) for the MPU voltage |
| 80 | domain on DRA7xx & AM57xx SoCs. |
| 81 | |
| 82 | config DRA7_MPU_OPP_NOM |
| 83 | bool "OPP NOM" |
| 84 | help |
| 85 | This config option enables Normal OPP for MPU. This is the safest |
| 86 | option for booting. |
| 87 | |
| 88 | endchoice |
| 89 | |
| 90 | choice |
| 91 | prompt "DSPEVE Voltage Domain" |
| 92 | help |
| 93 | Select the Operating Performance Point(OPP) for the DSPEVE voltage |
| 94 | domain on DRA7xx & AM57xx SoCs. |
| 95 | |
| 96 | config DRA7_DSPEVE_OPP_NOM |
| 97 | bool "OPP NOM" |
| 98 | help |
| 99 | This config option enables Normal OPP for DSPEVE. This is the safest |
| 100 | option for booting and choose this when unsure about other OPPs . |
| 101 | |
| 102 | config DRA7_DSPEVE_OPP_OD |
| 103 | bool "OPP OD" |
| 104 | help |
| 105 | This config option enables Over drive OPP for DSPEVE. |
| 106 | |
| 107 | config DRA7_DSPEVE_OPP_HIGH |
| 108 | bool "OPP HIGH" |
| 109 | help |
| 110 | This config option enables High OPP for DSPEVE. |
| 111 | |
| 112 | endchoice |
| 113 | |
| 114 | choice |
| 115 | prompt "IVA Voltage Domain" |
| 116 | help |
| 117 | Select the Operating Performance Point(OPP) for the IVA voltage |
| 118 | domain on DRA7xx & AM57xx SoCs. |
| 119 | |
| 120 | config DRA7_IVA_OPP_NOM |
| 121 | bool "OPP NOM" |
| 122 | help |
| 123 | This config option enables Normal OPP for IVA. This is the safest |
| 124 | option for booting and choose this when unsure about other OPPs . |
| 125 | |
| 126 | config DRA7_IVA_OPP_OD |
| 127 | bool "OPP OD" |
| 128 | help |
| 129 | This config option enables Over drive OPP for IVA. |
| 130 | |
| 131 | config DRA7_IVA_OPP_HIGH |
| 132 | bool "OPP HIGH" |
| 133 | help |
| 134 | This config option enables High OPP for IVA. |
| 135 | |
| 136 | endchoice |
| 137 | |
| 138 | choice |
| 139 | prompt "GPU Voltage Domain" |
| 140 | help |
| 141 | Select the Operating Performance Point(OPP) for the GPU voltage |
| 142 | domain on DRA7xx & AM57xx SoCs. |
| 143 | |
| 144 | config DRA7_GPU_OPP_NOM |
| 145 | bool "OPP NOM" |
| 146 | help |
| 147 | This config option enables Normal OPP for GPU. This is the safest |
| 148 | option for booting and choose this when unsure about other OPPs . |
| 149 | |
| 150 | config DRA7_GPU_OPP_OD |
| 151 | bool "OPP OD" |
| 152 | help |
| 153 | This config option enables Over drive OPP for GPU. |
| 154 | |
| 155 | config DRA7_GPU_OPP_HIGH |
| 156 | bool "OPP HIGH" |
| 157 | help |
| 158 | This config option enables High OPP for GPU. |
| 159 | |
| 160 | endchoice |
| 161 | |
| 162 | endmenu |
| 163 | endif |
| 164 | |
Masahiro Yamada | 6c5431a | 2014-08-31 07:11:04 +0900 | [diff] [blame] | 165 | source "board/ti/omap5_uevm/Kconfig" |
| 166 | source "board/ti/dra7xx/Kconfig" |
Kipisz, Steven | 74cc8b0 | 2015-10-29 16:50:43 -0500 | [diff] [blame] | 167 | source "board/ti/am57xx/Kconfig" |
Masahiro Yamada | 6c5431a | 2014-08-31 07:11:04 +0900 | [diff] [blame] | 168 | |
| 169 | endif |