blob: 0787d192b696b6ba02203f07e5f04e3da7985090 [file] [log] [blame]
Masahiro Yamada6c5431a2014-08-31 07:11:04 +09001if OMAP54XX
2
Tom Rinid5c77532022-11-19 18:45:21 -05003config IODELAY_RECALIBRATION
4 bool
5
Uri Mashiach67566ab2017-02-23 15:39:35 +02006config DRA7XX
7 bool
Tom Rinid5c77532022-11-19 18:45:21 -05008 select IODELAY_RECALIBRATION
Tom Rini789bb952022-11-16 13:10:32 -05009 select SYS_OMAP_ABE_SYSCK
Uri Mashiach67566ab2017-02-23 15:39:35 +020010 help
11 DRA7xx is an OMAP based SOC with Dual Core A-15s.
12
Masahiro Yamada6c5431a2014-08-31 07:11:04 +090013choice
14 prompt "OMAP5 board select"
Joe Hershbergera26cd042015-05-12 14:46:23 -050015 optional
Masahiro Yamada6c5431a2014-08-31 07:11:04 +090016
17config TARGET_CM_T54
18 bool "CompuLab CM-T54"
19
20config TARGET_OMAP5_UEVM
21 bool "TI OMAP5 uEVM board"
22
23config TARGET_DRA7XX_EVM
24 bool "TI DRA7XX"
Tom Rinie5ec4812017-01-22 19:43:11 -050025 select BOARD_LATE_INIT
Uri Mashiach67566ab2017-02-23 15:39:35 +020026 select DRA7XX
Masahiro Yamadabb6b1422016-07-25 19:56:03 +090027 select PHYS_64BIT
Michal Simek58008cb2018-07-23 15:55:15 +020028 select TI_I2C_BOARD_DETECT
Lokesh Vutla0537e092017-08-21 12:50:51 +053029 imply DM_PMIC
Lokesh Vutla0537e092017-08-21 12:50:51 +053030 imply DM_REGULATOR
31 imply DM_REGULATOR_LP87565
Faiz Abbas16fa2eb2017-11-14 16:12:33 +053032 imply DM_THERMAL
Michal Simek58008cb2018-07-23 15:55:15 +020033 imply PMIC_LP87565
34 imply SCSI
35 imply SPL_THERMAL
Faiz Abbas16fa2eb2017-11-14 16:12:33 +053036 imply TI_DRA7_THERMAL
Masahiro Yamada6c5431a2014-08-31 07:11:04 +090037
Lokesh Vutla165bd7a2016-06-10 09:35:42 +053038config TARGET_AM57XX_EVM
39 bool "AM57XX"
Tom Rinie5ec4812017-01-22 19:43:11 -050040 select BOARD_LATE_INIT
Michal Simek58008cb2018-07-23 15:55:15 +020041 select CMD_DDR3
Uri Mashiach67566ab2017-02-23 15:39:35 +020042 select DRA7XX
Kipisz, Steven212f96f2016-02-24 12:30:58 -060043 select TI_I2C_BOARD_DETECT
Kory Maincent0705e252021-05-04 19:31:25 +020044 select SUPPORT_EXTENSION_SCAN
Michal Simek58008cb2018-07-23 15:55:15 +020045 imply DM_THERMAL
Simon Glassfedb4282017-06-14 21:28:21 -060046 imply SCSI
Faiz Abbas16fa2eb2017-11-14 16:12:33 +053047 imply SPL_THERMAL
Faiz Abbas16fa2eb2017-11-14 16:12:33 +053048 imply TI_DRA7_THERMAL
Felipe Balbi1e4ad742014-11-10 14:02:44 -060049
Masahiro Yamada6c5431a2014-08-31 07:11:04 +090050endchoice
51
Masahiro Yamada6c5431a2014-08-31 07:11:04 +090052config SYS_SOC
Masahiro Yamada6c5431a2014-08-31 07:11:04 +090053 default "omap5"
54
Tom Rinid87f8292017-05-12 22:33:17 -040055config OMAP_PLATFORM_RESET_TIME_MAX_USEC
56 int "Something"
57 range 0 31219
58 default 31219
59 help
60 Most OMAPs' provide a way to specify the time for which the reset
61 should be held low while the voltages and Oscillator outputs
62 stabilize.
63 This time is mostly board and PMIC dependent. Hence the boards are
64 expected to specify a pre-computed time using the above option.
65 This value can be computed using a summation of the below 3
66 parameters
67 1: Time taken by the Osciallator to stop and restart
68 2: PMIC OTP time
69 3: Voltage ramp time, which can be derived using the PMIC slew rate
70 and value of voltage ramp needed.
71
Suman Annafba82eb2016-11-23 12:54:40 +053072if TARGET_DRA7XX_EVM || TARGET_AM57XX_EVM
73menu "Voltage Domain OPP selections"
74
75choice
76 prompt "MPU Voltage Domain"
77 default DRA7_MPU_OPP_NOM
78 help
79 Select the Operating Performance Point(OPP) for the MPU voltage
80 domain on DRA7xx & AM57xx SoCs.
81
82config DRA7_MPU_OPP_NOM
83 bool "OPP NOM"
84 help
85 This config option enables Normal OPP for MPU. This is the safest
86 option for booting.
87
88endchoice
89
90choice
91 prompt "DSPEVE Voltage Domain"
92 help
93 Select the Operating Performance Point(OPP) for the DSPEVE voltage
94 domain on DRA7xx & AM57xx SoCs.
95
96config DRA7_DSPEVE_OPP_NOM
97 bool "OPP NOM"
98 help
99 This config option enables Normal OPP for DSPEVE. This is the safest
100 option for booting and choose this when unsure about other OPPs .
101
102config DRA7_DSPEVE_OPP_OD
103 bool "OPP OD"
104 help
105 This config option enables Over drive OPP for DSPEVE.
106
107config DRA7_DSPEVE_OPP_HIGH
108 bool "OPP HIGH"
109 help
110 This config option enables High OPP for DSPEVE.
111
112endchoice
113
114choice
115 prompt "IVA Voltage Domain"
116 help
117 Select the Operating Performance Point(OPP) for the IVA voltage
118 domain on DRA7xx & AM57xx SoCs.
119
120config DRA7_IVA_OPP_NOM
121 bool "OPP NOM"
122 help
123 This config option enables Normal OPP for IVA. This is the safest
124 option for booting and choose this when unsure about other OPPs .
125
126config DRA7_IVA_OPP_OD
127 bool "OPP OD"
128 help
129 This config option enables Over drive OPP for IVA.
130
131config DRA7_IVA_OPP_HIGH
132 bool "OPP HIGH"
133 help
134 This config option enables High OPP for IVA.
135
136endchoice
137
138choice
139 prompt "GPU Voltage Domain"
140 help
141 Select the Operating Performance Point(OPP) for the GPU voltage
142 domain on DRA7xx & AM57xx SoCs.
143
144config DRA7_GPU_OPP_NOM
145 bool "OPP NOM"
146 help
147 This config option enables Normal OPP for GPU. This is the safest
148 option for booting and choose this when unsure about other OPPs .
149
150config DRA7_GPU_OPP_OD
151 bool "OPP OD"
152 help
153 This config option enables Over drive OPP for GPU.
154
155config DRA7_GPU_OPP_HIGH
156 bool "OPP HIGH"
157 help
158 This config option enables High OPP for GPU.
159
160endchoice
161
162endmenu
163endif
164
Masahiro Yamada6c5431a2014-08-31 07:11:04 +0900165source "board/ti/omap5_uevm/Kconfig"
166source "board/ti/dra7xx/Kconfig"
Kipisz, Steven74cc8b02015-10-29 16:50:43 -0500167source "board/ti/am57xx/Kconfig"
Masahiro Yamada6c5431a2014-08-31 07:11:04 +0900168
169endif