Masahiro Yamada | 8138581 | 2016-01-12 16:36:38 +0900 | [diff] [blame] | 1 | menu "Clock" |
| 2 | |
Simon Glass | f26c8a8 | 2015-06-23 15:39:15 -0600 | [diff] [blame] | 3 | config CLK |
| 4 | bool "Enable clock driver support" |
| 5 | depends on DM |
| 6 | help |
| 7 | This allows drivers to be provided for clock generators, including |
| 8 | oscillators and PLLs. Devices can use a common clock API to request |
| 9 | a particular clock rate and check on available clocks. Clocks can |
| 10 | feed into other clocks in a tree structure, with multiplexers to |
| 11 | choose the source for each clock. |
| 12 | |
Masahiro Yamada | 0543589 | 2015-08-12 07:31:46 +0900 | [diff] [blame] | 13 | config SPL_CLK |
Simon Glass | f26c8a8 | 2015-06-23 15:39:15 -0600 | [diff] [blame] | 14 | bool "Enable clock support in SPL" |
Wenyou Yang | 0712b67 | 2017-07-31 15:21:57 +0800 | [diff] [blame] | 15 | depends on CLK && SPL && SPL_DM |
Simon Glass | f26c8a8 | 2015-06-23 15:39:15 -0600 | [diff] [blame] | 16 | help |
| 17 | The clock subsystem adds a small amount of overhead to the image. |
| 18 | If this is acceptable and you have a need to use clock drivers in |
| 19 | SPL, enable this option. It might provide a cleaner interface to |
| 20 | setting up clocks within SPL, and allows the same drivers to be |
| 21 | used as U-Boot proper. |
Masahiro Yamada | 8138581 | 2016-01-12 16:36:38 +0900 | [diff] [blame] | 22 | |
Philipp Tomsich | 7c819e7 | 2017-06-29 01:45:01 +0200 | [diff] [blame] | 23 | config TPL_CLK |
| 24 | bool "Enable clock support in TPL" |
| 25 | depends on CLK && TPL_DM |
| 26 | help |
| 27 | The clock subsystem adds a small amount of overhead to the image. |
| 28 | If this is acceptable and you have a need to use clock drivers in |
| 29 | SPL, enable this option. It might provide a cleaner interface to |
| 30 | setting up clocks within TPL, and allows the same drivers to be |
| 31 | used as U-Boot proper. |
| 32 | |
Álvaro Fernández Rojas | 5357eb9 | 2017-05-07 20:13:01 +0200 | [diff] [blame] | 33 | config CLK_BCM6345 |
| 34 | bool "Clock controller driver for BCM6345" |
| 35 | depends on CLK && ARCH_BMIPS |
| 36 | default y |
| 37 | help |
| 38 | This clock driver adds support for enabling and disabling peripheral |
| 39 | clocks on BCM6345 SoCs. HW has no rate changing capabilities. |
| 40 | |
Paul Burton | dd7c749 | 2016-09-08 07:47:38 +0100 | [diff] [blame] | 41 | config CLK_BOSTON |
| 42 | def_bool y if TARGET_BOSTON |
| 43 | depends on CLK |
| 44 | select REGMAP |
| 45 | select SYSCON |
| 46 | help |
| 47 | Enable this to support the clocks |
| 48 | |
Lukasz Majewski | 1d7993d | 2019-06-24 15:50:45 +0200 | [diff] [blame] | 49 | config SPL_CLK_CCF |
| 50 | bool "SPL Common Clock Framework [CCF] support " |
Adam Ford | a074667 | 2019-08-24 13:50:34 -0500 | [diff] [blame] | 51 | depends on SPL |
Lukasz Majewski | 1d7993d | 2019-06-24 15:50:45 +0200 | [diff] [blame] | 52 | help |
| 53 | Enable this option if you want to (re-)use the Linux kernel's Common |
| 54 | Clock Framework [CCF] code in U-Boot's SPL. |
| 55 | |
Peng Fan | 0009763 | 2019-07-31 07:01:54 +0000 | [diff] [blame] | 56 | config SPL_CLK_COMPOSITE_CCF |
| 57 | bool "SPL Common Clock Framework [CCF] composite clk support " |
| 58 | depends on SPL_CLK_CCF |
| 59 | help |
| 60 | Enable this option if you want to (re-)use the Linux kernel's Common |
| 61 | Clock Framework [CCF] composite code in U-Boot's SPL. |
| 62 | |
Lukasz Majewski | 1d7993d | 2019-06-24 15:50:45 +0200 | [diff] [blame] | 63 | config CLK_CCF |
| 64 | bool "Common Clock Framework [CCF] support " |
Lukasz Majewski | 1d7993d | 2019-06-24 15:50:45 +0200 | [diff] [blame] | 65 | help |
| 66 | Enable this option if you want to (re-)use the Linux kernel's Common |
| 67 | Clock Framework [CCF] code in U-Boot's clock driver. |
| 68 | |
Peng Fan | 0009763 | 2019-07-31 07:01:54 +0000 | [diff] [blame] | 69 | config CLK_COMPOSITE_CCF |
| 70 | bool "Common Clock Framework [CCF] composite clk support " |
| 71 | depends on CLK_CCF |
| 72 | help |
| 73 | Enable this option if you want to (re-)use the Linux kernel's Common |
| 74 | Clock Framework [CCF] composite code in U-Boot's clock driver. |
| 75 | |
Patrice Chotard | f264e23 | 2017-11-15 13:14:48 +0100 | [diff] [blame] | 76 | config CLK_STM32F |
| 77 | bool "Enable clock driver support for STM32F family" |
| 78 | depends on CLK && (STM32F7 || STM32F4) |
| 79 | default y |
| 80 | help |
| 81 | This clock driver adds support for RCC clock management |
| 82 | for STM32F4 and STM32F7 SoCs. |
| 83 | |
Andreas Dannenberg | e585bef | 2018-08-27 15:57:43 +0530 | [diff] [blame] | 84 | config CLK_TI_SCI |
| 85 | bool "TI System Control Interface (TI SCI) clock driver" |
| 86 | depends on CLK && TI_SCI_PROTOCOL && OF_CONTROL |
| 87 | help |
| 88 | This enables the clock driver support over TI System Control Interface |
| 89 | available on some new TI's SoCs. If you wish to use clock resources |
| 90 | managed by the TI System Controller, say Y here. Otherwise, say N. |
| 91 | |
Eugeniy Paltsev | e80dac0 | 2017-12-10 21:20:08 +0300 | [diff] [blame] | 92 | config CLK_HSDK |
| 93 | bool "Enable cgu clock driver for HSDK" |
| 94 | depends on CLK |
| 95 | help |
| 96 | Enable this to support the cgu clocks on Synopsys ARC HSDK |
| 97 | |
Liviu Dudau | a71e907 | 2018-09-17 17:50:00 +0100 | [diff] [blame] | 98 | config CLK_VEXPRESS_OSC |
| 99 | bool "Enable driver for Arm Versatile Express OSC clock generators" |
| 100 | depends on CLK && VEXPRESS_CONFIG |
| 101 | help |
| 102 | This clock driver adds support for clock generators present on |
| 103 | Arm Versatile Express platforms. |
| 104 | |
Stefan Herbrechtsmeier | 3a64b25 | 2017-01-17 16:27:29 +0100 | [diff] [blame] | 105 | config CLK_ZYNQ |
| 106 | bool "Enable clock driver support for Zynq" |
| 107 | depends on CLK && ARCH_ZYNQ |
| 108 | default y |
| 109 | help |
| 110 | This clock driver adds support for clock realted settings for |
| 111 | Zynq platform. |
| 112 | |
Siva Durga Prasad Paladugu | 128ec1f | 2016-11-15 16:15:41 +0530 | [diff] [blame] | 113 | config CLK_ZYNQMP |
| 114 | bool "Enable clock driver support for ZynqMP" |
| 115 | depends on ARCH_ZYNQMP |
Rajan Vaja | 14723ed | 2019-02-15 04:45:32 -0800 | [diff] [blame^] | 116 | select ZYNQMP_FIRMWARE |
Siva Durga Prasad Paladugu | 128ec1f | 2016-11-15 16:15:41 +0530 | [diff] [blame] | 117 | help |
| 118 | This clock driver adds support for clock realted settings for |
| 119 | ZynqMP platform. |
| 120 | |
Patrick Delaunay | a615191 | 2018-03-12 10:46:15 +0100 | [diff] [blame] | 121 | config CLK_STM32MP1 |
| 122 | bool "Enable RCC clock driver for STM32MP1" |
| 123 | depends on ARCH_STM32MP && CLK |
| 124 | default y |
| 125 | help |
| 126 | Enable the STM32 clock (RCC) driver. Enable support for |
| 127 | manipulating STM32MP1's on-SoC clocks. |
| 128 | |
Anup Patel | d04c79d | 2019-06-25 06:31:02 +0000 | [diff] [blame] | 129 | source "drivers/clk/analogbits/Kconfig" |
Wenyou Yang | 9e5935c | 2016-07-20 17:55:12 +0800 | [diff] [blame] | 130 | source "drivers/clk/at91/Kconfig" |
Jagan Teki | cf68225 | 2018-07-30 18:26:18 +0530 | [diff] [blame] | 131 | source "drivers/clk/exynos/Kconfig" |
Peng Fan | f77d441 | 2018-10-18 14:28:30 +0200 | [diff] [blame] | 132 | source "drivers/clk/imx/Kconfig" |
Jerome Brunet | f5abfed | 2019-02-10 14:54:30 +0100 | [diff] [blame] | 133 | source "drivers/clk/meson/Kconfig" |
Marek Behún | 82a248d | 2018-04-24 17:21:25 +0200 | [diff] [blame] | 134 | source "drivers/clk/mvebu/Kconfig" |
Manivannan Sadhasivam | ae485b5 | 2018-06-14 23:38:35 +0530 | [diff] [blame] | 135 | source "drivers/clk/owl/Kconfig" |
Jagan Teki | cf68225 | 2018-07-30 18:26:18 +0530 | [diff] [blame] | 136 | source "drivers/clk/renesas/Kconfig" |
Jagan Teki | 0d47bc7 | 2018-12-22 21:32:49 +0530 | [diff] [blame] | 137 | source "drivers/clk/sunxi/Kconfig" |
Anup Patel | c40b6df | 2019-02-25 08:14:49 +0000 | [diff] [blame] | 138 | source "drivers/clk/sifive/Kconfig" |
Jagan Teki | cf68225 | 2018-07-30 18:26:18 +0530 | [diff] [blame] | 139 | source "drivers/clk/tegra/Kconfig" |
| 140 | source "drivers/clk/uniphier/Kconfig" |
Masahiro Yamada | 48264d9 | 2016-02-02 21:11:32 +0900 | [diff] [blame] | 141 | |
Mario Six | f0bcbe6 | 2018-04-27 14:53:15 +0200 | [diff] [blame] | 142 | config ICS8N3QV01 |
| 143 | bool "Enable ICS8N3QV01 VCXO driver" |
| 144 | depends on CLK |
| 145 | help |
| 146 | Support for the ICS8N3QV01 Quad-Frequency VCXO (Voltage-Controlled |
| 147 | Crystal Oscillator). The output frequency can be programmed via an |
| 148 | I2C interface. |
| 149 | |
Mario Six | 07d538d | 2018-08-06 10:23:36 +0200 | [diff] [blame] | 150 | config CLK_MPC83XX |
| 151 | bool "Enable MPC83xx clock driver" |
| 152 | depends on CLK |
| 153 | help |
| 154 | Support for the clock driver of the MPC83xx series of SoCs. |
| 155 | |
Lukasz Majewski | 87e460c | 2019-06-24 15:50:50 +0200 | [diff] [blame] | 156 | config SANDBOX_CLK_CCF |
| 157 | bool "Sandbox Common Clock Framework [CCF] support " |
| 158 | depends on SANDBOX |
| 159 | select CLK_CCF |
| 160 | help |
| 161 | Enable this option if you want to test the Linux kernel's Common |
| 162 | Clock Framework [CCF] code in U-Boot's Sandbox clock driver. |
| 163 | |
Masahiro Yamada | 8138581 | 2016-01-12 16:36:38 +0900 | [diff] [blame] | 164 | endmenu |