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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 0f65779118db26e41760051c45bd3fe54b3abcb3 / . / arch / arm / dts / rk3399-u-boot.dtsi
blob: 0b0a90acf4318dbd2510bda0c8bd34fda2cec9ce [file] [log] [blame]
Jagan Tekie05b4a42019-03-11 13:50:03 +0530[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
4 */
Peter Robinson5532e3b2020-01-20 09:17:00 +0000[diff] [blame]5#define USB_CLASS_HUB 9
Jagan Tekie05b4a42019-03-11 13:50:03 +0530[diff] [blame]6
Simon Glassc4cea2b2020-07-19 13:55:58 -0600[diff] [blame]7#include "rockchip-u-boot.dtsi"
8
Peter Robinson5532e3b2020-01-20 09:17:00 +0000[diff] [blame]9/ {
10 aliases {
11 mmc0 = &sdhci;
12 mmc1 = &sdmmc;
Jagan Teki765a12d2020-05-09 22:26:23 +0530[diff] [blame]13 pci0 = &pcie0;
Simon Glassc4cea2b2020-07-19 13:55:58 -0600[diff] [blame]14 spi1 = &spi1;
Peter Robinson5532e3b2020-01-20 09:17:00 +0000[diff] [blame]15 };
16
17 cic: syscon@ff620000 {
Simon Glass8c103c32023-02-13 08:56:33 -0700[diff] [blame]18 bootph-all;
Peter Robinson5532e3b2020-01-20 09:17:00 +0000[diff] [blame]19 compatible = "rockchip,rk3399-cic", "syscon";
20 reg = <0x0 0xff620000 0x0 0x100>;
21 };
22
23 dfi: dfi@ff630000 {
Simon Glass8c103c32023-02-13 08:56:33 -0700[diff] [blame]24 bootph-all;
Peter Robinson5532e3b2020-01-20 09:17:00 +0000[diff] [blame]25 reg = <0x00 0xff630000 0x00 0x4000>;
26 compatible = "rockchip,rk3399-dfi";
27 rockchip,pmu = <&pmugrf>;
28 clocks = <&cru PCLK_DDR_MON>;
29 clock-names = "pclk_ddr_mon";
30 };
31
Lin Jinhan91e858d2020-03-31 17:39:57 +0800[diff] [blame]32 rng: rng@ff8b8000 {
Jonas Karlman1bc79dc2024-02-17 00:22:36 +0000[diff] [blame]33 compatible = "rockchip,rk3399-crypto";
Lin Jinhan91e858d2020-03-31 17:39:57 +0800[diff] [blame]34 reg = <0x0 0xff8b8000 0x0 0x1000>;
Lin Jinhan91e858d2020-03-31 17:39:57 +0800[diff] [blame]35 };
36
Peter Robinson5532e3b2020-01-20 09:17:00 +0000[diff] [blame]37 dmc: dmc {
Simon Glass8c103c32023-02-13 08:56:33 -0700[diff] [blame]38 bootph-all;
Peter Robinson5532e3b2020-01-20 09:17:00 +0000[diff] [blame]39 compatible = "rockchip,rk3399-dmc";
40 devfreq-events = <&dfi>;
41 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>;
42 clocks = <&cru SCLK_DDRCLK>;
43 clock-names = "dmc_clk";
44 reg = <0x0 0xffa80000 0x0 0x0800
45 0x0 0xffa80800 0x0 0x1800
46 0x0 0xffa82000 0x0 0x2000
47 0x0 0xffa84000 0x0 0x1000
48 0x0 0xffa88000 0x0 0x0800
49 0x0 0xffa88800 0x0 0x1800
50 0x0 0xffa8a000 0x0 0x2000
51 0x0 0xffa8c000 0x0 0x1000>;
52 };
53
54 pmusgrf: syscon@ff330000 {
Simon Glass8c103c32023-02-13 08:56:33 -0700[diff] [blame]55 bootph-all;
Peter Robinson5532e3b2020-01-20 09:17:00 +0000[diff] [blame]56 compatible = "rockchip,rk3399-pmusgrf", "syscon";
57 reg = <0x0 0xff330000 0x0 0xe3d4>;
58 };
59
Peter Robinsonf459e232019-11-09 20:30:05 +0000[diff] [blame]60};
61
Quentin Schulza4bb36d2022-09-02 15:10:54 +0200[diff] [blame]62#if defined(CONFIG_ROCKCHIP_SPI_IMAGE) && defined(CONFIG_HAS_ROM)
Simon Glassc4cea2b2020-07-19 13:55:58 -0600[diff] [blame]63&binman {
Simon Glass4170dd92023-01-07 14:07:17 -0700[diff] [blame]64 multiple-images;
Simon Glassc4cea2b2020-07-19 13:55:58 -0600[diff] [blame]65 rom {
66 filename = "u-boot.rom";
67 size = <0x400000>;
68 pad-byte = <0xff>;
69
70 mkimage {
71 args = "-n rk3399 -T rkspi";
72 u-boot-spl {
73 };
74 };
75 u-boot-img {
76 offset = <0x40000>;
77 };
78 u-boot {
79 offset = <0x300000>;
80 };
81 fdtmap {
82 };
83 };
84};
Simon Glass4170dd92023-01-07 14:07:17 -0700[diff] [blame]85#endif /* CONFIG_ROCKCHIP_SPI_IMAGE && CONFIG_HAS_ROM */
Simon Glassc4cea2b2020-07-19 13:55:58 -0600[diff] [blame]86
Peter Robinsonf459e232019-11-09 20:30:05 +0000[diff] [blame]87&cru {
Simon Glass8c103c32023-02-13 08:56:33 -0700[diff] [blame]88 bootph-all;
Peter Robinsonf459e232019-11-09 20:30:05 +0000[diff] [blame]89};
90
Yifeng Zhaof8b36082021-11-01 12:43:47 +0800[diff] [blame]91&emmc_phy {
Simon Glass8c103c32023-02-13 08:56:33 -0700[diff] [blame]92 bootph-all;
Yifeng Zhaof8b36082021-11-01 12:43:47 +0800[diff] [blame]93};
94
Peter Robinsonf459e232019-11-09 20:30:05 +0000[diff] [blame]95&grf {
Simon Glass8c103c32023-02-13 08:56:33 -0700[diff] [blame]96 bootph-all;
Peter Robinsonf459e232019-11-09 20:30:05 +0000[diff] [blame]97};
98
99&pinctrl {
Simon Glass8c103c32023-02-13 08:56:33 -0700[diff] [blame]100 bootph-all;
Peter Robinsonf459e232019-11-09 20:30:05 +0000[diff] [blame]101};
102
Jagan Tekiab0ce362019-07-16 17:27:34 +0530[diff] [blame]103&pmu {
Simon Glass8c103c32023-02-13 08:56:33 -0700[diff] [blame]104 bootph-all;
Jagan Tekiab0ce362019-07-16 17:27:34 +0530[diff] [blame]105};
106
Peter Robinsonf459e232019-11-09 20:30:05 +0000[diff] [blame]107&pmugrf {
Simon Glass8c103c32023-02-13 08:56:33 -0700[diff] [blame]108 bootph-all;
Peter Robinsonf459e232019-11-09 20:30:05 +0000[diff] [blame]109};
110
111&pmu {
Simon Glass8c103c32023-02-13 08:56:33 -0700[diff] [blame]112 bootph-all;
Peter Robinsonf459e232019-11-09 20:30:05 +0000[diff] [blame]113};
114
115&pmucru {
Simon Glass8c103c32023-02-13 08:56:33 -0700[diff] [blame]116 bootph-all;
Peter Robinsonf459e232019-11-09 20:30:05 +0000[diff] [blame]117};
118
Peter Robinsonf459e232019-11-09 20:30:05 +0000[diff] [blame]119&sdhci {
Jagan Teki167efc22020-04-28 15:30:17 +0530[diff] [blame]120 max-frequency = <200000000>;
Simon Glass8c103c32023-02-13 08:56:33 -0700[diff] [blame]121 bootph-all;
Jonas Karlman3b804b32023-05-06 17:41:11 +0000[diff] [blame]122 u-boot,spl-fifo-mode;
Peter Robinsonf459e232019-11-09 20:30:05 +0000[diff] [blame]123};
124
Jagan Tekie05b4a42019-03-11 13:50:03 +0530[diff] [blame]125&sdmmc {
Simon Glass8c103c32023-02-13 08:56:33 -0700[diff] [blame]126 bootph-all;
Deepak Das5c606ca2020-04-15 08:55:24 +0530[diff] [blame]127
128 /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
129 u-boot,spl-fifo-mode;
Jagan Tekie05b4a42019-03-11 13:50:03 +0530[diff] [blame]130};
Jagan Tekib5f88912019-05-07 23:51:51 +0530[diff] [blame]131
132&spi1 {
Simon Glass8c103c32023-02-13 08:56:33 -0700[diff] [blame]133 bootph-all;
Jagan Tekib5f88912019-05-07 23:51:51 +0530[diff] [blame]134};
Jagan Teki16b0dd42019-06-21 00:25:02 +0530[diff] [blame]135
136&uart0 {
Simon Glass8c103c32023-02-13 08:56:33 -0700[diff] [blame]137 bootph-all;
Jagan Teki16b0dd42019-06-21 00:25:02 +0530[diff] [blame]138};
139
140&uart2 {
Simon Glass8c103c32023-02-13 08:56:33 -0700[diff] [blame]141 bootph-all;
Jagan Teki16b0dd42019-06-21 00:25:02 +0530[diff] [blame]142};
Peter Robinsonf459e232019-11-09 20:30:05 +0000[diff] [blame]143
144&vopb {
Simon Glass8c103c32023-02-13 08:56:33 -0700[diff] [blame]145 bootph-all;
Peter Robinsonf459e232019-11-09 20:30:05 +0000[diff] [blame]146};
147
148&vopl {
Simon Glass8c103c32023-02-13 08:56:33 -0700[diff] [blame]149 bootph-all;
Peter Robinsonf459e232019-11-09 20:30:05 +0000[diff] [blame]150};