Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Simon Glass | 6494d70 | 2014-02-26 15:59:18 -0700 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2013 Google, Inc |
| 4 | * |
| 5 | * (C) Copyright 2012 |
| 6 | * Pavel Herrmann <morpheus.ibis@gmail.com> |
Simon Glass | 6494d70 | 2014-02-26 15:59:18 -0700 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #ifndef _DM_UCLASS_ID_H |
| 10 | #define _DM_UCLASS_ID_H |
| 11 | |
| 12 | /* TODO(sjg@chromium.org): this could be compile-time generated */ |
| 13 | enum uclass_id { |
| 14 | /* These are used internally by driver model */ |
| 15 | UCLASS_ROOT = 0, |
| 16 | UCLASS_DEMO, |
| 17 | UCLASS_TEST, |
| 18 | UCLASS_TEST_FDT, |
Simon Glass | 1ca7e20 | 2014-07-23 06:55:18 -0600 | [diff] [blame] | 19 | UCLASS_TEST_BUS, |
Simon Glass | 9856157 | 2017-04-23 20:10:44 -0600 | [diff] [blame] | 20 | UCLASS_TEST_PROBE, |
Mario Six | e8d5291 | 2018-03-12 14:53:33 +0100 | [diff] [blame] | 21 | UCLASS_TEST_DUMMY, |
Simon Glass | c60e1f2 | 2014-10-13 23:41:53 -0600 | [diff] [blame] | 22 | UCLASS_SPI_EMUL, /* sandbox SPI device emulator */ |
Simon Glass | c70c71d | 2014-12-10 08:55:49 -0700 | [diff] [blame] | 23 | UCLASS_I2C_EMUL, /* sandbox I2C device emulator */ |
Simon Glass | b7c25b1 | 2018-11-18 08:14:33 -0700 | [diff] [blame] | 24 | UCLASS_I2C_EMUL_PARENT, /* parent for I2C device emulators */ |
Simon Glass | 36d0d3b | 2015-03-05 12:25:28 -0700 | [diff] [blame] | 25 | UCLASS_PCI_EMUL, /* sandbox PCI device emulator */ |
Simon Glass | 019808f | 2015-03-25 12:22:37 -0600 | [diff] [blame] | 26 | UCLASS_USB_EMUL, /* sandbox USB bus device emulator */ |
Mario Six | 9a8bcab | 2018-08-09 14:51:18 +0200 | [diff] [blame] | 27 | UCLASS_AXI_EMUL, /* sandbox AXI bus device emulator */ |
Simon Glass | 6494d70 | 2014-02-26 15:59:18 -0700 | [diff] [blame] | 28 | |
Simon Glass | 3d7cf41 | 2015-04-14 21:03:19 -0600 | [diff] [blame] | 29 | /* U-Boot uclasses start here - in alphabetical order */ |
Przemyslaw Marczak | 5decbf5 | 2015-10-27 13:08:00 +0100 | [diff] [blame] | 30 | UCLASS_ADC, /* Analog-to-digital converter */ |
Simon Glass | a219639 | 2016-05-01 11:35:52 -0600 | [diff] [blame] | 31 | UCLASS_AHCI, /* SATA disk controller */ |
Simon Glass | ce6d99a | 2018-12-10 10:37:33 -0700 | [diff] [blame] | 32 | UCLASS_AUDIO_CODEC, /* Audio codec with control and data path */ |
Philipp Tomsich | 759a99c | 2018-11-25 19:38:54 +0100 | [diff] [blame] | 33 | UCLASS_AXI, /* AXI bus */ |
Simon Glass | 09d71aa | 2016-02-29 15:25:55 -0700 | [diff] [blame] | 34 | UCLASS_BLK, /* Block device */ |
Mario Six | 5381c28 | 2018-07-31 11:44:11 +0200 | [diff] [blame] | 35 | UCLASS_BOARD, /* Device information from hardware */ |
Philipp Tomsich | ebb73de | 2018-11-27 23:00:18 +0100 | [diff] [blame] | 36 | UCLASS_BOOTCOUNT, /* Bootcount backing store */ |
Dinh Nguyen | 84b124d | 2019-04-23 16:55:03 -0500 | [diff] [blame] | 37 | UCLASS_CACHE, /* Cache controller */ |
Simon Glass | f26c8a8 | 2015-06-23 15:39:15 -0600 | [diff] [blame] | 38 | UCLASS_CLK, /* Clock source, e.g. used by peripherals */ |
Simon Glass | 3d7cf41 | 2015-04-14 21:03:19 -0600 | [diff] [blame] | 39 | UCLASS_CPU, /* CPU, typically part of an SoC */ |
| 40 | UCLASS_CROS_EC, /* Chrome OS EC */ |
Simon Glass | 2dcf143 | 2016-01-21 19:45:00 -0700 | [diff] [blame] | 41 | UCLASS_DISPLAY, /* Display (e.g. DisplayPort, HDMI) */ |
Mugunthan V N | a0594ce | 2016-02-15 15:31:37 +0530 | [diff] [blame] | 42 | UCLASS_DMA, /* Direct Memory Access */ |
Heinrich Schuchardt | 05ef48a | 2018-01-21 19:29:30 +0100 | [diff] [blame] | 43 | UCLASS_EFI, /* EFI managed devices */ |
Simon Glass | 3d7cf41 | 2015-04-14 21:03:19 -0600 | [diff] [blame] | 44 | UCLASS_ETH, /* Ethernet device */ |
Philipp Tomsich | 759a99c | 2018-11-25 19:38:54 +0100 | [diff] [blame] | 45 | UCLASS_FIRMWARE, /* Firmware */ |
Tien Fong Chee | 6203000 | 2018-07-06 16:28:03 +0800 | [diff] [blame] | 46 | UCLASS_FS_FIRMWARE_LOADER, /* Generic loader */ |
Simon Glass | 0040b94 | 2014-07-23 06:55:17 -0600 | [diff] [blame] | 47 | UCLASS_GPIO, /* Bank of general-purpose I/O pins */ |
Benjamin Gaignard | 7f84fc6 | 2018-11-27 13:49:50 +0100 | [diff] [blame] | 48 | UCLASS_HWSPINLOCK, /* Hardware semaphores */ |
Simon Glass | 3d7cf41 | 2015-04-14 21:03:19 -0600 | [diff] [blame] | 49 | UCLASS_I2C, /* I2C bus */ |
| 50 | UCLASS_I2C_EEPROM, /* I2C EEPROM device */ |
| 51 | UCLASS_I2C_GENERIC, /* Generic I2C device */ |
Simon Glass | 3d1957f | 2015-08-03 08:19:21 -0600 | [diff] [blame] | 52 | UCLASS_I2C_MUX, /* I2C multiplexer */ |
Simon Glass | e96fa6c | 2018-12-10 10:37:34 -0700 | [diff] [blame] | 53 | UCLASS_I2S, /* I2S bus */ |
Bin Meng | 68e6f22 | 2017-09-10 05:12:51 -0700 | [diff] [blame] | 54 | UCLASS_IDE, /* IDE device */ |
Simon Glass | e76187a | 2016-01-19 21:32:25 -0700 | [diff] [blame] | 55 | UCLASS_IRQ, /* Interrupt controller */ |
Simon Glass | 34ab37e | 2015-09-08 11:15:11 -0600 | [diff] [blame] | 56 | UCLASS_KEYBOARD, /* Keyboard input device */ |
Simon Glass | 5917112 | 2015-06-23 15:38:45 -0600 | [diff] [blame] | 57 | UCLASS_LED, /* Light-emitting diode (LED) */ |
Simon Glass | 3d7cf41 | 2015-04-14 21:03:19 -0600 | [diff] [blame] | 58 | UCLASS_LPC, /* x86 'low pin count' interface */ |
Stephen Warren | 6238935 | 2016-05-13 15:50:29 -0600 | [diff] [blame] | 59 | UCLASS_MAILBOX, /* Mailbox controller */ |
Simon Glass | 3d7cf41 | 2015-04-14 21:03:19 -0600 | [diff] [blame] | 60 | UCLASS_MASS_STORAGE, /* Mass storage device */ |
Alex Marginean | c3452b5 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 61 | UCLASS_MDIO, /* MDIO bus */ |
Alex Marginean | 8880edb | 2019-07-12 10:13:50 +0300 | [diff] [blame] | 62 | UCLASS_MDIO_MUX, /* MDIO MUX/switch */ |
Thomas Chou | 4395e06 | 2015-10-07 20:20:51 +0800 | [diff] [blame] | 63 | UCLASS_MISC, /* Miscellaneous device */ |
Simon Glass | e7ecf7c | 2015-06-23 15:38:48 -0600 | [diff] [blame] | 64 | UCLASS_MMC, /* SD / MMC card or chip */ |
Simon Glass | 3d7cf41 | 2015-04-14 21:03:19 -0600 | [diff] [blame] | 65 | UCLASS_MOD_EXP, /* RSA Mod Exp device */ |
Thomas Chou | d858799 | 2015-11-07 14:20:31 +0800 | [diff] [blame] | 66 | UCLASS_MTD, /* Memory Technology Device (MTD) device */ |
Jean-Jacques Hiblot | 07e3371 | 2019-07-05 09:33:57 +0200 | [diff] [blame] | 67 | UCLASS_NOP, /* No-op devices */ |
Simon Glass | 5544757 | 2016-01-17 16:11:14 -0700 | [diff] [blame] | 68 | UCLASS_NORTHBRIDGE, /* Intel Northbridge / SDRAM controller */ |
Zhikang Zhang | ffab694 | 2017-08-03 02:30:56 -0700 | [diff] [blame] | 69 | UCLASS_NVME, /* NVM Express device */ |
Simon Glass | f563dc1 | 2016-01-21 19:44:58 -0700 | [diff] [blame] | 70 | UCLASS_PANEL, /* Display panel, such as an LCD */ |
Simon Glass | 363bf77 | 2016-01-21 19:44:56 -0700 | [diff] [blame] | 71 | UCLASS_PANEL_BACKLIGHT, /* Backlight controller for panel */ |
Simon Glass | 3d7cf41 | 2015-04-14 21:03:19 -0600 | [diff] [blame] | 72 | UCLASS_PCH, /* x86 platform controller hub */ |
| 73 | UCLASS_PCI, /* PCI bus */ |
Ramon Fried | 914026d | 2019-04-27 11:15:21 +0300 | [diff] [blame] | 74 | UCLASS_PCI_EP, /* PCI endpoint device */ |
Simon Glass | 3d7cf41 | 2015-04-14 21:03:19 -0600 | [diff] [blame] | 75 | UCLASS_PCI_GENERIC, /* Generic PCI bus device */ |
Jean-Jacques Hiblot | 72e5016 | 2017-04-24 11:51:27 +0200 | [diff] [blame] | 76 | UCLASS_PHY, /* Physical Layer (PHY) device */ |
Masahiro Yamada | d90a5a3 | 2015-08-27 12:44:29 +0900 | [diff] [blame] | 77 | UCLASS_PINCONFIG, /* Pin configuration node device */ |
Bin Meng | 6f0e7a3 | 2016-06-22 02:29:47 -0700 | [diff] [blame] | 78 | UCLASS_PINCTRL, /* Pinctrl (pin muxing/configuration) device */ |
Simon Glass | 4e38936 | 2015-05-22 15:42:14 -0600 | [diff] [blame] | 79 | UCLASS_PMIC, /* PMIC I/O device */ |
Stephen Warren | 61f5ddc | 2016-07-13 13:45:31 -0600 | [diff] [blame] | 80 | UCLASS_POWER_DOMAIN, /* (SoC) Power domains */ |
Philipp Tomsich | 759a99c | 2018-11-25 19:38:54 +0100 | [diff] [blame] | 81 | UCLASS_PWM, /* Pulse-width modulator */ |
Simon Glass | 5fd6bad | 2016-01-21 19:43:31 -0700 | [diff] [blame] | 82 | UCLASS_PWRSEQ, /* Power sequence device */ |
Bin Meng | 6f0e7a3 | 2016-06-22 02:29:47 -0700 | [diff] [blame] | 83 | UCLASS_RAM, /* RAM controller */ |
Simon Glass | 4e38936 | 2015-05-22 15:42:14 -0600 | [diff] [blame] | 84 | UCLASS_REGULATOR, /* Regulator device */ |
Nishanth Menon | ddf56bc | 2015-09-17 15:42:39 -0500 | [diff] [blame] | 85 | UCLASS_REMOTEPROC, /* Remote Processor device */ |
Stephen Warren | 89c1e2d | 2016-06-17 09:43:58 -0600 | [diff] [blame] | 86 | UCLASS_RESET, /* Reset controller device */ |
Simon Glass | 3d7cf41 | 2015-04-14 21:03:19 -0600 | [diff] [blame] | 87 | UCLASS_RTC, /* Real time clock device */ |
Michal Simek | e8a016b | 2016-09-08 15:06:45 +0200 | [diff] [blame] | 88 | UCLASS_SCSI, /* SCSI device */ |
Simon Glass | 57d9275 | 2014-09-04 16:27:26 -0600 | [diff] [blame] | 89 | UCLASS_SERIAL, /* Serial UART */ |
Simon Glass | 25cbb47 | 2018-11-18 08:14:32 -0700 | [diff] [blame] | 90 | UCLASS_SIMPLE_BUS, /* Bus with child devices */ |
Ramon Fried | 7b384ec | 2018-07-02 02:57:55 +0300 | [diff] [blame] | 91 | UCLASS_SMEM, /* Shared memory interface */ |
Simon Glass | d490189 | 2018-12-10 10:37:36 -0700 | [diff] [blame] | 92 | UCLASS_SOUND, /* Playing simple sounds */ |
Simon Glass | d7af6a4 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 93 | UCLASS_SPI, /* SPI bus */ |
Simon Glass | 4c2dbef | 2014-10-13 23:42:06 -0600 | [diff] [blame] | 94 | UCLASS_SPI_FLASH, /* SPI flash */ |
Simon Glass | 4e38936 | 2015-05-22 15:42:14 -0600 | [diff] [blame] | 95 | UCLASS_SPI_GENERIC, /* Generic SPI flash target */ |
Philipp Tomsich | 759a99c | 2018-11-25 19:38:54 +0100 | [diff] [blame] | 96 | UCLASS_SPMI, /* System Power Management Interface bus */ |
Simon Glass | 5725128 | 2015-06-23 15:38:43 -0600 | [diff] [blame] | 97 | UCLASS_SYSCON, /* System configuration device */ |
Stephen Warren | 1163625 | 2016-05-12 12:03:35 -0600 | [diff] [blame] | 98 | UCLASS_SYSRESET, /* System reset device */ |
Jens Wiklander | 9ff4a31 | 2018-09-25 16:40:09 +0200 | [diff] [blame] | 99 | UCLASS_TEE, /* Trusted Execution Environment device */ |
Ye.Li | e3568d2 | 2014-11-20 21:14:13 +0800 | [diff] [blame] | 100 | UCLASS_THERMAL, /* Thermal sensor */ |
Thomas Chou | c8a7ba9 | 2015-10-09 13:46:34 +0800 | [diff] [blame] | 101 | UCLASS_TIMER, /* Timer device */ |
Simon Glass | f255d31 | 2015-08-22 18:31:31 -0600 | [diff] [blame] | 102 | UCLASS_TPM, /* Trusted Platform Module TIS interface */ |
Simon Glass | de31213 | 2015-03-25 12:21:59 -0600 | [diff] [blame] | 103 | UCLASS_USB, /* USB bus */ |
Simon Glass | 449230f | 2015-03-25 12:22:31 -0600 | [diff] [blame] | 104 | UCLASS_USB_DEV_GENERIC, /* USB generic device */ |
Simon Glass | 3d7cf41 | 2015-04-14 21:03:19 -0600 | [diff] [blame] | 105 | UCLASS_USB_HUB, /* USB hub */ |
Jean-Jacques Hiblot | 0131162 | 2018-11-29 10:52:46 +0100 | [diff] [blame] | 106 | UCLASS_USB_GADGET_GENERIC, /* USB generic device */ |
Simon Glass | 1acafc7 | 2016-01-18 19:52:15 -0700 | [diff] [blame] | 107 | UCLASS_VIDEO, /* Video or LCD device */ |
Simon Glass | 801ab9e | 2015-07-02 18:16:08 -0600 | [diff] [blame] | 108 | UCLASS_VIDEO_BRIDGE, /* Video bridge, e.g. DisplayPort to LVDS */ |
Simon Glass | 8351076 | 2016-01-18 19:52:17 -0700 | [diff] [blame] | 109 | UCLASS_VIDEO_CONSOLE, /* Text console driver for video device */ |
Mario Six | 39a336f | 2018-09-27 09:19:29 +0200 | [diff] [blame] | 110 | UCLASS_VIDEO_OSD, /* On-screen display */ |
Bin Meng | 8fb49b4 | 2018-10-15 02:21:00 -0700 | [diff] [blame] | 111 | UCLASS_VIRTIO, /* VirtIO transport device */ |
Maxime Ripard | d3e19cf | 2018-09-18 10:35:24 +0300 | [diff] [blame] | 112 | UCLASS_W1, /* Dallas 1-Wire bus */ |
Maxime Ripard | c924ee2 | 2018-09-18 10:35:27 +0300 | [diff] [blame] | 113 | UCLASS_W1_EEPROM, /* one-wire EEPROMs */ |
Chris Packham | 72384ff | 2019-02-18 08:48:04 +1300 | [diff] [blame] | 114 | UCLASS_WDT, /* Watchdog Timer driver */ |
Simon Glass | 6494d70 | 2014-02-26 15:59:18 -0700 | [diff] [blame] | 115 | |
Simon Glass | 6494d70 | 2014-02-26 15:59:18 -0700 | [diff] [blame] | 116 | UCLASS_COUNT, |
| 117 | UCLASS_INVALID = -1, |
| 118 | }; |
| 119 | |
| 120 | #endif |