Shawn Guo | f5e6c16 | 2019-03-20 15:32:39 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Copyright (c) 2019, Linaro Limited |
| 4 | */ |
| 5 | |
Simon Glass | f7ae49f | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 6 | #include <log.h> |
Simon Glass | 336d461 | 2020-02-03 07:36:16 -0700 | [diff] [blame] | 7 | #include <malloc.h> |
Shawn Guo | f5e6c16 | 2019-03-20 15:32:39 +0800 | [diff] [blame] | 8 | #include <asm/io.h> |
| 9 | #include <common.h> |
| 10 | #include <dm.h> |
| 11 | #include <dt-bindings/reset/ti-syscon.h> |
| 12 | #include <reset-uclass.h> |
Simon Glass | cd93d62 | 2020-05-10 11:40:13 -0600 | [diff] [blame] | 13 | #include <linux/bitops.h> |
Shawn Guo | f5e6c16 | 2019-03-20 15:32:39 +0800 | [diff] [blame] | 14 | |
| 15 | struct hisi_reset_priv { |
| 16 | void __iomem *base; |
| 17 | }; |
| 18 | |
| 19 | static int hisi_reset_deassert(struct reset_ctl *rst) |
| 20 | { |
| 21 | struct hisi_reset_priv *priv = dev_get_priv(rst->dev); |
| 22 | u32 val; |
| 23 | |
| 24 | val = readl(priv->base + rst->data); |
| 25 | if (rst->polarity & DEASSERT_SET) |
| 26 | val |= BIT(rst->id); |
| 27 | else |
| 28 | val &= ~BIT(rst->id); |
| 29 | writel(val, priv->base + rst->data); |
| 30 | |
| 31 | return 0; |
| 32 | } |
| 33 | |
| 34 | static int hisi_reset_assert(struct reset_ctl *rst) |
| 35 | { |
| 36 | struct hisi_reset_priv *priv = dev_get_priv(rst->dev); |
| 37 | u32 val; |
| 38 | |
| 39 | val = readl(priv->base + rst->data); |
| 40 | if (rst->polarity & ASSERT_SET) |
| 41 | val |= BIT(rst->id); |
| 42 | else |
| 43 | val &= ~BIT(rst->id); |
| 44 | writel(val, priv->base + rst->data); |
| 45 | |
| 46 | return 0; |
| 47 | } |
| 48 | |
Shawn Guo | f5e6c16 | 2019-03-20 15:32:39 +0800 | [diff] [blame] | 49 | static int hisi_reset_of_xlate(struct reset_ctl *rst, |
| 50 | struct ofnode_phandle_args *args) |
| 51 | { |
Yang Xiwen | 53c3e38 | 2024-01-19 20:49:17 +0800 | [diff] [blame] | 52 | unsigned long polarity; |
| 53 | |
| 54 | switch (args->args_count) { |
| 55 | case 2: |
| 56 | polarity = ASSERT_SET; |
| 57 | break; |
| 58 | |
| 59 | case 3: |
| 60 | polarity = args->args[2]; |
| 61 | break; |
| 62 | |
| 63 | default: |
Shawn Guo | f5e6c16 | 2019-03-20 15:32:39 +0800 | [diff] [blame] | 64 | debug("Invalid args_count: %d\n", args->args_count); |
| 65 | return -EINVAL; |
| 66 | } |
| 67 | |
| 68 | /* Use .data field as register offset and .id field as bit shift */ |
| 69 | rst->data = args->args[0]; |
| 70 | rst->id = args->args[1]; |
Yang Xiwen | 53c3e38 | 2024-01-19 20:49:17 +0800 | [diff] [blame] | 71 | rst->polarity = polarity; |
Shawn Guo | f5e6c16 | 2019-03-20 15:32:39 +0800 | [diff] [blame] | 72 | |
| 73 | return 0; |
| 74 | } |
| 75 | |
| 76 | static const struct reset_ops hisi_reset_reset_ops = { |
| 77 | .of_xlate = hisi_reset_of_xlate, |
Shawn Guo | f5e6c16 | 2019-03-20 15:32:39 +0800 | [diff] [blame] | 78 | .rst_assert = hisi_reset_assert, |
| 79 | .rst_deassert = hisi_reset_deassert, |
| 80 | }; |
| 81 | |
| 82 | static const struct udevice_id hisi_reset_ids[] = { |
| 83 | { .compatible = "hisilicon,hi3798cv200-reset" }, |
| 84 | { } |
| 85 | }; |
| 86 | |
| 87 | static int hisi_reset_probe(struct udevice *dev) |
| 88 | { |
| 89 | struct hisi_reset_priv *priv = dev_get_priv(dev); |
| 90 | |
| 91 | priv->base = dev_remap_addr(dev); |
| 92 | if (!priv->base) |
| 93 | return -ENOMEM; |
| 94 | |
| 95 | return 0; |
| 96 | } |
| 97 | |
| 98 | U_BOOT_DRIVER(hisi_reset) = { |
| 99 | .name = "hisilicon_reset", |
| 100 | .id = UCLASS_RESET, |
| 101 | .of_match = hisi_reset_ids, |
| 102 | .ops = &hisi_reset_reset_ops, |
| 103 | .probe = hisi_reset_probe, |
Simon Glass | 41575d8 | 2020-12-03 16:55:17 -0700 | [diff] [blame] | 104 | .priv_auto = sizeof(struct hisi_reset_priv), |
Shawn Guo | f5e6c16 | 2019-03-20 15:32:39 +0800 | [diff] [blame] | 105 | }; |