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wdenkdd7d41f2002-09-18 20:04:01 +00001/*
2 * (C) Copyright 2001
3 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * MII Utilities
26 */
27
28#include <common.h>
29#include <command.h>
wdenkdd7d41f2002-09-18 20:04:01 +000030
Jon Loeligerc76fe472007-07-08 18:02:23 -050031#if defined(CONFIG_CMD_MII)
wdenke35745b2004-04-18 23:32:11 +000032#include <miiphy.h>
33
wdenk24711112004-04-18 22:57:51 +000034#ifdef CONFIG_TERSE_MII
wdenkdd7d41f2002-09-18 20:04:01 +000035/*
36 * Display values from last command.
37 */
38uint last_op;
39uint last_addr;
40uint last_data;
41uint last_reg;
42
43/*
Marian Balakowicz63ff0042005-10-28 22:30:33 +020044 * MII device/info/read/write
wdenkdd7d41f2002-09-18 20:04:01 +000045 *
46 * Syntax:
Marian Balakowicz63ff0042005-10-28 22:30:33 +020047 * mii device {devname}
48 * mii info {addr}
49 * mii read {addr} {reg}
50 * mii write {addr} {reg} {data}
wdenkdd7d41f2002-09-18 20:04:01 +000051 */
wdenkdd7d41f2002-09-18 20:04:01 +000052int do_mii (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
53{
54 char op;
55 unsigned char addr, reg;
56 unsigned short data;
57 int rcode = 0;
Marian Balakowicz63ff0042005-10-28 22:30:33 +020058 char *devname;
wdenkdd7d41f2002-09-18 20:04:01 +000059
Wolfgang Denk311d8022006-07-21 11:20:46 +020060 if (argc < 2) {
61 printf ("Usage:\n%s\n", cmdtp->usage);
62 return 1;
63 }
64
wdenkbf9e3b32004-02-12 00:47:09 +000065#if defined(CONFIG_8xx) || defined(CONFIG_MCF52x2)
wdenkdd7d41f2002-09-18 20:04:01 +000066 mii_init ();
67#endif
68
69 /*
70 * We use the last specified parameters, unless new ones are
71 * entered.
72 */
73 op = last_op;
74 addr = last_addr;
75 data = last_data;
76 reg = last_reg;
77
78 if ((flag & CMD_FLAG_REPEAT) == 0) {
79 op = argv[1][0];
80 if (argc >= 3)
81 addr = simple_strtoul (argv[2], NULL, 16);
82 if (argc >= 4)
83 reg = simple_strtoul (argv[3], NULL, 16);
84 if (argc >= 5)
85 data = simple_strtoul (argv[4], NULL, 16);
86 }
87
Marian Balakowicz63ff0042005-10-28 22:30:33 +020088 /* use current device */
89 devname = miiphy_get_current_dev();
90
wdenkdd7d41f2002-09-18 20:04:01 +000091 /*
Marian Balakowicz63ff0042005-10-28 22:30:33 +020092 * check device/read/write/list.
wdenkdd7d41f2002-09-18 20:04:01 +000093 */
94 if (op == 'i') {
wdenk8bf3b002003-12-06 23:20:41 +000095 unsigned char j, start, end;
wdenkdd7d41f2002-09-18 20:04:01 +000096 unsigned int oui;
97 unsigned char model;
98 unsigned char rev;
99
100 /*
101 * Look for any and all PHYs. Valid addresses are 0..31.
102 */
wdenk8bf3b002003-12-06 23:20:41 +0000103 if (argc >= 3) {
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200104 start = addr; end = addr + 1;
wdenk8bf3b002003-12-06 23:20:41 +0000105 } else {
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200106 start = 0; end = 31;
wdenk8bf3b002003-12-06 23:20:41 +0000107 }
108
109 for (j = start; j < end; j++) {
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200110 if (miiphy_info (devname, j, &oui, &model, &rev) == 0) {
wdenkdd7d41f2002-09-18 20:04:01 +0000111 printf ("PHY 0x%02X: "
112 "OUI = 0x%04X, "
113 "Model = 0x%02X, "
114 "Rev = 0x%02X, "
Larry Johnson71bc6e62007-11-01 08:46:50 -0500115 "%3dbase%s, %s\n",
wdenkdd7d41f2002-09-18 20:04:01 +0000116 j, oui, model, rev,
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200117 miiphy_speed (devname, j),
Larry Johnson71bc6e62007-11-01 08:46:50 -0500118 miiphy_is_1000base_x (devname, j)
119 ? "X" : "T",
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200120 (miiphy_duplex (devname, j) == FULL)
121 ? "FDX" : "HDX");
wdenkdd7d41f2002-09-18 20:04:01 +0000122 }
123 }
124 } else if (op == 'r') {
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200125 if (miiphy_read (devname, addr, reg, &data) != 0) {
wdenk4b9206e2004-03-23 22:14:11 +0000126 puts ("Error reading from the PHY\n");
wdenkdd7d41f2002-09-18 20:04:01 +0000127 rcode = 1;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200128 } else {
129 printf ("%04X\n", data & 0x0000FFFF);
wdenkdd7d41f2002-09-18 20:04:01 +0000130 }
wdenkdd7d41f2002-09-18 20:04:01 +0000131 } else if (op == 'w') {
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200132 if (miiphy_write (devname, addr, reg, data) != 0) {
wdenk4b9206e2004-03-23 22:14:11 +0000133 puts ("Error writing to the PHY\n");
wdenkdd7d41f2002-09-18 20:04:01 +0000134 rcode = 1;
135 }
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200136 } else if (op == 'd') {
137 if (argc == 2)
138 miiphy_listdev ();
139 else
140 miiphy_set_current_dev (argv[2]);
wdenkdd7d41f2002-09-18 20:04:01 +0000141 } else {
142 printf ("Usage:\n%s\n", cmdtp->usage);
143 return 1;
144 }
145
146 /*
147 * Save the parameters for repeats.
148 */
149 last_op = op;
150 last_addr = addr;
151 last_data = data;
wdenk80885a92004-02-26 23:46:20 +0000152 last_reg = reg;
wdenkdd7d41f2002-09-18 20:04:01 +0000153
154 return rcode;
155}
156
wdenk8bde7f72003-06-27 21:31:46 +0000157/***************************************************/
158
wdenk0d498392003-07-01 21:06:45 +0000159U_BOOT_CMD(
160 mii, 5, 1, do_mii,
wdenk8bde7f72003-06-27 21:31:46 +0000161 "mii - MII utility commands\n",
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200162 "device - list available devices\n"
163 "mii device <devname> - set current device\n"
164 "mii info <addr> - display MII PHY info\n"
165 "mii read <addr> <reg> - read MII PHY <addr> register <reg>\n"
166 "mii write <addr> <reg> <data> - write MII PHY <addr> register <reg>\n"
wdenk8bde7f72003-06-27 21:31:46 +0000167);
wdenke35745b2004-04-18 23:32:11 +0000168
169#else /* ! CONFIG_TERSE_MII ================================================= */
170
wdenk24711112004-04-18 22:57:51 +0000171typedef struct _MII_reg_desc_t {
172 ushort regno;
173 char * name;
174} MII_reg_desc_t;
175
176MII_reg_desc_t reg_0_5_desc_tbl[] = {
177 { 0, "PHY control register" },
178 { 1, "PHY status register" },
179 { 2, "PHY ID 1 register" },
180 { 3, "PHY ID 2 register" },
181 { 4, "Autonegotiation advertisement register" },
182 { 5, "Autonegotiation partner abilities register" },
183};
184
185typedef struct _MII_field_desc_t {
186 ushort hi;
187 ushort lo;
188 ushort mask;
189 char * name;
190} MII_field_desc_t;
191
192MII_field_desc_t reg_0_desc_tbl[] = {
193 { 15, 15, 0x01, "reset" },
194 { 14, 14, 0x01, "loopback" },
195 { 13, 6, 0x81, "speed selection" }, /* special */
196 { 12, 12, 0x01, "A/N enable" },
197 { 11, 11, 0x01, "power-down" },
198 { 10, 10, 0x01, "isolate" },
199 { 9, 9, 0x01, "restart A/N" },
200 { 8, 8, 0x01, "duplex" }, /* special */
201 { 7, 7, 0x01, "collision test enable" },
202 { 5, 0, 0x3f, "(reserved)" }
203};
204
205MII_field_desc_t reg_1_desc_tbl[] = {
206 { 15, 15, 0x01, "100BASE-T4 able" },
207 { 14, 14, 0x01, "100BASE-X full duplex able" },
208 { 13, 13, 0x01, "100BASE-X half duplex able" },
209 { 12, 12, 0x01, "10 Mbps full duplex able" },
210 { 11, 11, 0x01, "10 Mbps half duplex able" },
211 { 10, 10, 0x01, "100BASE-T2 full duplex able" },
212 { 9, 9, 0x01, "100BASE-T2 half duplex able" },
213 { 8, 8, 0x01, "extended status" },
214 { 7, 7, 0x01, "(reserved)" },
215 { 6, 6, 0x01, "MF preamble suppression" },
216 { 5, 5, 0x01, "A/N complete" },
217 { 4, 4, 0x01, "remote fault" },
218 { 3, 3, 0x01, "A/N able" },
219 { 2, 2, 0x01, "link status" },
220 { 1, 1, 0x01, "jabber detect" },
221 { 0, 0, 0x01, "extended capabilities" },
222};
223
224MII_field_desc_t reg_2_desc_tbl[] = {
225 { 15, 0, 0xffff, "OUI portion" },
226};
227
228MII_field_desc_t reg_3_desc_tbl[] = {
229 { 15, 10, 0x3f, "OUI portion" },
230 { 9, 4, 0x3f, "manufacturer part number" },
231 { 3, 0, 0x0f, "manufacturer rev. number" },
232};
233
234MII_field_desc_t reg_4_desc_tbl[] = {
235 { 15, 15, 0x01, "next page able" },
236 { 14, 14, 0x01, "reserved" },
237 { 13, 13, 0x01, "remote fault" },
238 { 12, 12, 0x01, "reserved" },
239 { 11, 11, 0x01, "asymmetric pause" },
240 { 10, 10, 0x01, "pause enable" },
241 { 9, 9, 0x01, "100BASE-T4 able" },
242 { 8, 8, 0x01, "100BASE-TX full duplex able" },
243 { 7, 7, 0x01, "100BASE-TX able" },
244 { 6, 6, 0x01, "10BASE-T full duplex able" },
245 { 5, 5, 0x01, "10BASE-T able" },
246 { 4, 0, 0x1f, "xxx to do" },
247};
248
249MII_field_desc_t reg_5_desc_tbl[] = {
250 { 15, 15, 0x01, "next page able" },
251 { 14, 14, 0x01, "acknowledge" },
252 { 13, 13, 0x01, "remote fault" },
253 { 12, 12, 0x01, "(reserved)" },
254 { 11, 11, 0x01, "asymmetric pause able" },
255 { 10, 10, 0x01, "pause able" },
256 { 9, 9, 0x01, "100BASE-T4 able" },
257 { 8, 8, 0x01, "100BASE-X full duplex able" },
258 { 7, 7, 0x01, "100BASE-TX able" },
259 { 6, 6, 0x01, "10BASE-T full duplex able" },
260 { 5, 5, 0x01, "10BASE-T able" },
261 { 4, 0, 0x1f, "xxx to do" },
262};
263
264#define DESC0LEN (sizeof(reg_0_desc_tbl)/sizeof(reg_0_desc_tbl[0]))
265#define DESC1LEN (sizeof(reg_1_desc_tbl)/sizeof(reg_1_desc_tbl[0]))
266#define DESC2LEN (sizeof(reg_2_desc_tbl)/sizeof(reg_2_desc_tbl[0]))
267#define DESC3LEN (sizeof(reg_3_desc_tbl)/sizeof(reg_3_desc_tbl[0]))
268#define DESC4LEN (sizeof(reg_4_desc_tbl)/sizeof(reg_4_desc_tbl[0]))
269#define DESC5LEN (sizeof(reg_5_desc_tbl)/sizeof(reg_5_desc_tbl[0]))
270
271typedef struct _MII_field_desc_and_len_t {
272 MII_field_desc_t * pdesc;
273 ushort len;
274} MII_field_desc_and_len_t;
275
276MII_field_desc_and_len_t desc_and_len_tbl[] = {
277 { reg_0_desc_tbl, DESC0LEN },
278 { reg_1_desc_tbl, DESC1LEN },
279 { reg_2_desc_tbl, DESC2LEN },
280 { reg_3_desc_tbl, DESC3LEN },
281 { reg_4_desc_tbl, DESC4LEN },
282 { reg_5_desc_tbl, DESC5LEN },
283};
284
285static void dump_reg(
286 ushort regval,
287 MII_reg_desc_t * prd,
288 MII_field_desc_and_len_t * pdl);
289
290static int special_field(
291 ushort regno,
292 MII_field_desc_t * pdesc,
293 ushort regval);
294
295void MII_dump_0_to_5(
296 ushort regvals[6],
297 uchar reglo,
298 uchar reghi)
299{
300 ulong i;
301
302 for (i = 0; i < 6; i++) {
303 if ((reglo <= i) && (i <= reghi))
304 dump_reg(regvals[i], &reg_0_5_desc_tbl[i],
305 &desc_and_len_tbl[i]);
306 }
307}
308
309static void dump_reg(
310 ushort regval,
311 MII_reg_desc_t * prd,
312 MII_field_desc_and_len_t * pdl)
313{
314 ulong i;
315 ushort mask_in_place;
316 MII_field_desc_t * pdesc;
317
318 printf("%u. (%04hx) -- %s --\n",
319 prd->regno, regval, prd->name);
320
321 for (i = 0; i < pdl->len; i++) {
322 pdesc = &pdl->pdesc[i];
323
324 mask_in_place = pdesc->mask << pdesc->lo;
325
326 printf(" (%04hx:%04hx) %u.",
327 mask_in_place,
328 regval & mask_in_place,
329 prd->regno);
330
331 if (special_field(prd->regno, pdesc, regval)) {
332 }
333 else {
334 if (pdesc->hi == pdesc->lo)
335 printf("%2u ", pdesc->lo);
336 else
337 printf("%2u-%2u", pdesc->hi, pdesc->lo);
338 printf(" = %5u %s",
339 (regval & mask_in_place) >> pdesc->lo,
340 pdesc->name);
341 }
342 printf("\n");
343
344 }
345 printf("\n");
346}
347
348/* Special fields:
349** 0.6,13
350** 0.8
351** 2.15-0
352** 3.15-0
353** 4.4-0
354** 5.4-0
355*/
356
357static int special_field(
358 ushort regno,
359 MII_field_desc_t * pdesc,
360 ushort regval)
361{
362 if ((regno == 0) && (pdesc->lo == 6)) {
wdenkb9711de2004-04-25 13:18:40 +0000363 ushort speed_bits = regval & PHY_BMCR_SPEED_MASK;
wdenk24711112004-04-18 22:57:51 +0000364 printf("%2u,%2u = b%u%u speed selection = %s Mbps",
365 6, 13,
366 (regval >> 6) & 1,
367 (regval >> 13) & 1,
wdenkb9711de2004-04-25 13:18:40 +0000368 speed_bits == PHY_BMCR_1000_MBPS ? "1000" :
369 speed_bits == PHY_BMCR_100_MBPS ? "100" :
370 speed_bits == PHY_BMCR_10_MBPS ? "10" :
wdenk24711112004-04-18 22:57:51 +0000371 "???");
372 return 1;
373 }
374
375 else if ((regno == 0) && (pdesc->lo == 8)) {
376 printf("%2u = %5u duplex = %s",
377 pdesc->lo,
378 (regval >> pdesc->lo) & 1,
379 ((regval >> pdesc->lo) & 1) ? "full" : "half");
380 return 1;
381 }
382
383 else if ((regno == 4) && (pdesc->lo == 0)) {
384 ushort sel_bits = (regval >> pdesc->lo) & pdesc->mask;
385 printf("%2u-%2u = %5u selector = %s",
386 pdesc->hi, pdesc->lo, sel_bits,
wdenkb9711de2004-04-25 13:18:40 +0000387 sel_bits == PHY_ANLPAR_PSB_802_3 ?
wdenk24711112004-04-18 22:57:51 +0000388 "IEEE 802.3" :
wdenkb9711de2004-04-25 13:18:40 +0000389 sel_bits == PHY_ANLPAR_PSB_802_9 ?
wdenk24711112004-04-18 22:57:51 +0000390 "IEEE 802.9 ISLAN-16T" :
391 "???");
392 return 1;
393 }
394
395 else if ((regno == 5) && (pdesc->lo == 0)) {
396 ushort sel_bits = (regval >> pdesc->lo) & pdesc->mask;
397 printf("%2u-%2u = %u selector = %s",
398 pdesc->hi, pdesc->lo, sel_bits,
wdenkb9711de2004-04-25 13:18:40 +0000399 sel_bits == PHY_ANLPAR_PSB_802_3 ?
wdenk24711112004-04-18 22:57:51 +0000400 "IEEE 802.3" :
wdenkb9711de2004-04-25 13:18:40 +0000401 sel_bits == PHY_ANLPAR_PSB_802_9 ?
wdenk24711112004-04-18 22:57:51 +0000402 "IEEE 802.9 ISLAN-16T" :
403 "???");
404 return 1;
405 }
406
407 return 0;
408}
409
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200410char last_op[2];
wdenk24711112004-04-18 22:57:51 +0000411uint last_data;
412uint last_addr_lo;
413uint last_addr_hi;
414uint last_reg_lo;
415uint last_reg_hi;
416
417static void extract_range(
418 char * input,
419 unsigned char * plo,
420 unsigned char * phi)
421{
422 char * end;
423 *plo = simple_strtoul(input, &end, 16);
424 if (*end == '-') {
425 end++;
426 *phi = simple_strtoul(end, NULL, 16);
427 }
428 else {
429 *phi = *plo;
430 }
431}
432
wdenk5cf91d62004-04-23 20:32:05 +0000433/* ---------------------------------------------------------------- */
wdenk24711112004-04-18 22:57:51 +0000434int do_mii (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
435{
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200436 char op[2];
wdenk24711112004-04-18 22:57:51 +0000437 unsigned char addrlo, addrhi, reglo, reghi;
Wolfgang Denk2b792af2005-09-24 21:54:50 +0200438 unsigned char addr, reg;
wdenk24711112004-04-18 22:57:51 +0000439 unsigned short data;
440 int rcode = 0;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200441 char *devname;
wdenk24711112004-04-18 22:57:51 +0000442
TsiChung Liew8e585f02007-06-18 13:50:13 -0500443#if defined(CONFIG_8xx) || defined(CONFIG_MCF532x)
wdenk24711112004-04-18 22:57:51 +0000444 mii_init ();
445#endif
446
447 /*
448 * We use the last specified parameters, unless new ones are
449 * entered.
450 */
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200451 op[0] = last_op[0];
452 op[1] = last_op[1];
wdenk24711112004-04-18 22:57:51 +0000453 addrlo = last_addr_lo;
454 addrhi = last_addr_hi;
455 reglo = last_reg_lo;
456 reghi = last_reg_hi;
457 data = last_data;
458
459 if ((flag & CMD_FLAG_REPEAT) == 0) {
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200460 op[0] = argv[1][0];
461 if (strlen(argv[1]) > 1)
462 op[1] = argv[1][1];
463 else
464 op[1] = '\0';
465
wdenk24711112004-04-18 22:57:51 +0000466 if (argc >= 3)
467 extract_range(argv[2], &addrlo, &addrhi);
468 if (argc >= 4)
469 extract_range(argv[3], &reglo, &reghi);
470 if (argc >= 5)
471 data = simple_strtoul (argv[4], NULL, 16);
472 }
473
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200474 /* use current device */
475 devname = miiphy_get_current_dev();
476
wdenk24711112004-04-18 22:57:51 +0000477 /*
478 * check info/read/write.
479 */
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200480 if (op[0] == 'i') {
wdenk24711112004-04-18 22:57:51 +0000481 unsigned char j, start, end;
482 unsigned int oui;
483 unsigned char model;
484 unsigned char rev;
485
486 /*
487 * Look for any and all PHYs. Valid addresses are 0..31.
488 */
489 if (argc >= 3) {
Wolfgang Denk2b792af2005-09-24 21:54:50 +0200490 start = addrlo; end = addrhi;
wdenk24711112004-04-18 22:57:51 +0000491 } else {
Wolfgang Denk2b792af2005-09-24 21:54:50 +0200492 start = 0; end = 31;
wdenk24711112004-04-18 22:57:51 +0000493 }
494
Wolfgang Denk2b792af2005-09-24 21:54:50 +0200495 for (j = start; j <= end; j++) {
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200496 if (miiphy_info (devname, j, &oui, &model, &rev) == 0) {
wdenk24711112004-04-18 22:57:51 +0000497 printf("PHY 0x%02X: "
498 "OUI = 0x%04X, "
499 "Model = 0x%02X, "
500 "Rev = 0x%02X, "
Larry Johnson71bc6e62007-11-01 08:46:50 -0500501 "%3dbase%s, %s\n",
wdenk24711112004-04-18 22:57:51 +0000502 j, oui, model, rev,
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200503 miiphy_speed (devname, j),
Larry Johnson71bc6e62007-11-01 08:46:50 -0500504 miiphy_is_1000base_x (devname, j)
505 ? "X" : "T",
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200506 (miiphy_duplex (devname, j) == FULL)
507 ? "FDX" : "HDX");
wdenk24711112004-04-18 22:57:51 +0000508 }
509 }
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200510 } else if (op[0] == 'r') {
wdenk24711112004-04-18 22:57:51 +0000511 for (addr = addrlo; addr <= addrhi; addr++) {
512 for (reg = reglo; reg <= reghi; reg++) {
513 data = 0xffff;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200514 if (miiphy_read (devname, addr, reg, &data) != 0) {
wdenk24711112004-04-18 22:57:51 +0000515 printf(
516 "Error reading from the PHY addr=%02x reg=%02x\n",
517 addr, reg);
518 rcode = 1;
Wolfgang Denk2b792af2005-09-24 21:54:50 +0200519 } else {
wdenk24711112004-04-18 22:57:51 +0000520 if ((addrlo != addrhi) || (reglo != reghi))
521 printf("addr=%02x reg=%02x data=",
522 (uint)addr, (uint)reg);
523 printf("%04X\n", data & 0x0000FFFF);
524 }
525 }
526 if ((addrlo != addrhi) && (reglo != reghi))
527 printf("\n");
528 }
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200529 } else if (op[0] == 'w') {
wdenk24711112004-04-18 22:57:51 +0000530 for (addr = addrlo; addr <= addrhi; addr++) {
531 for (reg = reglo; reg <= reghi; reg++) {
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200532 if (miiphy_write (devname, addr, reg, data) != 0) {
wdenk24711112004-04-18 22:57:51 +0000533 printf("Error writing to the PHY addr=%02x reg=%02x\n",
534 addr, reg);
535 rcode = 1;
536 }
537 }
538 }
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200539 } else if (strncmp(op, "du", 2) == 0) {
wdenk24711112004-04-18 22:57:51 +0000540 ushort regs[6];
541 int ok = 1;
542 if ((reglo > 5) || (reghi > 5)) {
543 printf(
544 "The MII dump command only formats the "
545 "standard MII registers, 0-5.\n");
546 return 1;
547 }
548 for (addr = addrlo; addr <= addrhi; addr++) {
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200549 for (reg = reglo; reg < reghi + 1; reg++) {
550 if (miiphy_read(devname, addr, reg, &regs[reg]) != 0) {
wdenk24711112004-04-18 22:57:51 +0000551 ok = 0;
552 printf(
553 "Error reading from the PHY addr=%02x reg=%02x\n",
554 addr, reg);
555 rcode = 1;
556 }
557 }
558 if (ok)
559 MII_dump_0_to_5(regs, reglo, reghi);
560 printf("\n");
561 }
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200562 } else if (strncmp(op, "de", 2) == 0) {
563 if (argc == 2)
564 miiphy_listdev ();
565 else
566 miiphy_set_current_dev (argv[2]);
wdenk24711112004-04-18 22:57:51 +0000567 } else {
568 printf("Usage:\n%s\n", cmdtp->usage);
569 return 1;
570 }
571
572 /*
573 * Save the parameters for repeats.
574 */
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200575 last_op[0] = op[0];
576 last_op[1] = op[1];
wdenk24711112004-04-18 22:57:51 +0000577 last_addr_lo = addrlo;
578 last_addr_hi = addrhi;
579 last_reg_lo = reglo;
580 last_reg_hi = reghi;
581 last_data = data;
582
583 return rcode;
584}
585
586/***************************************************/
587
588U_BOOT_CMD(
589 mii, 5, 1, do_mii,
590 "mii - MII utility commands\n",
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200591 "device - list available devices\n"
592 "mii device <devname> - set current device\n"
593 "mii info <addr> - display MII PHY info\n"
594 "mii read <addr> <reg> - read MII PHY <addr> register <reg>\n"
595 "mii write <addr> <reg> <data> - write MII PHY <addr> register <reg>\n"
596 "mii dump <addr> <reg> - pretty-print <addr> <reg> (0-5 only)\n"
wdenk24711112004-04-18 22:57:51 +0000597 "Addr and/or reg may be ranges, e.g. 2-7.\n"
598);
599
600#endif /* CONFIG_TERSE_MII */
wdenk8bde7f72003-06-27 21:31:46 +0000601
Jon Loeliger90253172007-07-10 11:02:44 -0500602#endif