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Daniel Hellstrom6ed8a432008-03-26 23:38:48 +01001/* Configuration header file for Gaisler GR-CPCI-AX2000
2 * AX board. Note that since the AX is removable the configuration
3 * for this board must be edited below.
4 *
5 * (C) Copyright 2003-2005
6 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 *
8 * (C) Copyright 2008
9 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
10 *
11 * See file CREDITS for list of people who contributed to this
12 * project.
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of
17 * the License, or (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 * MA 02111-1307 USA
28 */
29
30#ifndef __CONFIG_H__
31#define __CONFIG_H__
32
33/*
34 * High Level Configuration Options
35 * (easy to change)
36 */
37
38#define CONFIG_LEON3 /* This is an LEON3 CPU */
39#define CONFIG_LEON 1 /* This is an LEON CPU */
40#define CONFIG_CPCI_AX2000 1 /* ... on GR-CPCI-AX2000 board */
41
42#define CONFIG_LEON_RAM_SRAM 1
43#define CONFIG_LEON_RAM_SDRAM 2
44#define CONFIG_LEON_RAM_SDRAM_NOSRAM 3
45
46/* Select Memory to run from
47 *
48 * SRAM - UBoot is run in SRAM, SRAM-0x40000000, SDRAM-0x60000000
49 * SDRAM - UBoot is run in SDRAM, SRAM-0x40000000 and SDRAM-0x60000000
50 * SDRAM_NOSRAM - UBoot is run in SDRAM, SRAM not available, SDRAM at 0x40000000
51 *
52 * Note, if Linux is to be used, SDRAM or SDRAM_NOSRAM is required since
53 * it doesn't fit into the 4Mb SRAM.
54 *
55 * SRAM is default since it will work for all systems, however will not
56 * be able to boot linux.
57 */
58#define CONFIG_LEON_RAM_SELECT CONFIG_LEON_RAM_SRAM
59
60/* CPU / AMBA BUS configuration */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020061#define CONFIG_SYS_CLK_FREQ 20000000 /* 20MHz */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +010062
63/* Number of SPARC register windows */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020064#define CONFIG_SYS_SPARC_NWINDOWS 8
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +010065
66/*
67 * Serial console configuration
68 */
69#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020070#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +010071
72/* Partitions */
73#define CONFIG_DOS_PARTITION
74#define CONFIG_MAC_PARTITION
75#define CONFIG_ISO_PARTITION
76
77/*
78 * Supported commands
79 */
80#include <config_cmd_default.h>
81
82#define CONFIG_CMD_REGINFO
83#define CONFIG_CMD_AMBAPP
84#define CONFIG_CMD_PING
85#define CONFIG_CMD_DIAG
86#define CONFIG_CMD_IRQ
87
88/*
89 * Autobooting
90 */
91#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
92
93#define CONFIG_PREBOOT "echo;" \
94 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
95 "echo"
96
97#undef CONFIG_BOOTARGS
98
99#define CONFIG_EXTRA_ENV_SETTINGS_BASE \
100 "netdev=eth0\0" \
101 "nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw " \
102 "nfsroot=${serverip}:${rootpath}\0" \
103 "ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0" \
104 "addip=setenv bootargs ${bootargs} " \
105 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
106 ":${hostname}:${netdev}:off panic=1\0" \
107 "flash_nfs=run nfsargs addip;" \
108 "bootm ${kernel_addr}\0" \
109 "flash_self=run ramargs addip;" \
110 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
111 "getkernel=tftpboot \$\(scratch\)\ \$\(bootfile\)\0" \
112 "bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.206:192.168.0.20:192.168.0.1:255.255.255.0:ax2000:eth0\0"
113
114#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SRAM
115#define CONFIG_EXTRA_ENV_SETTINGS_SELECT \
116 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
117 "scratch=40200000\0" \
118 ""
119#elif CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM
120#define CONFIG_EXTRA_ENV_SETTINGS_SELECT \
121 "net_nfs=tftp 60000000 ${bootfile};run nfsargs addip;bootm\0" \
122 "scratch=60800000\0" \
123 ""
124#else
125/* More than 4Mb is assumed when running from SDRAM */
126#define CONFIG_EXTRA_ENV_SETTINGS_SELECT \
127 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
128 "scratch=40800000\0" \
129 ""
130#endif
131
132#define CONFIG_EXTRA_ENV_SETTINGS CONFIG_EXTRA_ENV_SETTINGS_BASE CONFIG_EXTRA_ENV_SETTINGS_SELECT
133
134#define CONFIG_NETMASK 255.255.255.0
135#define CONFIG_GATEWAYIP 192.168.0.1
136#define CONFIG_SERVERIP 192.168.0.20
137#define CONFIG_IPADDR 192.168.0.206
138#define CONFIG_ROOTPATH /export/rootfs
139#define CONFIG_HOSTNAME ax2000
140#define CONFIG_BOOTFILE /uImage
141
142#define CONFIG_BOOTCOMMAND "run flash_self"
143
144/* Memory MAP
145 *
146 * Flash:
147 * |--------------------------------|
148 * | 0x00000000 Text & Data & BSS | *
149 * | for Monitor | *
150 * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
151 * | UNUSED / Growth | * 256kb
152 * |--------------------------------|
153 * | 0x00050000 Base custom area | *
154 * | kernel / FS | *
155 * | | * Rest of Flash
156 * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
157 * | END-0x00008000 Environment | * 32kb
158 * |--------------------------------|
159 *
160 *
161 *
162 * Main Memory (4Mb SRAM or XMb SDRAM):
163 * |--------------------------------|
164 * | UNUSED / scratch area |
165 * | |
166 * | |
167 * | |
168 * | |
169 * |--------------------------------|
170 * | Monitor .Text / .DATA / .BSS | * 256kb
171 * | Relocated! | *
172 * |--------------------------------|
173 * | Monitor Malloc | * 128kb (contains relocated environment)
174 * |--------------------------------|
175 * | Monitor/kernel STACK | * 64kb
176 * |--------------------------------|
177 * | Page Table for MMU systems | * 2k
178 * |--------------------------------|
179 * | PROM Code accessed from Linux | * 6kb-128b
180 * |--------------------------------|
181 * | Global data (avail from kernel)| * 128b
182 * |--------------------------------|
183 *
184 */
185
186/*
187 * Flash configuration (8,16 or 32 MB)
188 * TEXT base always at 0xFFF00000
189 * ENV_ADDR always at 0xFFF40000
190 * FLASH_BASE at 0xFC000000 for 64 MB
191 * 0xFE000000 for 32 MB
192 * 0xFF000000 for 16 MB
193 * 0xFF800000 for 8 MB
194 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200195/*#define CONFIG_SYS_NO_FLASH 1*/
196#define CONFIG_SYS_FLASH_BASE 0x00000000
197#define CONFIG_SYS_FLASH_SIZE 0x00800000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100198
199#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200200#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */
201#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100202
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200203#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
204#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
205#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
206#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
207#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100208
209/*** CFI CONFIG ***/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200210#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200211#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200212#define CONFIG_SYS_FLASH_CFI
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100213/* Bypass cache when reading regs from flash memory */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200214#define CONFIG_SYS_FLASH_CFI_BYPASS_READ
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100215/* Buffered writes (32byte/go) instead of single accesses */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200216#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100217
218/*
219 * Environment settings
220 */
Jean-Christophe PLAGNIOL-VILLARD93f6d722008-09-10 22:48:00 +0200221/*#define CONFIG_ENV_IS_NOWHERE 1*/
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200222#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200223/* CONFIG_ENV_ADDR need to be at sector boundary */
224#define CONFIG_ENV_SIZE 0x8000
225#define CONFIG_ENV_SECT_SIZE 0x20000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200226#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SECT_SIZE)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100227#define CONFIG_ENV_OVERWRITE 1
228
229/*
230 * Memory map
231 *
232 * Always 4Mb SRAM available
233 * SDRAM module may be available on 0x60000000, SDRAM
234 * is configured as if a 128Mb SDRAM module is available.
235 */
236
237#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200238#define CONFIG_SYS_SDRAM_BASE 0x40000000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100239#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200240#define CONFIG_SYS_SDRAM_BASE 0x60000000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100241#endif
242
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200243#define CONFIG_SYS_SDRAM_SIZE 0x08000000
244#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100245
246/* 4Mb SRAM available */
247#if CONFIG_LEON_RAM_SELECT != CONFIG_LEON_RAM_SDRAM_NOSRAM
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200248#define CONFIG_SYS_SRAM_BASE 0x40000000
249#define CONFIG_SYS_SRAM_SIZE 0x400000
250#define CONFIG_SYS_SRAM_END (CONFIG_SYS_SRAM_BASE+CONFIG_SYS_SRAM_SIZE)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100251#endif
252
253/* Select RAM used to run U-BOOT from... */
254#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SRAM
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200255#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SRAM_BASE
256#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SRAM_SIZE
257#define CONFIG_SYS_RAM_END CONFIG_SYS_SRAM_END
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100258#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200259#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
260#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
261#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100262#endif
263
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200264#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
265#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100266
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200267#define CONFIG_SYS_PROM_SIZE (8192-CONFIG_SYS_GBL_DATA_SIZE)
268#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100269
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200270#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
271#define CONFIG_SYS_STACK_SIZE (0x10000-32)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100272
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200273#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200274#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
275# define CONFIG_SYS_RAMBOOT 1
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100276#endif
277
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200278#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
279#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
280#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100281
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200282#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
283#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100284
285/* relocated monitor area */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200286#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
287#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100288
289/* make un relocated address from relocated address */
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200290#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100291
292/*
293 * Ethernet configuration uses on board SMC91C111
294 */
Ben Warren7194ab82009-10-04 22:37:03 -0700295#define CONFIG_NET_MULTI
296#define CONFIG_SMC91111 1
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100297#define CONFIG_SMC91111_BASE 0x20000300 /* chip select 3 */
298#define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */
299#undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */
300/*#define CONFIG_SHOW_ACTIVITY*/
301#define CONFIG_NET_RETRY_COUNT 10 /* # of retries */
302
303#define CONFIG_ETHADDR 00:00:7a:cc:00:13
304#define CONFIG_PHY_ADDR 0x00
305
306/*
307 * Miscellaneous configurable options
308 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200309#define CONFIG_SYS_LONGHELP /* undef to save memory */
310#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100311#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200312#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100313#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200314#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100315#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200316#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
317#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
318#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100319
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200320#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
321#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100322
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200323#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100324
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200325#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100326
327/*
328 * Various low-level settings
329 */
330
331/*-----------------------------------------------------------------------
332 * USB stuff
333 *-----------------------------------------------------------------------
334 */
335#define CONFIG_USB_CLOCK 0x0001BBBB
336#define CONFIG_USB_CONFIG 0x00005000
337
338/***** Gaisler GRLIB IP-Cores Config ********/
339
340/* AMBA Plug & Play info display on startup */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200341/*#define CONFIG_SYS_AMBAPP_PRINT_ON_STARTUP*/
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100342
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200343#define CONFIG_SYS_GRLIB_SDRAM 0
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100344
345/* See, GRLIB Docs (grip.pdf) on how to set up
346 * These the memory controller registers.
347 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200348#define CONFIG_SYS_GRLIB_MEMCFG1 (0x10f800ff | (1<<11))
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100349#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200350#define CONFIG_SYS_GRLIB_MEMCFG2 0x82206000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100351#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200352#define CONFIG_SYS_GRLIB_MEMCFG2 0x82205260
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100353#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200354#define CONFIG_SYS_GRLIB_MEMCFG3 0x0809a000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100355
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200356#define CONFIG_SYS_GRLIB_FT_MEMCFG1 (0x10f800ff | (1<<11))
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100357#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200358#define CONFIG_SYS_GRLIB_FT_MEMCFG2 0x82206000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100359#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200360#define CONFIG_SYS_GRLIB_FT_MEMCFG2 0x82205260
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100361#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200362#define CONFIG_SYS_GRLIB_FT_MEMCFG3 0x0809a000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100363
364/* no DDR controller */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200365#define CONFIG_SYS_GRLIB_DDR_CFG 0x00000000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100366
367/* no DDR2 Controller */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200368#define CONFIG_SYS_GRLIB_DDR2_CFG1 0x00000000
369#define CONFIG_SYS_GRLIB_DDR2_CFG3 0x00000000
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100370
371/* Calculate scaler register value from default baudrate */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200372#define CONFIG_SYS_GRLIB_APBUART_SCALER \
Daniel Hellstrom6ed8a432008-03-26 23:38:48 +0100373 ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10)
374
375/* Identification string */
376#define CONFIG_IDENT_STRING "GAISLER LEON3 GR-CPCI-AX2000"
377
378/* default kernel command line */
379#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
380
381#endif /* __CONFIG_H */