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Lukasz Majewski1d7993d2019-06-24 15:50:45 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2019 DENX Software Engineering
4 * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
5 */
6
7#include <common.h>
8#include <asm/io.h>
9#include <malloc.h>
10#include <clk-uclass.h>
11#include <dm/device.h>
12#include <dm/uclass.h>
13#include <clk.h>
14#include "clk.h"
15
Giulio Benetti16faa592020-01-10 15:46:53 +010016#define UBOOT_DM_CLK_IMX_PLLV3_GENERIC "imx_clk_pllv3_generic"
17#define UBOOT_DM_CLK_IMX_PLLV3_USB "imx_clk_pllv3_usb"
Lukasz Majewski1d7993d2019-06-24 15:50:45 +020018
19struct clk_pllv3 {
20 struct clk clk;
21 void __iomem *base;
22 u32 div_mask;
23 u32 div_shift;
24};
25
26#define to_clk_pllv3(_clk) container_of(_clk, struct clk_pllv3, clk)
27
Giulio Benetti16faa592020-01-10 15:46:53 +010028static ulong clk_pllv3_generic_get_rate(struct clk *clk)
Lukasz Majewski1d7993d2019-06-24 15:50:45 +020029{
30 struct clk_pllv3 *pll = to_clk_pllv3(dev_get_clk_ptr(clk->dev));
31 unsigned long parent_rate = clk_get_parent_rate(clk);
32
33 u32 div = (readl(pll->base) >> pll->div_shift) & pll->div_mask;
34
35 return (div == 1) ? parent_rate * 22 : parent_rate * 20;
36}
37
38static const struct clk_ops clk_pllv3_generic_ops = {
Giulio Benetti16faa592020-01-10 15:46:53 +010039 .get_rate = clk_pllv3_generic_get_rate,
Lukasz Majewski1d7993d2019-06-24 15:50:45 +020040};
41
42struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
43 const char *parent_name, void __iomem *base,
44 u32 div_mask)
45{
46 struct clk_pllv3 *pll;
47 struct clk *clk;
48 char *drv_name;
49 int ret;
50
51 pll = kzalloc(sizeof(*pll), GFP_KERNEL);
52 if (!pll)
53 return ERR_PTR(-ENOMEM);
54
55 switch (type) {
56 case IMX_PLLV3_GENERIC:
Giulio Benetti16faa592020-01-10 15:46:53 +010057 drv_name = UBOOT_DM_CLK_IMX_PLLV3_GENERIC;
58 break;
Lukasz Majewski1d7993d2019-06-24 15:50:45 +020059 case IMX_PLLV3_USB:
Giulio Benetti16faa592020-01-10 15:46:53 +010060 drv_name = UBOOT_DM_CLK_IMX_PLLV3_USB;
Lukasz Majewski1d7993d2019-06-24 15:50:45 +020061 break;
62 default:
63 kfree(pll);
64 return ERR_PTR(-ENOTSUPP);
65 }
66
67 pll->base = base;
68 pll->div_mask = div_mask;
69 clk = &pll->clk;
70
71 ret = clk_register(clk, drv_name, name, parent_name);
72 if (ret) {
73 kfree(pll);
74 return ERR_PTR(ret);
75 }
76
77 return clk;
78}
79
80U_BOOT_DRIVER(clk_pllv3_generic) = {
Giulio Benetti16faa592020-01-10 15:46:53 +010081 .name = UBOOT_DM_CLK_IMX_PLLV3_GENERIC,
82 .id = UCLASS_CLK,
83 .ops = &clk_pllv3_generic_ops,
84 .flags = DM_FLAG_PRE_RELOC,
85};
86
87U_BOOT_DRIVER(clk_pllv3_usb) = {
88 .name = UBOOT_DM_CLK_IMX_PLLV3_USB,
Lukasz Majewski1d7993d2019-06-24 15:50:45 +020089 .id = UCLASS_CLK,
90 .ops = &clk_pllv3_generic_ops,
91 .flags = DM_FLAG_PRE_RELOC,
92};