Peng Fan | f77d441 | 2018-10-18 14:28:30 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Copyright 2018 NXP |
| 4 | * Peng Fan <peng.fan@nxp.com> |
| 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <clk-uclass.h> |
| 9 | #include <dm.h> |
Simon Glass | f7ae49f | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 10 | #include <log.h> |
Simon Glass | 336d461 | 2020-02-03 07:36:16 -0700 | [diff] [blame] | 11 | #include <malloc.h> |
Peng Fan | 99ac6c7 | 2023-04-28 12:08:09 +0800 | [diff] [blame] | 12 | #include <firmware/imx/sci/sci.h> |
Peng Fan | f77d441 | 2018-10-18 14:28:30 +0200 | [diff] [blame] | 13 | #include <asm/arch/clock.h> |
| 14 | #include <dt-bindings/clock/imx8qxp-clock.h> |
| 15 | #include <dt-bindings/soc/imx_rsrc.h> |
| 16 | #include <misc.h> |
| 17 | |
Peng Fan | 98c63a7 | 2019-03-05 02:32:33 +0000 | [diff] [blame] | 18 | #include "clk-imx8.h" |
Peng Fan | f77d441 | 2018-10-18 14:28:30 +0200 | [diff] [blame] | 19 | |
Peng Fan | 98c63a7 | 2019-03-05 02:32:33 +0000 | [diff] [blame] | 20 | __weak ulong imx8_clk_get_rate(struct clk *clk) |
Peng Fan | f77d441 | 2018-10-18 14:28:30 +0200 | [diff] [blame] | 21 | { |
Peng Fan | f77d441 | 2018-10-18 14:28:30 +0200 | [diff] [blame] | 22 | return 0; |
| 23 | } |
| 24 | |
Peng Fan | 98c63a7 | 2019-03-05 02:32:33 +0000 | [diff] [blame] | 25 | __weak ulong imx8_clk_set_rate(struct clk *clk, unsigned long rate) |
| 26 | { |
| 27 | return 0; |
| 28 | } |
| 29 | |
| 30 | __weak int __imx8_clk_enable(struct clk *clk, bool enable) |
| 31 | { |
Simon Glass | 9042bf6 | 2021-03-25 10:26:08 +1300 | [diff] [blame] | 32 | return -EINVAL; |
Peng Fan | 98c63a7 | 2019-03-05 02:32:33 +0000 | [diff] [blame] | 33 | } |
| 34 | |
Peng Fan | f77d441 | 2018-10-18 14:28:30 +0200 | [diff] [blame] | 35 | static int imx8_clk_disable(struct clk *clk) |
| 36 | { |
| 37 | return __imx8_clk_enable(clk, 0); |
| 38 | } |
| 39 | |
| 40 | static int imx8_clk_enable(struct clk *clk) |
| 41 | { |
| 42 | return __imx8_clk_enable(clk, 1); |
| 43 | } |
| 44 | |
Simon Glass | 8dd8620 | 2023-02-05 15:36:26 -0700 | [diff] [blame] | 45 | #if IS_ENABLED(CONFIG_CMD_CLK) |
Peng Fan | f77d441 | 2018-10-18 14:28:30 +0200 | [diff] [blame] | 46 | int soc_clk_dump(void) |
| 47 | { |
| 48 | struct udevice *dev; |
| 49 | struct clk clk; |
| 50 | unsigned long rate; |
| 51 | int i, ret; |
| 52 | |
| 53 | ret = uclass_get_device_by_driver(UCLASS_CLK, |
Simon Glass | 65e25be | 2020-12-28 20:34:56 -0700 | [diff] [blame] | 54 | DM_DRIVER_GET(imx8_clk), &dev); |
Peng Fan | f77d441 | 2018-10-18 14:28:30 +0200 | [diff] [blame] | 55 | if (ret) |
| 56 | return ret; |
| 57 | |
| 58 | printf("Clk\t\tHz\n"); |
| 59 | |
Peng Fan | 98c63a7 | 2019-03-05 02:32:33 +0000 | [diff] [blame] | 60 | for (i = 0; i < num_clks; i++) { |
Peng Fan | f77d441 | 2018-10-18 14:28:30 +0200 | [diff] [blame] | 61 | clk.id = imx8_clk_names[i].id; |
| 62 | ret = clk_request(dev, &clk); |
| 63 | if (ret < 0) { |
| 64 | debug("%s clk_request() failed: %d\n", __func__, ret); |
| 65 | continue; |
| 66 | } |
| 67 | |
| 68 | ret = clk_get_rate(&clk); |
| 69 | rate = ret; |
| 70 | |
| 71 | clk_free(&clk); |
| 72 | |
Simon Glass | 9042bf6 | 2021-03-25 10:26:08 +1300 | [diff] [blame] | 73 | if (ret == -EINVAL) { |
Peng Fan | f77d441 | 2018-10-18 14:28:30 +0200 | [diff] [blame] | 74 | printf("clk ID %lu not supported yet\n", |
| 75 | imx8_clk_names[i].id); |
| 76 | continue; |
| 77 | } |
| 78 | if (ret < 0) { |
| 79 | printf("%s %lu: get_rate err: %d\n", |
| 80 | __func__, imx8_clk_names[i].id, ret); |
| 81 | continue; |
| 82 | } |
| 83 | |
| 84 | printf("%s(%3lu):\t%lu\n", |
| 85 | imx8_clk_names[i].name, imx8_clk_names[i].id, rate); |
| 86 | } |
| 87 | |
| 88 | return 0; |
| 89 | } |
| 90 | #endif |
| 91 | |
| 92 | static struct clk_ops imx8_clk_ops = { |
| 93 | .set_rate = imx8_clk_set_rate, |
| 94 | .get_rate = imx8_clk_get_rate, |
| 95 | .enable = imx8_clk_enable, |
| 96 | .disable = imx8_clk_disable, |
| 97 | }; |
| 98 | |
| 99 | static int imx8_clk_probe(struct udevice *dev) |
| 100 | { |
| 101 | return 0; |
| 102 | } |
| 103 | |
| 104 | static const struct udevice_id imx8_clk_ids[] = { |
| 105 | { .compatible = "fsl,imx8qxp-clk" }, |
Peng Fan | e45efe9 | 2019-03-05 02:32:35 +0000 | [diff] [blame] | 106 | { .compatible = "fsl,imx8qm-clk" }, |
Peng Fan | f77d441 | 2018-10-18 14:28:30 +0200 | [diff] [blame] | 107 | { }, |
| 108 | }; |
| 109 | |
| 110 | U_BOOT_DRIVER(imx8_clk) = { |
| 111 | .name = "clk_imx8", |
| 112 | .id = UCLASS_CLK, |
| 113 | .of_match = imx8_clk_ids, |
| 114 | .ops = &imx8_clk_ops, |
| 115 | .probe = imx8_clk_probe, |
| 116 | .flags = DM_FLAG_PRE_RELOC, |
| 117 | }; |