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Heiko Schocher4ce5a722009-07-20 09:59:37 +02001/*
Albert Aribaud306563a2010-08-27 18:26:05 +02002 * Driver for the TWSI (i2c) controller found on the Marvell
3 * orion5x and kirkwood SoC families.
Heiko Schocher4ce5a722009-07-20 09:59:37 +02004 *
Albert ARIBAUD57b4bce2011-04-22 19:41:02 +02005 * Author: Albert Aribaud <albert.u.boot@aribaud.net>
Albert Aribaud306563a2010-08-27 18:26:05 +02006 * Copyright (c) 2010 Albert Aribaud.
Heiko Schocher4ce5a722009-07-20 09:59:37 +02007 *
Prafulla Wadaskarbeca04d2009-12-24 02:55:23 +05308 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
24 * MA 02110-1301 USA
Heiko Schocher4ce5a722009-07-20 09:59:37 +020025 */
Albert Aribaud306563a2010-08-27 18:26:05 +020026
Heiko Schocher4ce5a722009-07-20 09:59:37 +020027#include <common.h>
28#include <i2c.h>
Heiko Schocher4ce5a722009-07-20 09:59:37 +020029#include <asm/errno.h>
30#include <asm/io.h>
31
Heiko Schocher4ce5a722009-07-20 09:59:37 +020032/*
Albert Aribaud306563a2010-08-27 18:26:05 +020033 * include a file that will provide CONFIG_I2C_MVTWSI_BASE
34 * and possibly other settings
Heiko Schocher4ce5a722009-07-20 09:59:37 +020035 */
36
Albert Aribaud306563a2010-08-27 18:26:05 +020037#if defined(CONFIG_ORION5X)
38#include <asm/arch/orion5x.h>
39#elif defined(CONFIG_KIRKWOOD)
40#include <asm/arch/kirkwood.h>
41#else
42#error Driver mvtwsi not supported by SoC or board
43#endif
44
45/*
46 * TWSI register structure
47 */
48
49struct mvtwsi_registers {
50 u32 slave_address;
51 u32 data;
52 u32 control;
53 union {
54 u32 status; /* when reading */
55 u32 baudrate; /* when writing */
56 };
57 u32 xtnd_slave_addr;
58 u32 reserved[2];
59 u32 soft_reset;
60};
61
62/*
63 * Control register fields
64 */
65
66#define MVTWSI_CONTROL_ACK 0x00000004
67#define MVTWSI_CONTROL_IFLG 0x00000008
68#define MVTWSI_CONTROL_STOP 0x00000010
69#define MVTWSI_CONTROL_START 0x00000020
70#define MVTWSI_CONTROL_TWSIEN 0x00000040
71#define MVTWSI_CONTROL_INTEN 0x00000080
72
73/*
74 * Status register values -- only those expected in normal master
75 * operation on non-10-bit-address devices; whatever status we don't
76 * expect in nominal conditions (bus errors, arbitration losses,
77 * missing ACKs...) we just pass back to the caller as an error
78 * code.
79 */
80
81#define MVTWSI_STATUS_START 0x08
82#define MVTWSI_STATUS_REPEATED_START 0x10
83#define MVTWSI_STATUS_ADDR_W_ACK 0x18
84#define MVTWSI_STATUS_DATA_W_ACK 0x28
85#define MVTWSI_STATUS_ADDR_R_ACK 0x40
86#define MVTWSI_STATUS_ADDR_R_NAK 0x48
87#define MVTWSI_STATUS_DATA_R_ACK 0x50
88#define MVTWSI_STATUS_DATA_R_NAK 0x58
89#define MVTWSI_STATUS_IDLE 0xF8
90
91/*
92 * The single instance of the controller we'll be dealing with
93 */
94
95static struct mvtwsi_registers *twsi =
96 (struct mvtwsi_registers *) CONFIG_I2C_MVTWSI_BASE;
97
98/*
99 * Returned statuses are 0 for success and nonzero otherwise.
100 * Currently, cmd_i2c and cmd_eeprom do not interpret an error status.
101 * Thus to ease debugging, the return status contains some debug info:
102 * - bits 31..24 are error class: 1 is timeout, 2 is 'status mismatch'.
103 * - bits 23..16 are the last value of the control register.
104 * - bits 15..8 are the last value of the status register.
105 * - bits 7..0 are the expected value of the status register.
106 */
107
108#define MVTWSI_ERROR_WRONG_STATUS 0x01
109#define MVTWSI_ERROR_TIMEOUT 0x02
110
111#define MVTWSI_ERROR(ec, lc, ls, es) (((ec << 24) & 0xFF000000) | \
112 ((lc << 16) & 0x00FF0000) | ((ls<<8) & 0x0000FF00) | (es & 0xFF))
113
114/*
115 * Wait for IFLG to raise, or return 'timeout'; then if status is as expected,
116 * return 0 (ok) or return 'wrong status'.
117 */
118static int twsi_wait(int expected_status)
Heiko Schocher4ce5a722009-07-20 09:59:37 +0200119{
Albert Aribaud306563a2010-08-27 18:26:05 +0200120 int control, status;
121 int timeout = 1000;
122
123 do {
124 control = readl(&twsi->control);
125 if (control & MVTWSI_CONTROL_IFLG) {
126 status = readl(&twsi->status);
127 if (status == expected_status)
128 return 0;
129 else
130 return MVTWSI_ERROR(
131 MVTWSI_ERROR_WRONG_STATUS,
132 control, status, expected_status);
133 }
134 udelay(10); /* one clock cycle at 100 kHz */
135 } while (timeout--);
136 status = readl(&twsi->status);
137 return MVTWSI_ERROR(
138 MVTWSI_ERROR_TIMEOUT, control, status, expected_status);
Heiko Schocher4ce5a722009-07-20 09:59:37 +0200139}
140
Albert Aribaud306563a2010-08-27 18:26:05 +0200141/*
142 * These flags are ORed to any write to the control register
143 * They allow global setting of TWSIEN and ACK.
144 * By default none are set.
145 * twsi_start() sets TWSIEN (in case the controller was disabled)
146 * twsi_recv() sets ACK or resets it depending on expected status.
147 */
148static u8 twsi_control_flags = MVTWSI_CONTROL_TWSIEN;
Heiko Schocher4ce5a722009-07-20 09:59:37 +0200149
Albert Aribaud306563a2010-08-27 18:26:05 +0200150/*
151 * Assert the START condition, either in a single I2C transaction
152 * or inside back-to-back ones (repeated starts).
153 */
154static int twsi_start(int expected_status)
155{
156 /* globally set TWSIEN in case it was not */
157 twsi_control_flags |= MVTWSI_CONTROL_TWSIEN;
158 /* assert START */
159 writel(twsi_control_flags | MVTWSI_CONTROL_START, &twsi->control);
160 /* wait for controller to process START */
161 return twsi_wait(expected_status);
162}
163
164/*
165 * Send a byte (i2c address or data).
166 */
167static int twsi_send(u8 byte, int expected_status)
168{
169 /* put byte in data register for sending */
170 writel(byte, &twsi->data);
171 /* clear any pending interrupt -- that'll cause sending */
172 writel(twsi_control_flags, &twsi->control);
173 /* wait for controller to receive byte and check ACK */
174 return twsi_wait(expected_status);
175}
176
177/*
178 * Receive a byte.
179 * Global mvtwsi_control_flags variable says if we should ack or nak.
180 */
181static int twsi_recv(u8 *byte)
182{
183 int expected_status, status;
184
185 /* compute expected status based on ACK bit in global control flags */
186 if (twsi_control_flags & MVTWSI_CONTROL_ACK)
187 expected_status = MVTWSI_STATUS_DATA_R_ACK;
188 else
189 expected_status = MVTWSI_STATUS_DATA_R_NAK;
190 /* acknowledge *previous state* and launch receive */
191 writel(twsi_control_flags, &twsi->control);
192 /* wait for controller to receive byte and assert ACK or NAK */
193 status = twsi_wait(expected_status);
194 /* if we did receive expected byte then store it */
195 if (status == 0)
196 *byte = readl(&twsi->data);
197 /* return status */
198 return status;
199}
200
201/*
202 * Assert the STOP condition.
203 * This is also used to force the bus back in idle (SDA=SCL=1).
204 */
205static int twsi_stop(int status)
206{
207 int control, stop_status;
208 int timeout = 1000;
209
210 /* assert STOP */
211 control = MVTWSI_CONTROL_TWSIEN | MVTWSI_CONTROL_STOP;
212 writel(control, &twsi->control);
213 /* wait for IDLE; IFLG won't rise so twsi_wait() is no use. */
214 do {
215 stop_status = readl(&twsi->status);
216 if (stop_status == MVTWSI_STATUS_IDLE)
217 break;
218 udelay(10); /* one clock cycle at 100 kHz */
219 } while (timeout--);
220 control = readl(&twsi->control);
221 if (stop_status != MVTWSI_STATUS_IDLE)
222 if (status == 0)
223 status = MVTWSI_ERROR(
224 MVTWSI_ERROR_TIMEOUT,
225 control, status, MVTWSI_STATUS_IDLE);
226 return status;
227}
228
229/*
230 * Ugly formula to convert m and n values to a frequency comes from
231 * TWSI specifications
232 */
233
234#define TWSI_FREQUENCY(m, n) \
235 ((u8) (CONFIG_SYS_TCLK / (10 * (m + 1) * 2 * (1 << n))))
236
237/*
238 * These are required to be reprogrammed before enabling the controller
239 * because a reset loses them.
240 * Default values come from the spec, but a twsi_reset will change them.
241 * twsi_slave_address left uninitialized lest checkpatch.pl complains.
242 */
243
244/* Baudrate generator: m (bits 7..4) =4, n (bits 3..0) =4 */
245static u8 twsi_baud_rate = 0x44; /* baudrate at controller reset */
246/* Default frequency corresponding to default m=4, n=4 */
247static u8 twsi_actual_speed = TWSI_FREQUENCY(4, 4);
248/* Default slave address is 0 (so is an uninitialized static) */
249static u8 twsi_slave_address;
250
251/*
252 * Reset controller.
253 * Called at end of i2c_init unsuccessful i2c transactions.
254 * Controller reset also resets the baud rate and slave address, so
255 * re-establish them.
256 */
257static void twsi_reset(void)
258{
259 /* ensure controller will be enabled by any twsi*() function */
260 twsi_control_flags = MVTWSI_CONTROL_TWSIEN;
261 /* reset controller */
262 writel(0, &twsi->soft_reset);
263 /* wait 2 ms -- this is what the Marvell LSP does */
264 udelay(20000);
265 /* set baud rate */
266 writel(twsi_baud_rate, &twsi->baudrate);
267 /* set slave address even though we don't use it */
268 writel(twsi_slave_address, &twsi->slave_address);
269 writel(0, &twsi->xtnd_slave_addr);
270 /* assert STOP but don't care for the result */
271 (void) twsi_stop(0);
272}
273
274/*
275 * I2C init called by cmd_i2c when doing 'i2c reset'.
276 * Sets baud to the highest possible value not exceeding requested one.
277 */
278void i2c_init(int requested_speed, int slaveadd)
279{
280 int tmp_speed, highest_speed, n, m;
281 int baud = 0x44; /* baudrate at controller reset */
282
283 /* use actual speed to collect progressively higher values */
284 highest_speed = 0;
285 /* compute m, n setting for highest speed not above requested speed */
Heiko Schocher4ce5a722009-07-20 09:59:37 +0200286 for (n = 0; n < 8; n++) {
287 for (m = 0; m < 16; m++) {
Albert Aribaud306563a2010-08-27 18:26:05 +0200288 tmp_speed = TWSI_FREQUENCY(m, n);
289 if ((tmp_speed <= requested_speed)
290 && (tmp_speed > highest_speed)) {
291 highest_speed = tmp_speed;
292 baud = (m << 3) | n;
Heiko Schocher4ce5a722009-07-20 09:59:37 +0200293 }
294 }
295 }
Albert Aribaud306563a2010-08-27 18:26:05 +0200296 /* save baud rate and slave for later calls to twsi_reset */
297 twsi_baud_rate = baud;
298 twsi_actual_speed = highest_speed;
299 twsi_slave_address = slaveadd;
300 /* reset controller */
301 twsi_reset();
Heiko Schocher4ce5a722009-07-20 09:59:37 +0200302}
303
Albert Aribaud306563a2010-08-27 18:26:05 +0200304/*
305 * Begin I2C transaction with expected start status, at given address.
306 * Common to i2c_probe, i2c_read and i2c_write.
307 * Expected address status will derive from direction bit (bit 0) in addr.
308 */
309static int i2c_begin(int expected_start_status, u8 addr)
Heiko Schocher4ce5a722009-07-20 09:59:37 +0200310{
Albert Aribaud306563a2010-08-27 18:26:05 +0200311 int status, expected_addr_status;
Heiko Schocher4ce5a722009-07-20 09:59:37 +0200312
Albert Aribaud306563a2010-08-27 18:26:05 +0200313 /* compute expected address status from direction bit in addr */
314 if (addr & 1) /* reading */
315 expected_addr_status = MVTWSI_STATUS_ADDR_R_ACK;
316 else /* writing */
317 expected_addr_status = MVTWSI_STATUS_ADDR_W_ACK;
318 /* assert START */
319 status = twsi_start(expected_start_status);
320 /* send out the address if the start went well */
321 if (status == 0)
322 status = twsi_send(addr, expected_addr_status);
323 /* return ok or status of first failure to caller */
324 return status;
Heiko Schocher4ce5a722009-07-20 09:59:37 +0200325}
326
Albert Aribaud306563a2010-08-27 18:26:05 +0200327/*
328 * I2C probe called by cmd_i2c when doing 'i2c probe'.
329 * Begin read, nak data byte, end.
330 */
331int i2c_probe(uchar chip)
Heiko Schocher4ce5a722009-07-20 09:59:37 +0200332{
Albert Aribaud306563a2010-08-27 18:26:05 +0200333 u8 dummy_byte;
334 int status;
335
336 /* begin i2c read */
337 status = i2c_begin(MVTWSI_STATUS_START, (chip << 1) | 1);
338 /* dummy read was accepted: receive byte but NAK it. */
339 if (status == 0)
340 status = twsi_recv(&dummy_byte);
341 /* Stop transaction */
342 twsi_stop(0);
343 /* return 0 or status of first failure */
344 return status;
345}
346
347/*
348 * I2C read called by cmd_i2c when doing 'i2c read' and by cmd_eeprom.c
349 * Begin write, send address byte(s), begin read, receive data bytes, end.
350 *
351 * NOTE: some EEPROMS want a stop right before the second start, while
352 * some will choke if it is there. Deciding which we should do is eeprom
353 * stuff, not i2c, but at the moment the APIs won't let us put it in
354 * cmd_eeprom, so we have to choose here, and for the moment that'll be
355 * a repeated start without a preceding stop.
356 */
357int i2c_read(u8 dev, uint addr, int alen, u8 *data, int length)
358{
359 int status;
360
361 /* begin i2c write to send the address bytes */
362 status = i2c_begin(MVTWSI_STATUS_START, (dev << 1));
363 /* send addr bytes */
364 while ((status == 0) && alen--)
365 status = twsi_send(addr >> (8*alen),
366 MVTWSI_STATUS_DATA_W_ACK);
367 /* begin i2c read to receive eeprom data bytes */
368 if (status == 0)
369 status = i2c_begin(
370 MVTWSI_STATUS_REPEATED_START, (dev << 1) | 1);
371 /* prepare ACK if at least one byte must be received */
372 if (length > 0)
373 twsi_control_flags |= MVTWSI_CONTROL_ACK;
374 /* now receive actual bytes */
375 while ((status == 0) && length--) {
376 /* reset NAK if we if no more to read now */
377 if (length == 0)
378 twsi_control_flags &= ~MVTWSI_CONTROL_ACK;
379 /* read current byte */
380 status = twsi_recv(data++);
Heiko Schocher4ce5a722009-07-20 09:59:37 +0200381 }
Albert Aribaud306563a2010-08-27 18:26:05 +0200382 /* Stop transaction */
383 status = twsi_stop(status);
384 /* return 0 or status of first failure */
385 return status;
Heiko Schocher4ce5a722009-07-20 09:59:37 +0200386}
387
Albert Aribaud306563a2010-08-27 18:26:05 +0200388/*
389 * I2C write called by cmd_i2c when doing 'i2c write' and by cmd_eeprom.c
390 * Begin write, send address byte(s), send data bytes, end.
391 */
392int i2c_write(u8 dev, uint addr, int alen, u8 *data, int length)
Heiko Schocher4ce5a722009-07-20 09:59:37 +0200393{
Albert Aribaud306563a2010-08-27 18:26:05 +0200394 int status;
Heiko Schocher4ce5a722009-07-20 09:59:37 +0200395
Albert Aribaud306563a2010-08-27 18:26:05 +0200396 /* begin i2c write to send the eeprom adress bytes then data bytes */
397 status = i2c_begin(MVTWSI_STATUS_START, (dev << 1));
398 /* send addr bytes */
399 while ((status == 0) && alen--)
400 status = twsi_send(addr >> (8*alen),
401 MVTWSI_STATUS_DATA_W_ACK);
402 /* send data bytes */
403 while ((status == 0) && (length-- > 0))
404 status = twsi_send(*(data++), MVTWSI_STATUS_DATA_W_ACK);
405 /* Stop transaction */
406 status = twsi_stop(status);
407 /* return 0 or status of first failure */
408 return status;
Heiko Schocher4ce5a722009-07-20 09:59:37 +0200409}
410
Albert Aribaud306563a2010-08-27 18:26:05 +0200411/*
412 * Bus set routine: we only support bus 0.
413 */
Heiko Schocher4ce5a722009-07-20 09:59:37 +0200414int i2c_set_bus_num(unsigned int bus)
415{
Heiko Schocher4ce5a722009-07-20 09:59:37 +0200416 if (bus > 0) {
417 return -1;
418 }
Heiko Schocher4ce5a722009-07-20 09:59:37 +0200419 return 0;
420}
421
Albert Aribaud306563a2010-08-27 18:26:05 +0200422/*
423 * Bus get routine: hard-return bus 0.
424 */
Heiko Schocher4ce5a722009-07-20 09:59:37 +0200425unsigned int i2c_get_bus_num(void)
426{
Albert Aribaud306563a2010-08-27 18:26:05 +0200427 return 0;
Heiko Schocher4ce5a722009-07-20 09:59:37 +0200428}