blob: f356a40f07ca8a7f2324ddbf69ef45bd59ba750d [file] [log] [blame]
wdenk47d1a6e2002-11-03 00:01:44 +00001/*
2 * (C) Copyright 2002 Wolfgang Grandegger <wg@denx.de>
3 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 */
22
23#ifndef _PN62_H_
24#define _PN62_H_
25
26/*
27 * Definitions for the Intel Bridge 21554 or 21555.
28 */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020029#define I2155X_VPD_ADDR 0xe6
30#define I2155X_VPD_DATA 0xe8
wdenk47d1a6e2002-11-03 00:01:44 +000031
32#define I2155X_VPD_START 0x80
33#define I2155X_VPD_SN_START 0x80
34#define I2155X_VPD_SN_SIZE 0x10
35#define I2155X_VPD_MAC0_START 0x90
36#define I2155X_VPD_MAC1_START 0x96
37
38#define I2155X_SCRAPAD_ADDR 0xa8
39#define I2155X_SCRAPAD_MAX 8
40
41#define I2155X_BAR2_BASE 0x98
42#define I2155X_BAR3_BASE 0x9c
43#define I2155X_BAR4_BASE 0xa0
44
45#define I2155X_BAR2_SETUP 0xb0
46#define I2155X_BAR3_SETUP 0xb4
47#define I2155X_BAR4_SETUP 0xb8
48
49/*
50 * Interrupt request numbers
51 */
52#define PN62_IRQ_HOST 0x0
53#define PN62_IRQ_PLX9054 0x1
54#define PN62_IRQ_ETH0 0x2
55#define PN62_IRQ_ETH1 0x3
56#define PN62_IRQ_COM1 0x4
57#define PN62_IRQ_COM2 0x4
58
59/*
60 * Miscellaneous definitons.
61 */
62#define PN62_SMEM_DEFAULT 0x1f00000
63
64/*
65 * Definitions for boot protocol using Scratchpad registers.
66 */
67#define BOOT_DONE 0
Wolfgang Denk53677ef2008-05-20 16:00:29 +020068#define BOOT_DONE_CLEAR 0x00dead00
69#define BOOT_DONE_ERROR 0xbad0dead
70#define BOOT_DONE_U_BOOT 0x12345678
71#define BOOT_DONE_LINUX 0x87654321
72#define BOOT_CMD 1
73#define BOOT_CMD_MOVE 0x1
74#define BOOT_CMD_BOOT 0x2
wdenk47d1a6e2002-11-03 00:01:44 +000075#define BOOT_DATA 2
76#define BOOT_PROTO 3
Wolfgang Denk53677ef2008-05-20 16:00:29 +020077#define BOOT_PROTO_READY 0x23456789
78#define BOOT_PROTO_CLEAR 0x00000000
wdenk47d1a6e2002-11-03 00:01:44 +000079#define BOOT_STATUS 4
80
81/*
82 * LED Definitions:
83 */
84#define PN62_LED_BASE 0xff800300
85#define PN62_LED_MAX 12
86
87/*
88 * LED0 - 7 mounted on top of board, D1 - D8
89 * LED8 - 11 upper four LEDs on the front panel of the board.
90 */
91#define LED_0 0x00 /* OFF */
92#define LED_1 0x01 /* ON */
93#define LED_SLOW_CLOCK 0x02 /* SLOW 1Hz ish */
94#define LED_nSLOW_CLOCK 0x03 /* inverse of above */
95#define LED_WATCHDOG_OUT 0x06 /* Reset Watchdog level */
96#define LED_WATCHDOG_CLOCK 0x07 /* clock to watchdog */
97
98/*
99 * LED's currently setup in AMD79C973 device as the following:
100 * LED0 100Mbit
101 * LED1 LNKSE
102 * LED2 TX Activity
103 * LED3 RX Activity
104 */
105#define LED_E0_LED0 0x08 /* Ethernet Port 0 LED 0 */
106#define LED_E0_LED1 0x09 /* Ethernet Port 0 LED 1 */
107#define LED_E0_LED2 0x0A /* Ethernet Port 0 LED 2 */
108#define LED_E0_LED3 0x0B /* Ethernet Port 0 LED 3 */
109#define LED_E1_LED0 0x0C /* Ethernet Port 1 LED 0 */
110#define LED_E1_LED1 0x0D /* Ethernet Port 1 LED 1 */
111#define LED_E1_LED2 0x0E /* Ethernet Port 1 LED 2 */
112#define LED_E1_LED3 0x0F /* Ethernet Port 1 LED 3 */
113#define LED_STROBE0 0x10 /* Processor Strobe 0 */
114#define LED_STROBE1 0x11 /* Processor Strobe 1 */
115#define LED_STROBE2 0x12 /* Processor Strobe 2 */
116#define LED_STROBE3 0x13 /* Processor Strobe 3 */
117#define LED_STROBE4 0x14 /* Processor Strobe 4 */
118#define LED_STROBE5 0x15 /* Processor Strobe 5 */
119#define LED_STROBE6 0x16 /* Processor Strobe 6 */
120#define LED_STROBE7 0x17 /* Processor Strobe 7 */
121#define LED_HOST_STROBE0 0x18 /* Host strobe 0 */
122#define LED_HOST_STROBE1 0x19 /* Host strobe 1 */
123#define LED_HOST_STROBE2 0x1A /* Host strobe 2 */
124#define LED_HOST_STROBE3 0x1B /* Host strobe 3 */
125#define LED_HOST_STROBE4 0x1C /* Host strobe 4 */
126#define LED_HOST_STROBE5 0x1D /* Host strobe 5 */
127#define LED_HOST_STROBE6 0x1E /* Host strobe 6 */
128#define LED_HOST_STROBE7 0x1F /* Host strobe 7 */
129#define LED_MPC_INT0 0x20 /* MPC8240 INT 0 */
130#define LED_MPC_INT1 0x21 /* MPC8240 INT 1 */
131#define LED_MPC_INT2 0x22 /* MPC8240 INT 2 */
132#define LED_MPC_INT3 0x23 /* MPC8240 INT 3 */
133#define LED_MPC_INT4 0x24 /* MPC8240 INT 4 */
134#define LED_UART0_CS 0x25 /* UART 0 Chip Select */
135#define LED_UART1_CS 0x26 /* UART 1 Chip Select */
136#define LED_SRAM_CS 0x27 /* SRAM Chip Select */
137#define LED_SRAM_WR 0x28 /* SRAM WR Signal */
138#define LED_SRAM_RD 0x29 /* SRAM RD Signal */
139#define LED_MPC_RCS0 0x2A /* MPC8240 RCS0 Signal */
140#define LED_S_PCI_FRAME 0x2B /* Secondary PCI Frame Signal */
141#define LED_MPC_CS0 0x2C /* MPC8240 CS0 Signal */
142#define LED_HOST_INT 0x2D /* MPC8240 to Host Interrupt signal */
143#define LED_LAST_FUNCTION LED_HOST_INT /* last function */
144
145/*
146 * Forward declarations
147 */
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200148int i2155x_init (void);
wdenk47d1a6e2002-11-03 00:01:44 +0000149void i2155x_write_scrapad(int idx, u32 val);
150u32 i2155x_read_scrapad (int idx);
151void i2155x_set_bar_base (int bar, u32 addr);
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200152int i2155x_read_vpd (int offset, int size, unsigned char *data);
wdenk47d1a6e2002-11-03 00:01:44 +0000153
154int am79c95x_init (void);
155
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200156void set_led (unsigned int number, unsigned int function);
wdenk47d1a6e2002-11-03 00:01:44 +0000157void fatal_error (unsigned int error_code);
158void show_startup_phase (int phase);
159
160
161#endif /* _PN62_H_ */