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Stelian Pop8e429b32008-05-08 18:52:23 +02001/*
2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian.pop@leadtechdesign.com>
4 * Lead Tech Design <www.leadtechdesign.com>
5 *
6 * Configuation settings for the AT91SAM9263EK board.
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27#ifndef __CONFIG_H
28#define __CONFIG_H
29
30/* ARM asynchronous clock */
Stelian Pop56a24792008-05-08 14:52:31 +020031#define AT91_CPU_NAME "AT91SAM9263"
Stelian Popad229a42008-11-07 13:55:14 +010032#define AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */
Jean-Christophe PLAGNIOL-VILLARD6ebff362009-04-16 21:30:48 +020033#define CONFIG_SYS_HZ 1000
Stelian Pop8e429b32008-05-08 18:52:23 +020034
Stelian Pop8e429b32008-05-08 18:52:23 +020035#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
36#define CONFIG_AT91SAM9263 1 /* It's an Atmel AT91SAM9263 SoC*/
37#define CONFIG_AT91SAM9263EK 1 /* on an AT91SAM9263EK Board */
Jean-Christophe PLAGNIOL-VILLARDdc39ae92009-04-16 21:30:44 +020038#define CONFIG_ARCH_CPU_INIT
Stelian Pop8e429b32008-05-08 18:52:23 +020039#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
40
41#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
42#define CONFIG_SETUP_MEMORY_TAGS 1
43#define CONFIG_INITRD_TAG 1
44
45#define CONFIG_SKIP_LOWLEVEL_INIT
46#define CONFIG_SKIP_RELOCATE_UBOOT
47
48/*
49 * Hardware drivers
50 */
51#define CONFIG_ATMEL_USART 1
52#undef CONFIG_USART0
53#undef CONFIG_USART1
54#undef CONFIG_USART2
55#define CONFIG_USART3 1 /* USART 3 is DBGU */
56
Stelian Pop56a24792008-05-08 14:52:31 +020057/* LCD */
58#define CONFIG_LCD 1
59#define LCD_BPP LCD_COLOR8
60#define CONFIG_LCD_LOGO 1
61#undef LCD_TEST_PATTERN
62#define CONFIG_LCD_INFO 1
63#define CONFIG_LCD_INFO_BELOW_LOGO 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020064#define CONFIG_SYS_WHITE_ON_BLACK 1
Stelian Pop56a24792008-05-08 14:52:31 +020065#define CONFIG_ATMEL_LCD 1
66#define CONFIG_ATMEL_LCD_BGR555 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020067#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
Stelian Pop56a24792008-05-08 14:52:31 +020068
Jean-Christophe PLAGNIOL-VILLARDa484b002009-03-21 21:08:00 +010069/* LED */
70#define CONFIG_AT91_LED
71#define CONFIG_RED_LED AT91_PIN_PB7 /* this is the power led */
72#define CONFIG_GREEN_LED AT91_PIN_PB8 /* this is the user1 led */
73#define CONFIG_YELLOW_LED AT91_PIN_PC29 /* this is the user2 led */
74
Stelian Pop8e429b32008-05-08 18:52:23 +020075#define CONFIG_BOOTDELAY 3
76
Stelian Pop8e429b32008-05-08 18:52:23 +020077/*
78 * BOOTP options
79 */
80#define CONFIG_BOOTP_BOOTFILESIZE 1
81#define CONFIG_BOOTP_BOOTPATH 1
82#define CONFIG_BOOTP_GATEWAY 1
83#define CONFIG_BOOTP_HOSTNAME 1
84
85/*
86 * Command line configuration.
87 */
88#include <config_cmd_default.h>
89#undef CONFIG_CMD_BDI
Stelian Pop8e429b32008-05-08 18:52:23 +020090#undef CONFIG_CMD_FPGA
Wolfgang Denk74de7ae2009-04-01 23:34:12 +020091#undef CONFIG_CMD_IMI
Stelian Pop8e429b32008-05-08 18:52:23 +020092#undef CONFIG_CMD_IMLS
Wolfgang Denk74de7ae2009-04-01 23:34:12 +020093#undef CONFIG_CMD_LOADS
94#undef CONFIG_CMD_SOURCE
Stelian Pop8e429b32008-05-08 18:52:23 +020095
96#define CONFIG_CMD_PING 1
97#define CONFIG_CMD_DHCP 1
98#define CONFIG_CMD_NAND 1
99#define CONFIG_CMD_USB 1
100
101/* SDRAM */
102#define CONFIG_NR_DRAM_BANKS 1
103#define PHYS_SDRAM 0x20000000
104#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
105
106/* DataFlash */
Jean-Christophe PLAGNIOL-VILLARD4758ebd2009-03-27 23:26:44 +0100107#define CONFIG_ATMEL_DATAFLASH_SPI
Stelian Pop8e429b32008-05-08 18:52:23 +0200108#define CONFIG_HAS_DATAFLASH 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200109#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
110#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
111#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
Stelian Pop8e429b32008-05-08 18:52:23 +0200112#define AT91_SPI_CLK 15000000
113#define DATAFLASH_TCSS (0x1a << 16)
114#define DATAFLASH_TCHS (0x1 << 24)
115
116/* NOR flash, if populated */
117#if 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200118#define CONFIG_SYS_NO_FLASH 1
Stelian Pop8e429b32008-05-08 18:52:23 +0200119#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200120#define CONFIG_SYS_FLASH_CFI 1
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200121#define CONFIG_FLASH_CFI_DRIVER 1
Stelian Pop8e429b32008-05-08 18:52:23 +0200122#define PHYS_FLASH_1 0x10000000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200123#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
124#define CONFIG_SYS_MAX_FLASH_SECT 256
125#define CONFIG_SYS_MAX_FLASH_BANKS 1
Stelian Pop8e429b32008-05-08 18:52:23 +0200126#endif
127
128/* NAND flash */
Jean-Christophe PLAGNIOL-VILLARD74c076d2009-03-22 10:22:34 +0100129#ifdef CONFIG_CMD_NAND
130#define CONFIG_NAND_ATMEL
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200131#define CONFIG_SYS_MAX_NAND_DEVICE 1
132#define CONFIG_SYS_NAND_BASE 0x40000000
133#define CONFIG_SYS_NAND_DBW_8 1
Jean-Christophe PLAGNIOL-VILLARD74c076d2009-03-22 10:22:34 +0100134/* our ALE is AD21 */
135#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
136/* our CLE is AD22 */
137#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
138#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15
139#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PA22
140#endif
Stelian Pop8e429b32008-05-08 18:52:23 +0200141
142/* Ethernet */
143#define CONFIG_MACB 1
144#define CONFIG_RMII 1
145#define CONFIG_NET_MULTI 1
146#define CONFIG_NET_RETRY_COUNT 20
147#define CONFIG_RESET_PHY_R 1
148
149/* USB */
Jean-Christophe PLAGNIOL-VILLARD2b7178a2009-03-27 23:26:44 +0100150#define CONFIG_USB_ATMEL
Stelian Pop8e429b32008-05-08 18:52:23 +0200151#define CONFIG_USB_OHCI_NEW 1
Stelian Pop8e429b32008-05-08 18:52:23 +0200152#define CONFIG_DOS_PARTITION 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200153#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
154#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000 /* AT91SAM9263_UHP_BASE */
155#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263"
156#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
Stelian Pop8e429b32008-05-08 18:52:23 +0200157#define CONFIG_USB_STORAGE 1
Stelian Pop3e0cda02008-11-09 00:14:46 +0100158#define CONFIG_CMD_FAT 1
Stelian Pop8e429b32008-05-08 18:52:23 +0200159
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200160#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
Stelian Pop8e429b32008-05-08 18:52:23 +0200161
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200162#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
163#define CONFIG_SYS_MEMTEST_END 0x23e00000
Stelian Pop8e429b32008-05-08 18:52:23 +0200164
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200165#ifdef CONFIG_SYS_USE_DATAFLASH
Stelian Pop8e429b32008-05-08 18:52:23 +0200166
167/* bootstrap + u-boot + env + linux in dataflash on CS0 */
Jean-Christophe PLAGNIOL-VILLARD057c8492008-09-10 22:47:58 +0200168#define CONFIG_ENV_IS_IN_DATAFLASH 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200169#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200170#define CONFIG_ENV_OFFSET 0x4200
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200171#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200172#define CONFIG_ENV_SIZE 0x4200
Stelian Pop8e429b32008-05-08 18:52:23 +0200173#define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm"
174#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
175 "root=/dev/mtdblock0 " \
176 "mtdparts=at91_nand:-(root) "\
177 "rw rootfstype=jffs2"
178
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200179#else /* CONFIG_SYS_USE_NANDFLASH */
Stelian Pop8e429b32008-05-08 18:52:23 +0200180
181/* bootstrap + u-boot + env + linux in nandflash */
Jean-Christophe PLAGNIOL-VILLARD51bfee12008-09-10 22:47:58 +0200182#define CONFIG_ENV_IS_IN_NAND 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200183#define CONFIG_ENV_OFFSET 0x60000
184#define CONFIG_ENV_OFFSET_REDUND 0x80000
185#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
Stelian Pop8e429b32008-05-08 18:52:23 +0200186#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm"
187#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
188 "root=/dev/mtdblock5 " \
189 "mtdparts=at91_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) " \
190 "rw rootfstype=jffs2"
191
192#endif
193
194#define CONFIG_BAUDRATE 115200
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200195#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
Stelian Pop8e429b32008-05-08 18:52:23 +0200196
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200197#define CONFIG_SYS_PROMPT "U-Boot> "
198#define CONFIG_SYS_CBSIZE 256
199#define CONFIG_SYS_MAXARGS 16
200#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
201#define CONFIG_SYS_LONGHELP 1
Stelian Pop8e429b32008-05-08 18:52:23 +0200202#define CONFIG_CMDLINE_EDITING 1
Jean-Christophe PLAGNIOL-VILLARD03bab002009-03-30 16:51:40 +0200203#define CONFIG_AUTO_COMPLETE
204#define CONFIG_SYS_HUSH_PARSER
205#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
Stelian Pop8e429b32008-05-08 18:52:23 +0200206
207#define ROUND(A, B) (((A) + (B)) & ~((B) - 1))
208/*
209 * Size of malloc() pool
210 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200211#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
212#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
Stelian Pop8e429b32008-05-08 18:52:23 +0200213
214#define CONFIG_STACKSIZE (32*1024) /* regular stack */
215
216#ifdef CONFIG_USE_IRQ
217#error CONFIG_USE_IRQ not supported
218#endif
219
220#endif