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Tom Warrenf4ef6662011-04-14 12:09:41 +00001/*
2 * (C) Copyright 2010,2011
3 * NVIDIA Corporation <www.nvidia.com>
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Tom Warrenf4ef6662011-04-14 12:09:41 +00006 */
7
8#include <common.h>
9#include <asm/io.h>
Tom Warren150c2492012-09-19 15:50:56 -070010#include <asm/arch/tegra.h>
Jeroen Hofstee19d7bf32014-10-08 22:57:46 +020011#include <asm/arch-tegra/board.h>
Simon Glassca280902012-01-11 12:42:28 +000012#include <asm/arch/clock.h>
13#include <asm/arch/funcmux.h>
Stephen Warrena2ab6b72012-10-22 06:19:36 +000014#include <asm/arch/gpio.h>
Stephen Warrenae036612011-10-31 06:51:35 +000015#include <asm/arch/pinmux.h>
Tom Warrenccf79882011-09-21 12:40:07 +000016#include <asm/gpio.h>
Tom Warrenf4ef6662011-04-14 12:09:41 +000017
Simon Glassa04eba92011-11-05 04:46:51 +000018/* TODO: Remove this code when the SPI switch is working */
Allen Martin90006522013-03-16 18:58:02 +000019#if (CONFIG_MACH_TYPE != MACH_TYPE_VENTANA)
Lucas Stach0cd10c72012-09-25 20:21:14 +000020void gpio_early_init_uart(void)
Stephen Warrend5ef19b2011-10-31 06:51:37 +000021{
Stephen Warrena2ab6b72012-10-22 06:19:36 +000022 /* Enable UART via GPIO_PI3 (port 8, bit 3) so serial console works */
23#ifndef CONFIG_SPL_BUILD
24 gpio_request(GPIO_PI3, NULL);
25#endif
Simon Glass2fccd2d2014-09-03 17:37:03 -060026 tegra_spl_gpio_direction_output(GPIO_PI3, 0);
Stephen Warrend5ef19b2011-10-31 06:51:37 +000027}
Simon Glassa04eba92011-11-05 04:46:51 +000028#endif
Stephen Warrend5ef19b2011-10-31 06:51:37 +000029
Tom Warren3f82d892012-05-22 11:44:48 +000030#ifdef CONFIG_TEGRA_MMC
Tom Warrenccf79882011-09-21 12:40:07 +000031/*
Stephen Warrenae036612011-10-31 06:51:35 +000032 * Routine: pin_mux_mmc
33 * Description: setup the pin muxes/tristate values for the SDMMC(s)
34 */
Tom Warrenc9aa8312013-02-21 12:31:30 +000035void pin_mux_mmc(void)
Stephen Warrenae036612011-10-31 06:51:35 +000036{
Simon Glassca280902012-01-11 12:42:28 +000037 funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT);
38 funcmux_select(PERIPH_ID_SDMMC3, FUNCMUX_SDMMC3_SDB_4BIT);
Stephen Warrenae036612011-10-31 06:51:35 +000039
40 /* For power GPIO PI6 */
Stephen Warren70ad3752014-03-21 12:28:58 -060041 pinmux_tristate_disable(PMUX_PINGRP_ATA);
Stephen Warrenae036612011-10-31 06:51:35 +000042 /* For CD GPIO PI5 */
Stephen Warren70ad3752014-03-21 12:28:58 -060043 pinmux_tristate_disable(PMUX_PINGRP_ATC);
Stephen Warrenae036612011-10-31 06:51:35 +000044}
Tom Warrenccf79882011-09-21 12:40:07 +000045#endif
Simon Glassf10393e2012-02-27 10:52:50 +000046
47void pin_mux_usb(void)
48{
49 /* For USB's GPIO PD0. For now, since we have no pinmux in fdt */
Stephen Warren70ad3752014-03-21 12:28:58 -060050 pinmux_tristate_disable(PMUX_PINGRP_SLXK);
Simon Glassf10393e2012-02-27 10:52:50 +000051}